1*53d1339bSjoerg# $NetBSD: Makefile,v 1.2 2021/05/30 01:56:54 joerg Exp $ 276c7fc5fSjoerg 376c7fc5fSjoergLIB= LLVMPowerPCCodeGen 476c7fc5fSjoerg 576c7fc5fSjoerg.include <bsd.init.mk> 676c7fc5fSjoerg 7*53d1339bSjoergCPPFLAGS+= -I${LLVM_SRCDIR}/lib/Target/PowerPC 8*53d1339bSjoerg 976c7fc5fSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/PowerPC 1076c7fc5fSjoerg 1176c7fc5fSjoergSRCS+= PPCAsmPrinter.cpp \ 1276c7fc5fSjoerg PPCBoolRetToInt.cpp \ 1376c7fc5fSjoerg PPCBranchCoalescing.cpp \ 1476c7fc5fSjoerg PPCBranchSelector.cpp \ 1576c7fc5fSjoerg PPCCallingConv.cpp \ 1676c7fc5fSjoerg PPCCCState.cpp \ 1776c7fc5fSjoerg PPCCTRLoops.cpp \ 1876c7fc5fSjoerg PPCEarlyReturn.cpp \ 1976c7fc5fSjoerg PPCExpandISEL.cpp \ 2076c7fc5fSjoerg PPCFastISel.cpp \ 2176c7fc5fSjoerg PPCFrameLowering.cpp \ 2276c7fc5fSjoerg PPCHazardRecognizers.cpp \ 2376c7fc5fSjoerg PPCInstrInfo.cpp \ 2476c7fc5fSjoerg PPCISelDAGToDAG.cpp \ 2576c7fc5fSjoerg PPCISelLowering.cpp \ 26*53d1339bSjoerg PPCLoopInstrFormPrep.cpp \ 27*53d1339bSjoerg PPCLowerMASSVEntries.cpp \ 2876c7fc5fSjoerg PPCMachineFunctionInfo.cpp \ 2976c7fc5fSjoerg PPCMachineScheduler.cpp \ 30*53d1339bSjoerg PPCMacroFusion.cpp \ 3176c7fc5fSjoerg PPCMCInstLower.cpp \ 3276c7fc5fSjoerg PPCMIPeephole.cpp \ 3376c7fc5fSjoerg PPCPreEmitPeephole.cpp \ 3476c7fc5fSjoerg PPCReduceCRLogicals.cpp \ 3576c7fc5fSjoerg PPCRegisterInfo.cpp \ 3676c7fc5fSjoerg PPCSubtarget.cpp \ 3776c7fc5fSjoerg PPCTargetMachine.cpp \ 3876c7fc5fSjoerg PPCTargetObjectFile.cpp \ 3976c7fc5fSjoerg PPCTargetTransformInfo.cpp \ 4076c7fc5fSjoerg PPCTLSDynamicCall.cpp \ 4176c7fc5fSjoerg PPCTOCRegDeps.cpp \ 4276c7fc5fSjoerg PPCVSXCopy.cpp \ 4376c7fc5fSjoerg PPCVSXFMAMutate.cpp \ 4476c7fc5fSjoerg PPCVSXSwapRemoval.cpp 4576c7fc5fSjoerg 46*53d1339bSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/PowerPC/GISel 47*53d1339bSjoerg 48*53d1339bSjoergSRCS+= PPCCallLowering.cpp \ 49*53d1339bSjoerg PPCInstructionSelector.cpp \ 50*53d1339bSjoerg PPCLegalizerInfo.cpp \ 51*53d1339bSjoerg PPCRegisterBankInfo.cpp 52*53d1339bSjoerg 5376c7fc5fSjoergTABLEGEN_SRC= PPC.td 5476c7fc5fSjoergTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/PowerPC 5576c7fc5fSjoergTABLEGEN_OUTPUT= \ 5676c7fc5fSjoerg PPCGenAsmMatcher.inc|-gen-asm-matcher \ 5776c7fc5fSjoerg PPCGenAsmWriter.inc|-gen-asm-writer \ 5876c7fc5fSjoerg PPCGenCallingConv.inc|-gen-callingconv \ 5976c7fc5fSjoerg PPCGenCodeEmitter.inc|-gen-emitter \ 6076c7fc5fSjoerg PPCGenDAGISel.inc|-gen-dag-isel \ 6176c7fc5fSjoerg PPCGenDisassemblerTables.inc|-gen-disassembler \ 6276c7fc5fSjoerg PPCGenFastISel.inc|-gen-fast-isel \ 63*53d1339bSjoerg PPCGenGlobalISel.inc|-gen-global-isel \ 6476c7fc5fSjoerg PPCGenInstrInfo.inc|-gen-instr-info \ 6576c7fc5fSjoerg PPCGenMCCodeEmitter.inc|-gen-emitter \ 66*53d1339bSjoerg PPCGenRegisterBank.inc|-gen-register-bank \ 6776c7fc5fSjoerg PPCGenRegisterInfo.inc|-gen-register-info \ 6876c7fc5fSjoerg PPCGenSubtargetInfo.inc|-gen-subtarget 6976c7fc5fSjoerg 7076c7fc5fSjoerg.include "${.PARSEDIR}/../../tablegen.mk" 7176c7fc5fSjoerg 7276c7fc5fSjoerg.if defined(HOSTLIB) 7376c7fc5fSjoerg.include <bsd.hostlib.mk> 7476c7fc5fSjoerg.else 7576c7fc5fSjoerg.include <bsd.lib.mk> 7676c7fc5fSjoerg.endif 77