1*53d1339bSjoerg# $NetBSD: Makefile,v 1.2 2021/05/30 01:56:50 joerg Exp $ 276c7fc5fSjoerg 376c7fc5fSjoergLIB= LLVMAArch64CodeGen 476c7fc5fSjoerg 576c7fc5fSjoerg.include <bsd.init.mk> 676c7fc5fSjoerg 776c7fc5fSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/AArch64 876c7fc5fSjoerg 976c7fc5fSjoergCPPFLAGS+= -I${LLVM_SRCDIR}/lib/Target/AArch64 1076c7fc5fSjoerg 1176c7fc5fSjoergSRCS+= AArch64A53Fix835769.cpp \ 1276c7fc5fSjoerg AArch64A57FPLoadBalancing.cpp \ 1376c7fc5fSjoerg AArch64AdvSIMDScalarPass.cpp \ 1476c7fc5fSjoerg AArch64AsmPrinter.cpp \ 1576c7fc5fSjoerg AArch64BranchTargets.cpp \ 1676c7fc5fSjoerg AArch64CallingConvention.cpp \ 1776c7fc5fSjoerg AArch64CleanupLocalDynamicTLSPass.cpp \ 1876c7fc5fSjoerg AArch64CollectLOH.cpp \ 1976c7fc5fSjoerg AArch64CompressJumpTables.cpp \ 2076c7fc5fSjoerg AArch64CondBrTuning.cpp \ 2176c7fc5fSjoerg AArch64ConditionalCompares.cpp \ 2276c7fc5fSjoerg AArch64ConditionOptimizer.cpp \ 2376c7fc5fSjoerg AArch64DeadRegisterDefinitionsPass.cpp \ 2476c7fc5fSjoerg AArch64ExpandImm.cpp \ 2576c7fc5fSjoerg AArch64ExpandPseudoInsts.cpp \ 2676c7fc5fSjoerg AArch64FalkorHWPFFix.cpp \ 2776c7fc5fSjoerg AArch64FastISel.cpp \ 2876c7fc5fSjoerg AArch64FrameLowering.cpp \ 2976c7fc5fSjoerg AArch64InstrInfo.cpp \ 3076c7fc5fSjoerg AArch64ISelDAGToDAG.cpp \ 3176c7fc5fSjoerg AArch64ISelLowering.cpp \ 3276c7fc5fSjoerg AArch64LoadStoreOptimizer.cpp \ 33*53d1339bSjoerg AArch64LowerHomogeneousPrologEpilog.cpp \ 34*53d1339bSjoerg AArch64MachineFunctionInfo.cpp \ 3576c7fc5fSjoerg AArch64MacroFusion.cpp \ 3676c7fc5fSjoerg AArch64MCInstLower.cpp \ 3776c7fc5fSjoerg AArch64PBQPRegAlloc.cpp \ 3876c7fc5fSjoerg AArch64PromoteConstant.cpp \ 3976c7fc5fSjoerg AArch64RedundantCopyElimination.cpp \ 4076c7fc5fSjoerg AArch64RegisterInfo.cpp \ 4176c7fc5fSjoerg AArch64SelectionDAGInfo.cpp \ 4276c7fc5fSjoerg AArch64SIMDInstrOpt.cpp \ 43*53d1339bSjoerg AArch64SLSHardening.cpp \ 4476c7fc5fSjoerg AArch64SpeculationHardening.cpp \ 4576c7fc5fSjoerg AArch64StackTagging.cpp \ 46*53d1339bSjoerg AArch64StackTaggingPreRA.cpp \ 4776c7fc5fSjoerg AArch64StorePairSuppress.cpp \ 4876c7fc5fSjoerg AArch64Subtarget.cpp \ 4976c7fc5fSjoerg AArch64TargetMachine.cpp \ 5076c7fc5fSjoerg AArch64TargetObjectFile.cpp \ 51*53d1339bSjoerg AArch64TargetTransformInfo.cpp \ 52*53d1339bSjoerg SVEIntrinsicOpts.cpp 53*53d1339bSjoerg 54*53d1339bSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/AArch64/GISel 55*53d1339bSjoerg 56*53d1339bSjoergSRCS+= AArch64CallLowering.cpp \ 57*53d1339bSjoerg AArch64GlobalISelUtils.cpp \ 58*53d1339bSjoerg AArch64InstructionSelector.cpp \ 59*53d1339bSjoerg AArch64LegalizerInfo.cpp \ 60*53d1339bSjoerg AArch64O0PreLegalizerCombiner.cpp \ 61*53d1339bSjoerg AArch64PostLegalizerCombiner.cpp \ 62*53d1339bSjoerg AArch64PostLegalizerLowering.cpp \ 63*53d1339bSjoerg AArch64PostSelectOptimize.cpp \ 64*53d1339bSjoerg AArch64PreLegalizerCombiner.cpp \ 65*53d1339bSjoerg AArch64RegisterBankInfo.cpp 6676c7fc5fSjoerg 6776c7fc5fSjoergTABLEGEN_SRC= AArch64.td 6876c7fc5fSjoergTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/AArch64 6976c7fc5fSjoergTABLEGEN_OUTPUT= \ 7076c7fc5fSjoerg AArch64GenAsmMatcher.inc|-gen-asm-matcher \ 7176c7fc5fSjoerg AArch64GenAsmWriter1.inc|-gen-asm-writer^-asmwriternum=1 \ 7276c7fc5fSjoerg AArch64GenAsmWriter.inc|-gen-asm-writer \ 7376c7fc5fSjoerg AArch64GenCallingConv.inc|-gen-callingconv \ 7476c7fc5fSjoerg AArch64GenDAGISel.inc|-gen-dag-isel \ 7576c7fc5fSjoerg AArch64GenDisassemblerTables.inc|-gen-disassembler \ 76*53d1339bSjoerg AArch64GenExegesis.inc|-gen-exegesis \ 7776c7fc5fSjoerg AArch64GenFastISel.inc|-gen-fast-isel \ 7876c7fc5fSjoerg AArch64GenGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PreLegalizerCombinerHelper \ 7976c7fc5fSjoerg AArch64GenGlobalISel.inc|-gen-global-isel \ 8076c7fc5fSjoerg AArch64GenInstrInfo.inc|-gen-instr-info \ 8176c7fc5fSjoerg AArch64GenMCCodeEmitter.inc|-gen-emitter \ 8276c7fc5fSjoerg AArch64GenMCPseudoLowering.inc|-gen-pseudo-lowering \ 83*53d1339bSjoerg AArch64GenO0PreLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64O0PreLegalizerCombinerHelper \ 84*53d1339bSjoerg AArch64GenPreLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PreLegalizerCombinerHelper \ 85*53d1339bSjoerg AArch64GenPostLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PostLegalizerCombinerHelper \ 86*53d1339bSjoerg AArch64GenPostLegalizeGILowering.inc|-gen-global-isel-combiner^-combiners=AArch64PostLegalizerLoweringHelper \ 8776c7fc5fSjoerg AArch64GenRegisterBank.inc|-gen-register-bank \ 8876c7fc5fSjoerg AArch64GenRegisterInfo.inc|-gen-register-info \ 8976c7fc5fSjoerg AArch64GenSubtargetInfo.inc|-gen-subtarget \ 90*53d1339bSjoerg AArch64GenSystemOperands.inc|-gen-searchable-tables 91*53d1339bSjoerg 9276c7fc5fSjoerg 9376c7fc5fSjoerg.include "${.PARSEDIR}/../../tablegen.mk" 9476c7fc5fSjoerg 9576c7fc5fSjoerg.if defined(HOSTLIB) 9676c7fc5fSjoerg.include <bsd.hostlib.mk> 9776c7fc5fSjoerg.else 9876c7fc5fSjoerg.include <bsd.lib.mk> 9976c7fc5fSjoerg.endif 100