1========================= 2LLVM 10.0.0 Release Notes 3========================= 4 5.. contents:: 6 :local: 7 8.. warning:: 9 These are in-progress notes for the upcoming LLVM 10 release. 10 Release notes for previous releases can be found on 11 `the Download Page <https://releases.llvm.org/download.html>`_. 12 13 14Introduction 15============ 16 17This document contains the release notes for the LLVM Compiler Infrastructure, 18release 10.0.0. Here we describe the status of LLVM, including major improvements 19from the previous release, improvements in various subprojects of LLVM, and 20some of the current users of the code. All LLVM releases may be downloaded 21from the `LLVM releases web site <https://llvm.org/releases/>`_. 22 23For more information about LLVM, including information about the latest 24release, please check out the `main LLVM web site <https://llvm.org/>`_. If you 25have questions or comments, the `LLVM Developer's Mailing List 26<https://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send 27them. 28 29Note that if you are reading this file from a Subversion checkout or the main 30LLVM web page, this document applies to the *next* release, not the current 31one. To see the release notes for a specific release, please see the `releases 32page <https://llvm.org/releases/>`_. 33 34Non-comprehensive list of changes in this release 35================================================= 36.. NOTE 37 For small 1-3 sentence descriptions, just add an entry at the end of 38 this list. If your description won't fit comfortably in one bullet 39 point (e.g. maybe you would like to give an example of the 40 functionality, or simply have a lot to talk about), see the `NOTE` below 41 for adding a new subsection. 42 43* The ISD::FP_ROUND_INREG opcode and related code was removed from SelectionDAG. 44* Enabled MemorySSA as a loop dependency. Since 45 `r370957 <https://reviews.llvm.org/rL370957>`_ 46 (`D58311 <https://reviews.llvm.org/D58311>`_ ``[MemorySSA & LoopPassManager] 47 Enable MemorySSA as loop dependency. Update tests.``), the MemorySSA analysis 48 is being preserved and used by a series of loop passes. The most significant 49 use is in LICM, where the instruction hoisting and sinking relies on aliasing 50 information provided by MemorySSA vs previously creating an AliasSetTracker. 51 The LICM step of promoting variables to scalars still relies on the creation 52 of an AliasSetTracker, but its use is reduced to only be enabled for loops 53 with a small number of overall memory instructions. This choice was motivated 54 by experimental results showing compile and run time benefits or replacing the 55 AliasSetTracker usage with MemorySSA without any performance penalties. 56 The fact that MemorySSA is now preserved by and available in a series of loop 57 passes, also opens up opportunities for its use in those respective passes. 58 59.. NOTE 60 If you would like to document a larger change, then you can add a 61 subsection about it right here. You can copy the following boilerplate 62 and un-indent it (the indentation causes it to be inside this comment). 63 64 Special New Feature 65 ------------------- 66 67 Makes programs 10x faster by doing Special New Thing. 68 69* As per :ref:`LLVM Language Reference Manual <i_getelementptr>`, 70 ``getelementptr inbounds`` can not change the null status of a pointer, 71 meaning it can not produce non-null pointer given null base pointer, and 72 likewise given non-null base pointer it can not produce null pointer; if it 73 does, the result is a :ref:`poison value <poisonvalues>`. 74 Since `r369789 <https://reviews.llvm.org/rL369789>`_ 75 (`D66608 <https://reviews.llvm.org/D66608>`_ ``[InstCombine] icmp eq/ne (gep 76 inbounds P, Idx..), null -> icmp eq/ne P, null``) LLVM uses that for 77 transformations. If the original source violates these requirements this 78 may result in code being miscompiled. If you are using Clang front-end, 79 Undefined Behaviour Sanitizer ``-fsanitize=pointer-overflow`` check 80 will now catch such cases. 81 82* The Loop Idiom Recognition (``-loop-idiom``) pass has learned to recognize 83 ``bcmp`` pattern, and convert it into a call to ``bcmp`` (or ``memcmp``) 84 function. 85 86* Windows Control Flow Guard: the ``-cfguard`` option now emits CFG checks on 87 indirect function calls. The previous behavior is still available with the 88 ``-cfguard-nochecks`` option. Note that this feature should always be used 89 with optimizations enabled. 90 91Changes to the LLVM IR 92---------------------- 93 94* Unnamed function arguments now get printed with their automatically 95 generated name (e.g. "i32 %0") in definitions. This may require front-ends 96 to update their tests; if so there is a script utils/add_argument_names.py 97 that correctly converted 80-90% of Clang tests. Some manual work will almost 98 certainly still be needed. 99 100 101Changes to building LLVM 102------------------------ 103 104Changes to the ARM Backend 105-------------------------- 106 107 During this release ... 108 109 110Changes to the MIPS Target 111-------------------------- 112 113 During this release ... 114 115 116Changes to the PowerPC Target 117----------------------------- 118 119 During this release ... 120 121Changes to the X86 Target 122------------------------- 123 124 During this release ... 125 126* Less than 128 bit vector types, v2i32, v4i16, v2i16, v8i8, v4i8, and v2i8, are 127 now stored in the lower bits of an xmm register and the upper bits are 128 undefined. Previously the elements were spread apart with undefined bits in 129 between them. 130* v32i8 and v64i8 vectors with AVX512F enabled, but AVX512BW disabled will now 131 be passed in ZMM registers for calls and returns. Previously they were passed 132 in two YMM registers. Old behavior can be enabled by passing 133 -x86-enable-old-knl-abi 134* -mprefer-vector-width=256 is now the default behavior skylake-avx512 and later 135 Intel CPUs. This tries to limit the use of 512-bit registers which can cause a 136 decrease in CPU frequency on these CPUs. This can be re-enabled by passing 137 -mprefer-vector-width=512 to clang or passing -mattr=-prefer-256-bit to llc. 138 139Changes to the AMDGPU Target 140----------------------------- 141 142Changes to the AVR Target 143----------------------------- 144 145 During this release ... 146 147* Deprecated the mpx feature flag for the Intel MPX instructions. There were no 148 intrinsics for this feature. This change only this effects the results 149 returned by getHostCPUFeatures on CPUs that implement the MPX instructions. 150 151Changes to the WebAssembly Target 152--------------------------------- 153 154 During this release ... 155 156 157Changes to the OCaml bindings 158----------------------------- 159 160 161 162Changes to the C API 163-------------------- 164 165 166Changes to the DAG infrastructure 167--------------------------------- 168 169Changes to LLDB 170=============== 171 172External Open Source Projects Using LLVM 10 173=========================================== 174 175* A project... 176 177 178Additional Information 179====================== 180 181A wide variety of additional information is available on the `LLVM web page 182<https://llvm.org/>`_, in particular in the `documentation 183<https://llvm.org/docs/>`_ section. The web page also contains versions of the 184API documentation which is up-to-date with the Subversion version of the source 185code. You can access versions of these documents specific to this release by 186going into the ``llvm/docs/`` directory in the LLVM tree. 187 188If you have any questions or comments about LLVM, please feel free to contact 189us via the `mailing lists <https://llvm.org/docs/#mailing-lists>`_. 190