1# $NetBSD: Makefile,v 1.1 2019/11/11 22:45:02 joerg Exp $ 2 3PROG_CXX= llvm-tblgen 4NOMAN= yes 5 6.include <bsd.init.mk> 7 8.PATH: ${LLVM_SRCDIR}/utils/TableGen 9 10SRCS= AsmMatcherEmitter.cpp \ 11 AsmWriterEmitter.cpp \ 12 AsmWriterInst.cpp \ 13 Attributes.cpp \ 14 CallingConvEmitter.cpp \ 15 CodeEmitterGen.cpp \ 16 CodeGenDAGPatterns.cpp \ 17 CodeGenHwModes.cpp \ 18 CodeGenInstruction.cpp \ 19 CodeGenMapTable.cpp \ 20 CodeGenRegisters.cpp \ 21 CodeGenSchedule.cpp \ 22 CodeGenTarget.cpp \ 23 CTagsEmitter.cpp \ 24 DAGISelEmitter.cpp \ 25 DAGISelMatcher.cpp \ 26 DAGISelMatcherEmitter.cpp \ 27 DAGISelMatcherGen.cpp \ 28 DAGISelMatcherOpt.cpp \ 29 DFAEmitter.cpp \ 30 DFAPacketizerEmitter.cpp \ 31 DisassemblerEmitter.cpp \ 32 ExegesisEmitter.cpp \ 33 FastISelEmitter.cpp \ 34 FixedLenDecoderEmitter.cpp \ 35 GICombinerEmitter.cpp \ 36 GlobalISelEmitter.cpp \ 37 InfoByHwMode.cpp \ 38 InstrDocsEmitter.cpp \ 39 InstrInfoEmitter.cpp \ 40 IntrinsicEmitter.cpp \ 41 OptParserEmitter.cpp \ 42 PredicateExpander.cpp \ 43 PseudoLoweringEmitter.cpp \ 44 RegisterBankEmitter.cpp \ 45 RegisterInfoEmitter.cpp \ 46 RISCVCompressInstEmitter.cpp \ 47 SDNodeProperties.cpp \ 48 SearchableTableEmitter.cpp \ 49 SubtargetEmitter.cpp \ 50 SubtargetFeatureInfo.cpp \ 51 TableGen.cpp \ 52 Types.cpp \ 53 WebAssemblyDisassemblerEmitter.cpp \ 54 X86DisassemblerTables.cpp \ 55 X86EVEX2VEXTablesEmitter.cpp \ 56 X86FoldTablesEmitter.cpp \ 57 X86ModRMFilters.cpp \ 58 X86RecognizableInstr.cpp 59 60.PATH: ${LLVM_SRCDIR}/utils/TableGen/GlobalISel 61SRCS+= CodeExpander.cpp 62 63LLVM_LIBS+= \ 64 TableGen \ 65 Support \ 66 Demangle 67 68.include "${.PARSEDIR}/../../link.mk" 69 70.include <bsd.prog.mk> 71