xref: /netbsd-src/crypto/external/bsd/openssl/lib/libcrypto/arch/mips/sha1-mips.S (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c) 
1#ifdef OPENSSL_FIPSCANISTER
2# include <openssl/fipssyms.h>
3#endif
4
5#if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
6#define _MIPS_ARCH_MIPS32R2
7#endif
8
9.text
10
11.set	noat
12.set	noreorder
13.align	5
14.globl	sha1_block_data_order
15.ent	sha1_block_data_order
16sha1_block_data_order:
17	.frame	$29,16*4,$31
18	.mask	0xc0ff0000,-4
19	.set	noreorder
20	sub $29,16*4
21	sw	$31,(16-1)*4($29)
22	sw	$30,(16-2)*4($29)
23	sw	$23,(16-3)*4($29)
24	sw	$22,(16-4)*4($29)
25	sw	$21,(16-5)*4($29)
26	sw	$20,(16-6)*4($29)
27	sw	$19,(16-7)*4($29)
28	sw	$18,(16-8)*4($29)
29	sw	$17,(16-9)*4($29)
30	sw	$16,(16-10)*4($29)
31	sll $6,6
32	add $6,$5
33	sw	$6,0($29)
34	lw	$1,0($4)
35	lw	$2,4($4)
36	lw	$3,8($4)
37	lw	$7,12($4)
38	b	.Loop
39	lw	$24,16($4)
40.align	4
41.Loop:
42	.set	reorder
43	lwl	$8,3($5)
44	lui	$31,0x5a82
45	lwr	$8,0($5)
46	ori	$31,0x7999	# K_00_19
47#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
48	wsbh	$8,$8	# byte swap(0)
49	rotr	$8,$8,16
50#else
51	srl	$25,$8,24	# byte swap(0)
52	srl	$6,$8,8
53	andi	$30,$8,0xFF00
54	sll	$8,$8,24
55	andi	$6,0xFF00
56	sll	$30,$30,8
57	or	$8,$25
58	or	$6,$30
59	or	$8,$6
60#endif
61#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
62	addu	$24,$31		# 0
63	xor	$25,$3,$7
64	rotr	$6,$1,27
65	 lwl	$9,1*4+3($5)
66	and	$25,$2
67	addu	$24,$6
68	 lwr	$9,1*4+0($5)
69	xor	$25,$7
70	addu	$24,$8
71	rotr	$2,$2,2
72	addu	$24,$25
73#else
74	 lwl	$9,1*4+3($5)
75	sll	$25,$1,5	# 0
76	addu	$24,$31
77	 lwr	$9,1*4+0($5)
78	srl	$6,$1,27
79	addu	$24,$25
80	xor	$25,$3,$7
81	addu	$24,$6
82	sll	$30,$2,30
83	and	$25,$2
84	srl	$2,$2,2
85	xor	$25,$7
86	addu	$24,$8
87	or	$2,$30
88	addu	$24,$25
89#endif
90#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
91	wsbh	$9,$9	# byte swap(1)
92	rotr	$9,$9,16
93#else
94	srl	$25,$9,24	# byte swap(1)
95	srl	$6,$9,8
96	andi	$30,$9,0xFF00
97	sll	$9,$9,24
98	andi	$6,0xFF00
99	sll	$30,$30,8
100	or	$9,$25
101	or	$6,$30
102	or	$9,$6
103#endif
104#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
105	addu	$7,$31		# 1
106	xor	$25,$2,$3
107	rotr	$6,$24,27
108	 lwl	$10,2*4+3($5)
109	and	$25,$1
110	addu	$7,$6
111	 lwr	$10,2*4+0($5)
112	xor	$25,$3
113	addu	$7,$9
114	rotr	$1,$1,2
115	addu	$7,$25
116#else
117	 lwl	$10,2*4+3($5)
118	sll	$25,$24,5	# 1
119	addu	$7,$31
120	 lwr	$10,2*4+0($5)
121	srl	$6,$24,27
122	addu	$7,$25
123	xor	$25,$2,$3
124	addu	$7,$6
125	sll	$30,$1,30
126	and	$25,$1
127	srl	$1,$1,2
128	xor	$25,$3
129	addu	$7,$9
130	or	$1,$30
131	addu	$7,$25
132#endif
133#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
134	wsbh	$10,$10	# byte swap(2)
135	rotr	$10,$10,16
136#else
137	srl	$25,$10,24	# byte swap(2)
138	srl	$6,$10,8
139	andi	$30,$10,0xFF00
140	sll	$10,$10,24
141	andi	$6,0xFF00
142	sll	$30,$30,8
143	or	$10,$25
144	or	$6,$30
145	or	$10,$6
146#endif
147#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
148	addu	$3,$31		# 2
149	xor	$25,$1,$2
150	rotr	$6,$7,27
151	 lwl	$11,3*4+3($5)
152	and	$25,$24
153	addu	$3,$6
154	 lwr	$11,3*4+0($5)
155	xor	$25,$2
156	addu	$3,$10
157	rotr	$24,$24,2
158	addu	$3,$25
159#else
160	 lwl	$11,3*4+3($5)
161	sll	$25,$7,5	# 2
162	addu	$3,$31
163	 lwr	$11,3*4+0($5)
164	srl	$6,$7,27
165	addu	$3,$25
166	xor	$25,$1,$2
167	addu	$3,$6
168	sll	$30,$24,30
169	and	$25,$24
170	srl	$24,$24,2
171	xor	$25,$2
172	addu	$3,$10
173	or	$24,$30
174	addu	$3,$25
175#endif
176#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
177	wsbh	$11,$11	# byte swap(3)
178	rotr	$11,$11,16
179#else
180	srl	$25,$11,24	# byte swap(3)
181	srl	$6,$11,8
182	andi	$30,$11,0xFF00
183	sll	$11,$11,24
184	andi	$6,0xFF00
185	sll	$30,$30,8
186	or	$11,$25
187	or	$6,$30
188	or	$11,$6
189#endif
190#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
191	addu	$2,$31		# 3
192	xor	$25,$24,$1
193	rotr	$6,$3,27
194	 lwl	$12,4*4+3($5)
195	and	$25,$7
196	addu	$2,$6
197	 lwr	$12,4*4+0($5)
198	xor	$25,$1
199	addu	$2,$11
200	rotr	$7,$7,2
201	addu	$2,$25
202#else
203	 lwl	$12,4*4+3($5)
204	sll	$25,$3,5	# 3
205	addu	$2,$31
206	 lwr	$12,4*4+0($5)
207	srl	$6,$3,27
208	addu	$2,$25
209	xor	$25,$24,$1
210	addu	$2,$6
211	sll	$30,$7,30
212	and	$25,$7
213	srl	$7,$7,2
214	xor	$25,$1
215	addu	$2,$11
216	or	$7,$30
217	addu	$2,$25
218#endif
219#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
220	wsbh	$12,$12	# byte swap(4)
221	rotr	$12,$12,16
222#else
223	srl	$25,$12,24	# byte swap(4)
224	srl	$6,$12,8
225	andi	$30,$12,0xFF00
226	sll	$12,$12,24
227	andi	$6,0xFF00
228	sll	$30,$30,8
229	or	$12,$25
230	or	$6,$30
231	or	$12,$6
232#endif
233#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
234	addu	$1,$31		# 4
235	xor	$25,$7,$24
236	rotr	$6,$2,27
237	 lwl	$13,5*4+3($5)
238	and	$25,$3
239	addu	$1,$6
240	 lwr	$13,5*4+0($5)
241	xor	$25,$24
242	addu	$1,$12
243	rotr	$3,$3,2
244	addu	$1,$25
245#else
246	 lwl	$13,5*4+3($5)
247	sll	$25,$2,5	# 4
248	addu	$1,$31
249	 lwr	$13,5*4+0($5)
250	srl	$6,$2,27
251	addu	$1,$25
252	xor	$25,$7,$24
253	addu	$1,$6
254	sll	$30,$3,30
255	and	$25,$3
256	srl	$3,$3,2
257	xor	$25,$24
258	addu	$1,$12
259	or	$3,$30
260	addu	$1,$25
261#endif
262#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
263	wsbh	$13,$13	# byte swap(5)
264	rotr	$13,$13,16
265#else
266	srl	$25,$13,24	# byte swap(5)
267	srl	$6,$13,8
268	andi	$30,$13,0xFF00
269	sll	$13,$13,24
270	andi	$6,0xFF00
271	sll	$30,$30,8
272	or	$13,$25
273	or	$6,$30
274	or	$13,$6
275#endif
276#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
277	addu	$24,$31		# 5
278	xor	$25,$3,$7
279	rotr	$6,$1,27
280	 lwl	$14,6*4+3($5)
281	and	$25,$2
282	addu	$24,$6
283	 lwr	$14,6*4+0($5)
284	xor	$25,$7
285	addu	$24,$13
286	rotr	$2,$2,2
287	addu	$24,$25
288#else
289	 lwl	$14,6*4+3($5)
290	sll	$25,$1,5	# 5
291	addu	$24,$31
292	 lwr	$14,6*4+0($5)
293	srl	$6,$1,27
294	addu	$24,$25
295	xor	$25,$3,$7
296	addu	$24,$6
297	sll	$30,$2,30
298	and	$25,$2
299	srl	$2,$2,2
300	xor	$25,$7
301	addu	$24,$13
302	or	$2,$30
303	addu	$24,$25
304#endif
305#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
306	wsbh	$14,$14	# byte swap(6)
307	rotr	$14,$14,16
308#else
309	srl	$25,$14,24	# byte swap(6)
310	srl	$6,$14,8
311	andi	$30,$14,0xFF00
312	sll	$14,$14,24
313	andi	$6,0xFF00
314	sll	$30,$30,8
315	or	$14,$25
316	or	$6,$30
317	or	$14,$6
318#endif
319#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
320	addu	$7,$31		# 6
321	xor	$25,$2,$3
322	rotr	$6,$24,27
323	 lwl	$15,7*4+3($5)
324	and	$25,$1
325	addu	$7,$6
326	 lwr	$15,7*4+0($5)
327	xor	$25,$3
328	addu	$7,$14
329	rotr	$1,$1,2
330	addu	$7,$25
331#else
332	 lwl	$15,7*4+3($5)
333	sll	$25,$24,5	# 6
334	addu	$7,$31
335	 lwr	$15,7*4+0($5)
336	srl	$6,$24,27
337	addu	$7,$25
338	xor	$25,$2,$3
339	addu	$7,$6
340	sll	$30,$1,30
341	and	$25,$1
342	srl	$1,$1,2
343	xor	$25,$3
344	addu	$7,$14
345	or	$1,$30
346	addu	$7,$25
347#endif
348#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
349	wsbh	$15,$15	# byte swap(7)
350	rotr	$15,$15,16
351#else
352	srl	$25,$15,24	# byte swap(7)
353	srl	$6,$15,8
354	andi	$30,$15,0xFF00
355	sll	$15,$15,24
356	andi	$6,0xFF00
357	sll	$30,$30,8
358	or	$15,$25
359	or	$6,$30
360	or	$15,$6
361#endif
362#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
363	addu	$3,$31		# 7
364	xor	$25,$1,$2
365	rotr	$6,$7,27
366	 lwl	$16,8*4+3($5)
367	and	$25,$24
368	addu	$3,$6
369	 lwr	$16,8*4+0($5)
370	xor	$25,$2
371	addu	$3,$15
372	rotr	$24,$24,2
373	addu	$3,$25
374#else
375	 lwl	$16,8*4+3($5)
376	sll	$25,$7,5	# 7
377	addu	$3,$31
378	 lwr	$16,8*4+0($5)
379	srl	$6,$7,27
380	addu	$3,$25
381	xor	$25,$1,$2
382	addu	$3,$6
383	sll	$30,$24,30
384	and	$25,$24
385	srl	$24,$24,2
386	xor	$25,$2
387	addu	$3,$15
388	or	$24,$30
389	addu	$3,$25
390#endif
391#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
392	wsbh	$16,$16	# byte swap(8)
393	rotr	$16,$16,16
394#else
395	srl	$25,$16,24	# byte swap(8)
396	srl	$6,$16,8
397	andi	$30,$16,0xFF00
398	sll	$16,$16,24
399	andi	$6,0xFF00
400	sll	$30,$30,8
401	or	$16,$25
402	or	$6,$30
403	or	$16,$6
404#endif
405#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
406	addu	$2,$31		# 8
407	xor	$25,$24,$1
408	rotr	$6,$3,27
409	 lwl	$17,9*4+3($5)
410	and	$25,$7
411	addu	$2,$6
412	 lwr	$17,9*4+0($5)
413	xor	$25,$1
414	addu	$2,$16
415	rotr	$7,$7,2
416	addu	$2,$25
417#else
418	 lwl	$17,9*4+3($5)
419	sll	$25,$3,5	# 8
420	addu	$2,$31
421	 lwr	$17,9*4+0($5)
422	srl	$6,$3,27
423	addu	$2,$25
424	xor	$25,$24,$1
425	addu	$2,$6
426	sll	$30,$7,30
427	and	$25,$7
428	srl	$7,$7,2
429	xor	$25,$1
430	addu	$2,$16
431	or	$7,$30
432	addu	$2,$25
433#endif
434#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
435	wsbh	$17,$17	# byte swap(9)
436	rotr	$17,$17,16
437#else
438	srl	$25,$17,24	# byte swap(9)
439	srl	$6,$17,8
440	andi	$30,$17,0xFF00
441	sll	$17,$17,24
442	andi	$6,0xFF00
443	sll	$30,$30,8
444	or	$17,$25
445	or	$6,$30
446	or	$17,$6
447#endif
448#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
449	addu	$1,$31		# 9
450	xor	$25,$7,$24
451	rotr	$6,$2,27
452	 lwl	$18,10*4+3($5)
453	and	$25,$3
454	addu	$1,$6
455	 lwr	$18,10*4+0($5)
456	xor	$25,$24
457	addu	$1,$17
458	rotr	$3,$3,2
459	addu	$1,$25
460#else
461	 lwl	$18,10*4+3($5)
462	sll	$25,$2,5	# 9
463	addu	$1,$31
464	 lwr	$18,10*4+0($5)
465	srl	$6,$2,27
466	addu	$1,$25
467	xor	$25,$7,$24
468	addu	$1,$6
469	sll	$30,$3,30
470	and	$25,$3
471	srl	$3,$3,2
472	xor	$25,$24
473	addu	$1,$17
474	or	$3,$30
475	addu	$1,$25
476#endif
477#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
478	wsbh	$18,$18	# byte swap(10)
479	rotr	$18,$18,16
480#else
481	srl	$25,$18,24	# byte swap(10)
482	srl	$6,$18,8
483	andi	$30,$18,0xFF00
484	sll	$18,$18,24
485	andi	$6,0xFF00
486	sll	$30,$30,8
487	or	$18,$25
488	or	$6,$30
489	or	$18,$6
490#endif
491#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
492	addu	$24,$31		# 10
493	xor	$25,$3,$7
494	rotr	$6,$1,27
495	 lwl	$19,11*4+3($5)
496	and	$25,$2
497	addu	$24,$6
498	 lwr	$19,11*4+0($5)
499	xor	$25,$7
500	addu	$24,$18
501	rotr	$2,$2,2
502	addu	$24,$25
503#else
504	 lwl	$19,11*4+3($5)
505	sll	$25,$1,5	# 10
506	addu	$24,$31
507	 lwr	$19,11*4+0($5)
508	srl	$6,$1,27
509	addu	$24,$25
510	xor	$25,$3,$7
511	addu	$24,$6
512	sll	$30,$2,30
513	and	$25,$2
514	srl	$2,$2,2
515	xor	$25,$7
516	addu	$24,$18
517	or	$2,$30
518	addu	$24,$25
519#endif
520#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
521	wsbh	$19,$19	# byte swap(11)
522	rotr	$19,$19,16
523#else
524	srl	$25,$19,24	# byte swap(11)
525	srl	$6,$19,8
526	andi	$30,$19,0xFF00
527	sll	$19,$19,24
528	andi	$6,0xFF00
529	sll	$30,$30,8
530	or	$19,$25
531	or	$6,$30
532	or	$19,$6
533#endif
534#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
535	addu	$7,$31		# 11
536	xor	$25,$2,$3
537	rotr	$6,$24,27
538	 lwl	$20,12*4+3($5)
539	and	$25,$1
540	addu	$7,$6
541	 lwr	$20,12*4+0($5)
542	xor	$25,$3
543	addu	$7,$19
544	rotr	$1,$1,2
545	addu	$7,$25
546#else
547	 lwl	$20,12*4+3($5)
548	sll	$25,$24,5	# 11
549	addu	$7,$31
550	 lwr	$20,12*4+0($5)
551	srl	$6,$24,27
552	addu	$7,$25
553	xor	$25,$2,$3
554	addu	$7,$6
555	sll	$30,$1,30
556	and	$25,$1
557	srl	$1,$1,2
558	xor	$25,$3
559	addu	$7,$19
560	or	$1,$30
561	addu	$7,$25
562#endif
563#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
564	wsbh	$20,$20	# byte swap(12)
565	rotr	$20,$20,16
566#else
567	srl	$25,$20,24	# byte swap(12)
568	srl	$6,$20,8
569	andi	$30,$20,0xFF00
570	sll	$20,$20,24
571	andi	$6,0xFF00
572	sll	$30,$30,8
573	or	$20,$25
574	or	$6,$30
575	or	$20,$6
576#endif
577#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
578	addu	$3,$31		# 12
579	xor	$25,$1,$2
580	rotr	$6,$7,27
581	 lwl	$21,13*4+3($5)
582	and	$25,$24
583	addu	$3,$6
584	 lwr	$21,13*4+0($5)
585	xor	$25,$2
586	addu	$3,$20
587	rotr	$24,$24,2
588	addu	$3,$25
589#else
590	 lwl	$21,13*4+3($5)
591	sll	$25,$7,5	# 12
592	addu	$3,$31
593	 lwr	$21,13*4+0($5)
594	srl	$6,$7,27
595	addu	$3,$25
596	xor	$25,$1,$2
597	addu	$3,$6
598	sll	$30,$24,30
599	and	$25,$24
600	srl	$24,$24,2
601	xor	$25,$2
602	addu	$3,$20
603	or	$24,$30
604	addu	$3,$25
605#endif
606#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
607	wsbh	$21,$21	# byte swap(13)
608	rotr	$21,$21,16
609#else
610	srl	$25,$21,24	# byte swap(13)
611	srl	$6,$21,8
612	andi	$30,$21,0xFF00
613	sll	$21,$21,24
614	andi	$6,0xFF00
615	sll	$30,$30,8
616	or	$21,$25
617	or	$6,$30
618	or	$21,$6
619#endif
620#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
621	addu	$2,$31		# 13
622	xor	$25,$24,$1
623	rotr	$6,$3,27
624	 lwl	$22,14*4+3($5)
625	and	$25,$7
626	addu	$2,$6
627	 lwr	$22,14*4+0($5)
628	xor	$25,$1
629	addu	$2,$21
630	rotr	$7,$7,2
631	addu	$2,$25
632#else
633	 lwl	$22,14*4+3($5)
634	sll	$25,$3,5	# 13
635	addu	$2,$31
636	 lwr	$22,14*4+0($5)
637	srl	$6,$3,27
638	addu	$2,$25
639	xor	$25,$24,$1
640	addu	$2,$6
641	sll	$30,$7,30
642	and	$25,$7
643	srl	$7,$7,2
644	xor	$25,$1
645	addu	$2,$21
646	or	$7,$30
647	addu	$2,$25
648#endif
649#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
650	wsbh	$22,$22	# byte swap(14)
651	rotr	$22,$22,16
652#else
653	srl	$25,$22,24	# byte swap(14)
654	srl	$6,$22,8
655	andi	$30,$22,0xFF00
656	sll	$22,$22,24
657	andi	$6,0xFF00
658	sll	$30,$30,8
659	or	$22,$25
660	or	$6,$30
661	or	$22,$6
662#endif
663#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
664	addu	$1,$31		# 14
665	xor	$25,$7,$24
666	rotr	$6,$2,27
667	 lwl	$23,15*4+3($5)
668	and	$25,$3
669	addu	$1,$6
670	 lwr	$23,15*4+0($5)
671	xor	$25,$24
672	addu	$1,$22
673	rotr	$3,$3,2
674	addu	$1,$25
675#else
676	 lwl	$23,15*4+3($5)
677	sll	$25,$2,5	# 14
678	addu	$1,$31
679	 lwr	$23,15*4+0($5)
680	srl	$6,$2,27
681	addu	$1,$25
682	xor	$25,$7,$24
683	addu	$1,$6
684	sll	$30,$3,30
685	and	$25,$3
686	srl	$3,$3,2
687	xor	$25,$24
688	addu	$1,$22
689	or	$3,$30
690	addu	$1,$25
691#endif
692#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
693	wsbh	$23,$23	# byte swap(15)
694	rotr	$23,$23,16
695#else
696	srl	$25,$23,24	# byte swap(15)
697	srl	$6,$23,8
698	andi	$30,$23,0xFF00
699	sll	$23,$23,24
700	andi	$6,0xFF00
701	sll	$30,$30,8
702	or	$23,$25
703	or	$23,$6
704	or	$23,$30
705#endif
706#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
707	addu	$24,$31		# 15
708	 xor	$8,$10
709	xor	$25,$3,$7
710	rotr	$6,$1,27
711	 xor	$8,$16
712	and	$25,$2
713	addu	$24,$6
714	 xor	$8,$21
715	xor	$25,$7
716	addu	$24,$23
717	 rotr	$8,$8,31
718	rotr	$2,$2,2
719	addu	$24,$25
720#else
721	 xor	$8,$10
722	sll	$25,$1,5	# 15
723	addu	$24,$31
724	srl	$6,$1,27
725	addu	$24,$25
726	 xor	$8,$16
727	xor	$25,$3,$7
728	addu	$24,$6
729	 xor	$8,$21
730	sll	$30,$2,30
731	and	$25,$2
732	 srl	$6,$8,31
733	 addu	$8,$8
734	srl	$2,$2,2
735	xor	$25,$7
736	 or	$8,$6
737	addu	$24,$23
738	or	$2,$30
739	addu	$24,$25
740#endif
741#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
742	addu	$7,$31		# 16
743	 xor	$9,$11
744	xor	$25,$2,$3
745	rotr	$6,$24,27
746	 xor	$9,$17
747	and	$25,$1
748	addu	$7,$6
749	 xor	$9,$22
750	xor	$25,$3
751	addu	$7,$8
752	 rotr	$9,$9,31
753	rotr	$1,$1,2
754	addu	$7,$25
755#else
756	 xor	$9,$11
757	sll	$25,$24,5	# 16
758	addu	$7,$31
759	srl	$6,$24,27
760	addu	$7,$25
761	 xor	$9,$17
762	xor	$25,$2,$3
763	addu	$7,$6
764	 xor	$9,$22
765	sll	$30,$1,30
766	and	$25,$1
767	 srl	$6,$9,31
768	 addu	$9,$9
769	srl	$1,$1,2
770	xor	$25,$3
771	 or	$9,$6
772	addu	$7,$8
773	or	$1,$30
774	addu	$7,$25
775#endif
776#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
777	addu	$3,$31		# 17
778	 xor	$10,$12
779	xor	$25,$1,$2
780	rotr	$6,$7,27
781	 xor	$10,$18
782	and	$25,$24
783	addu	$3,$6
784	 xor	$10,$23
785	xor	$25,$2
786	addu	$3,$9
787	 rotr	$10,$10,31
788	rotr	$24,$24,2
789	addu	$3,$25
790#else
791	 xor	$10,$12
792	sll	$25,$7,5	# 17
793	addu	$3,$31
794	srl	$6,$7,27
795	addu	$3,$25
796	 xor	$10,$18
797	xor	$25,$1,$2
798	addu	$3,$6
799	 xor	$10,$23
800	sll	$30,$24,30
801	and	$25,$24
802	 srl	$6,$10,31
803	 addu	$10,$10
804	srl	$24,$24,2
805	xor	$25,$2
806	 or	$10,$6
807	addu	$3,$9
808	or	$24,$30
809	addu	$3,$25
810#endif
811#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
812	addu	$2,$31		# 18
813	 xor	$11,$13
814	xor	$25,$24,$1
815	rotr	$6,$3,27
816	 xor	$11,$19
817	and	$25,$7
818	addu	$2,$6
819	 xor	$11,$8
820	xor	$25,$1
821	addu	$2,$10
822	 rotr	$11,$11,31
823	rotr	$7,$7,2
824	addu	$2,$25
825#else
826	 xor	$11,$13
827	sll	$25,$3,5	# 18
828	addu	$2,$31
829	srl	$6,$3,27
830	addu	$2,$25
831	 xor	$11,$19
832	xor	$25,$24,$1
833	addu	$2,$6
834	 xor	$11,$8
835	sll	$30,$7,30
836	and	$25,$7
837	 srl	$6,$11,31
838	 addu	$11,$11
839	srl	$7,$7,2
840	xor	$25,$1
841	 or	$11,$6
842	addu	$2,$10
843	or	$7,$30
844	addu	$2,$25
845#endif
846#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
847	addu	$1,$31		# 19
848	 xor	$12,$14
849	xor	$25,$7,$24
850	rotr	$6,$2,27
851	 xor	$12,$20
852	and	$25,$3
853	addu	$1,$6
854	 xor	$12,$9
855	xor	$25,$24
856	addu	$1,$11
857	 rotr	$12,$12,31
858	rotr	$3,$3,2
859	addu	$1,$25
860#else
861	 xor	$12,$14
862	sll	$25,$2,5	# 19
863	addu	$1,$31
864	srl	$6,$2,27
865	addu	$1,$25
866	 xor	$12,$20
867	xor	$25,$7,$24
868	addu	$1,$6
869	 xor	$12,$9
870	sll	$30,$3,30
871	and	$25,$3
872	 srl	$6,$12,31
873	 addu	$12,$12
874	srl	$3,$3,2
875	xor	$25,$24
876	 or	$12,$6
877	addu	$1,$11
878	or	$3,$30
879	addu	$1,$25
880#endif
881	lui	$31,0x6ed9
882	ori	$31,0xeba1	# K_20_39
883#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
884	 xor	$13,$15
885	addu	$24,$31		# 20
886	rotr	$6,$1,27
887	 xor	$13,$21
888	xor	$25,$3,$7
889	addu	$24,$6
890	 xor	$13,$10
891	xor	$25,$2
892	addu	$24,$12
893	 rotr	$13,$13,31
894	rotr	$2,$2,2
895	addu	$24,$25
896#else
897	 xor	$13,$15
898	sll	$25,$1,5	# 20
899	addu	$24,$31
900	srl	$6,$1,27
901	addu	$24,$25
902	 xor	$13,$21
903	xor	$25,$3,$7
904	addu	$24,$6
905	 xor	$13,$10
906	sll	$30,$2,30
907	xor	$25,$2
908	 srl	$6,$13,31
909	 addu	$13,$13
910	srl	$2,$2,2
911	addu	$24,$12
912	 or	$13,$6
913	or	$2,$30
914	addu	$24,$25
915#endif
916#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
917	 xor	$14,$16
918	addu	$7,$31		# 21
919	rotr	$6,$24,27
920	 xor	$14,$22
921	xor	$25,$2,$3
922	addu	$7,$6
923	 xor	$14,$11
924	xor	$25,$1
925	addu	$7,$13
926	 rotr	$14,$14,31
927	rotr	$1,$1,2
928	addu	$7,$25
929#else
930	 xor	$14,$16
931	sll	$25,$24,5	# 21
932	addu	$7,$31
933	srl	$6,$24,27
934	addu	$7,$25
935	 xor	$14,$22
936	xor	$25,$2,$3
937	addu	$7,$6
938	 xor	$14,$11
939	sll	$30,$1,30
940	xor	$25,$1
941	 srl	$6,$14,31
942	 addu	$14,$14
943	srl	$1,$1,2
944	addu	$7,$13
945	 or	$14,$6
946	or	$1,$30
947	addu	$7,$25
948#endif
949#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
950	 xor	$15,$17
951	addu	$3,$31		# 22
952	rotr	$6,$7,27
953	 xor	$15,$23
954	xor	$25,$1,$2
955	addu	$3,$6
956	 xor	$15,$12
957	xor	$25,$24
958	addu	$3,$14
959	 rotr	$15,$15,31
960	rotr	$24,$24,2
961	addu	$3,$25
962#else
963	 xor	$15,$17
964	sll	$25,$7,5	# 22
965	addu	$3,$31
966	srl	$6,$7,27
967	addu	$3,$25
968	 xor	$15,$23
969	xor	$25,$1,$2
970	addu	$3,$6
971	 xor	$15,$12
972	sll	$30,$24,30
973	xor	$25,$24
974	 srl	$6,$15,31
975	 addu	$15,$15
976	srl	$24,$24,2
977	addu	$3,$14
978	 or	$15,$6
979	or	$24,$30
980	addu	$3,$25
981#endif
982#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
983	 xor	$16,$18
984	addu	$2,$31		# 23
985	rotr	$6,$3,27
986	 xor	$16,$8
987	xor	$25,$24,$1
988	addu	$2,$6
989	 xor	$16,$13
990	xor	$25,$7
991	addu	$2,$15
992	 rotr	$16,$16,31
993	rotr	$7,$7,2
994	addu	$2,$25
995#else
996	 xor	$16,$18
997	sll	$25,$3,5	# 23
998	addu	$2,$31
999	srl	$6,$3,27
1000	addu	$2,$25
1001	 xor	$16,$8
1002	xor	$25,$24,$1
1003	addu	$2,$6
1004	 xor	$16,$13
1005	sll	$30,$7,30
1006	xor	$25,$7
1007	 srl	$6,$16,31
1008	 addu	$16,$16
1009	srl	$7,$7,2
1010	addu	$2,$15
1011	 or	$16,$6
1012	or	$7,$30
1013	addu	$2,$25
1014#endif
1015#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1016	 xor	$17,$19
1017	addu	$1,$31		# 24
1018	rotr	$6,$2,27
1019	 xor	$17,$9
1020	xor	$25,$7,$24
1021	addu	$1,$6
1022	 xor	$17,$14
1023	xor	$25,$3
1024	addu	$1,$16
1025	 rotr	$17,$17,31
1026	rotr	$3,$3,2
1027	addu	$1,$25
1028#else
1029	 xor	$17,$19
1030	sll	$25,$2,5	# 24
1031	addu	$1,$31
1032	srl	$6,$2,27
1033	addu	$1,$25
1034	 xor	$17,$9
1035	xor	$25,$7,$24
1036	addu	$1,$6
1037	 xor	$17,$14
1038	sll	$30,$3,30
1039	xor	$25,$3
1040	 srl	$6,$17,31
1041	 addu	$17,$17
1042	srl	$3,$3,2
1043	addu	$1,$16
1044	 or	$17,$6
1045	or	$3,$30
1046	addu	$1,$25
1047#endif
1048#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1049	 xor	$18,$20
1050	addu	$24,$31		# 25
1051	rotr	$6,$1,27
1052	 xor	$18,$10
1053	xor	$25,$3,$7
1054	addu	$24,$6
1055	 xor	$18,$15
1056	xor	$25,$2
1057	addu	$24,$17
1058	 rotr	$18,$18,31
1059	rotr	$2,$2,2
1060	addu	$24,$25
1061#else
1062	 xor	$18,$20
1063	sll	$25,$1,5	# 25
1064	addu	$24,$31
1065	srl	$6,$1,27
1066	addu	$24,$25
1067	 xor	$18,$10
1068	xor	$25,$3,$7
1069	addu	$24,$6
1070	 xor	$18,$15
1071	sll	$30,$2,30
1072	xor	$25,$2
1073	 srl	$6,$18,31
1074	 addu	$18,$18
1075	srl	$2,$2,2
1076	addu	$24,$17
1077	 or	$18,$6
1078	or	$2,$30
1079	addu	$24,$25
1080#endif
1081#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1082	 xor	$19,$21
1083	addu	$7,$31		# 26
1084	rotr	$6,$24,27
1085	 xor	$19,$11
1086	xor	$25,$2,$3
1087	addu	$7,$6
1088	 xor	$19,$16
1089	xor	$25,$1
1090	addu	$7,$18
1091	 rotr	$19,$19,31
1092	rotr	$1,$1,2
1093	addu	$7,$25
1094#else
1095	 xor	$19,$21
1096	sll	$25,$24,5	# 26
1097	addu	$7,$31
1098	srl	$6,$24,27
1099	addu	$7,$25
1100	 xor	$19,$11
1101	xor	$25,$2,$3
1102	addu	$7,$6
1103	 xor	$19,$16
1104	sll	$30,$1,30
1105	xor	$25,$1
1106	 srl	$6,$19,31
1107	 addu	$19,$19
1108	srl	$1,$1,2
1109	addu	$7,$18
1110	 or	$19,$6
1111	or	$1,$30
1112	addu	$7,$25
1113#endif
1114#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1115	 xor	$20,$22
1116	addu	$3,$31		# 27
1117	rotr	$6,$7,27
1118	 xor	$20,$12
1119	xor	$25,$1,$2
1120	addu	$3,$6
1121	 xor	$20,$17
1122	xor	$25,$24
1123	addu	$3,$19
1124	 rotr	$20,$20,31
1125	rotr	$24,$24,2
1126	addu	$3,$25
1127#else
1128	 xor	$20,$22
1129	sll	$25,$7,5	# 27
1130	addu	$3,$31
1131	srl	$6,$7,27
1132	addu	$3,$25
1133	 xor	$20,$12
1134	xor	$25,$1,$2
1135	addu	$3,$6
1136	 xor	$20,$17
1137	sll	$30,$24,30
1138	xor	$25,$24
1139	 srl	$6,$20,31
1140	 addu	$20,$20
1141	srl	$24,$24,2
1142	addu	$3,$19
1143	 or	$20,$6
1144	or	$24,$30
1145	addu	$3,$25
1146#endif
1147#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1148	 xor	$21,$23
1149	addu	$2,$31		# 28
1150	rotr	$6,$3,27
1151	 xor	$21,$13
1152	xor	$25,$24,$1
1153	addu	$2,$6
1154	 xor	$21,$18
1155	xor	$25,$7
1156	addu	$2,$20
1157	 rotr	$21,$21,31
1158	rotr	$7,$7,2
1159	addu	$2,$25
1160#else
1161	 xor	$21,$23
1162	sll	$25,$3,5	# 28
1163	addu	$2,$31
1164	srl	$6,$3,27
1165	addu	$2,$25
1166	 xor	$21,$13
1167	xor	$25,$24,$1
1168	addu	$2,$6
1169	 xor	$21,$18
1170	sll	$30,$7,30
1171	xor	$25,$7
1172	 srl	$6,$21,31
1173	 addu	$21,$21
1174	srl	$7,$7,2
1175	addu	$2,$20
1176	 or	$21,$6
1177	or	$7,$30
1178	addu	$2,$25
1179#endif
1180#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1181	 xor	$22,$8
1182	addu	$1,$31		# 29
1183	rotr	$6,$2,27
1184	 xor	$22,$14
1185	xor	$25,$7,$24
1186	addu	$1,$6
1187	 xor	$22,$19
1188	xor	$25,$3
1189	addu	$1,$21
1190	 rotr	$22,$22,31
1191	rotr	$3,$3,2
1192	addu	$1,$25
1193#else
1194	 xor	$22,$8
1195	sll	$25,$2,5	# 29
1196	addu	$1,$31
1197	srl	$6,$2,27
1198	addu	$1,$25
1199	 xor	$22,$14
1200	xor	$25,$7,$24
1201	addu	$1,$6
1202	 xor	$22,$19
1203	sll	$30,$3,30
1204	xor	$25,$3
1205	 srl	$6,$22,31
1206	 addu	$22,$22
1207	srl	$3,$3,2
1208	addu	$1,$21
1209	 or	$22,$6
1210	or	$3,$30
1211	addu	$1,$25
1212#endif
1213#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1214	 xor	$23,$9
1215	addu	$24,$31		# 30
1216	rotr	$6,$1,27
1217	 xor	$23,$15
1218	xor	$25,$3,$7
1219	addu	$24,$6
1220	 xor	$23,$20
1221	xor	$25,$2
1222	addu	$24,$22
1223	 rotr	$23,$23,31
1224	rotr	$2,$2,2
1225	addu	$24,$25
1226#else
1227	 xor	$23,$9
1228	sll	$25,$1,5	# 30
1229	addu	$24,$31
1230	srl	$6,$1,27
1231	addu	$24,$25
1232	 xor	$23,$15
1233	xor	$25,$3,$7
1234	addu	$24,$6
1235	 xor	$23,$20
1236	sll	$30,$2,30
1237	xor	$25,$2
1238	 srl	$6,$23,31
1239	 addu	$23,$23
1240	srl	$2,$2,2
1241	addu	$24,$22
1242	 or	$23,$6
1243	or	$2,$30
1244	addu	$24,$25
1245#endif
1246#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1247	 xor	$8,$10
1248	addu	$7,$31		# 31
1249	rotr	$6,$24,27
1250	 xor	$8,$16
1251	xor	$25,$2,$3
1252	addu	$7,$6
1253	 xor	$8,$21
1254	xor	$25,$1
1255	addu	$7,$23
1256	 rotr	$8,$8,31
1257	rotr	$1,$1,2
1258	addu	$7,$25
1259#else
1260	 xor	$8,$10
1261	sll	$25,$24,5	# 31
1262	addu	$7,$31
1263	srl	$6,$24,27
1264	addu	$7,$25
1265	 xor	$8,$16
1266	xor	$25,$2,$3
1267	addu	$7,$6
1268	 xor	$8,$21
1269	sll	$30,$1,30
1270	xor	$25,$1
1271	 srl	$6,$8,31
1272	 addu	$8,$8
1273	srl	$1,$1,2
1274	addu	$7,$23
1275	 or	$8,$6
1276	or	$1,$30
1277	addu	$7,$25
1278#endif
1279#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1280	 xor	$9,$11
1281	addu	$3,$31		# 32
1282	rotr	$6,$7,27
1283	 xor	$9,$17
1284	xor	$25,$1,$2
1285	addu	$3,$6
1286	 xor	$9,$22
1287	xor	$25,$24
1288	addu	$3,$8
1289	 rotr	$9,$9,31
1290	rotr	$24,$24,2
1291	addu	$3,$25
1292#else
1293	 xor	$9,$11
1294	sll	$25,$7,5	# 32
1295	addu	$3,$31
1296	srl	$6,$7,27
1297	addu	$3,$25
1298	 xor	$9,$17
1299	xor	$25,$1,$2
1300	addu	$3,$6
1301	 xor	$9,$22
1302	sll	$30,$24,30
1303	xor	$25,$24
1304	 srl	$6,$9,31
1305	 addu	$9,$9
1306	srl	$24,$24,2
1307	addu	$3,$8
1308	 or	$9,$6
1309	or	$24,$30
1310	addu	$3,$25
1311#endif
1312#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1313	 xor	$10,$12
1314	addu	$2,$31		# 33
1315	rotr	$6,$3,27
1316	 xor	$10,$18
1317	xor	$25,$24,$1
1318	addu	$2,$6
1319	 xor	$10,$23
1320	xor	$25,$7
1321	addu	$2,$9
1322	 rotr	$10,$10,31
1323	rotr	$7,$7,2
1324	addu	$2,$25
1325#else
1326	 xor	$10,$12
1327	sll	$25,$3,5	# 33
1328	addu	$2,$31
1329	srl	$6,$3,27
1330	addu	$2,$25
1331	 xor	$10,$18
1332	xor	$25,$24,$1
1333	addu	$2,$6
1334	 xor	$10,$23
1335	sll	$30,$7,30
1336	xor	$25,$7
1337	 srl	$6,$10,31
1338	 addu	$10,$10
1339	srl	$7,$7,2
1340	addu	$2,$9
1341	 or	$10,$6
1342	or	$7,$30
1343	addu	$2,$25
1344#endif
1345#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1346	 xor	$11,$13
1347	addu	$1,$31		# 34
1348	rotr	$6,$2,27
1349	 xor	$11,$19
1350	xor	$25,$7,$24
1351	addu	$1,$6
1352	 xor	$11,$8
1353	xor	$25,$3
1354	addu	$1,$10
1355	 rotr	$11,$11,31
1356	rotr	$3,$3,2
1357	addu	$1,$25
1358#else
1359	 xor	$11,$13
1360	sll	$25,$2,5	# 34
1361	addu	$1,$31
1362	srl	$6,$2,27
1363	addu	$1,$25
1364	 xor	$11,$19
1365	xor	$25,$7,$24
1366	addu	$1,$6
1367	 xor	$11,$8
1368	sll	$30,$3,30
1369	xor	$25,$3
1370	 srl	$6,$11,31
1371	 addu	$11,$11
1372	srl	$3,$3,2
1373	addu	$1,$10
1374	 or	$11,$6
1375	or	$3,$30
1376	addu	$1,$25
1377#endif
1378#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1379	 xor	$12,$14
1380	addu	$24,$31		# 35
1381	rotr	$6,$1,27
1382	 xor	$12,$20
1383	xor	$25,$3,$7
1384	addu	$24,$6
1385	 xor	$12,$9
1386	xor	$25,$2
1387	addu	$24,$11
1388	 rotr	$12,$12,31
1389	rotr	$2,$2,2
1390	addu	$24,$25
1391#else
1392	 xor	$12,$14
1393	sll	$25,$1,5	# 35
1394	addu	$24,$31
1395	srl	$6,$1,27
1396	addu	$24,$25
1397	 xor	$12,$20
1398	xor	$25,$3,$7
1399	addu	$24,$6
1400	 xor	$12,$9
1401	sll	$30,$2,30
1402	xor	$25,$2
1403	 srl	$6,$12,31
1404	 addu	$12,$12
1405	srl	$2,$2,2
1406	addu	$24,$11
1407	 or	$12,$6
1408	or	$2,$30
1409	addu	$24,$25
1410#endif
1411#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1412	 xor	$13,$15
1413	addu	$7,$31		# 36
1414	rotr	$6,$24,27
1415	 xor	$13,$21
1416	xor	$25,$2,$3
1417	addu	$7,$6
1418	 xor	$13,$10
1419	xor	$25,$1
1420	addu	$7,$12
1421	 rotr	$13,$13,31
1422	rotr	$1,$1,2
1423	addu	$7,$25
1424#else
1425	 xor	$13,$15
1426	sll	$25,$24,5	# 36
1427	addu	$7,$31
1428	srl	$6,$24,27
1429	addu	$7,$25
1430	 xor	$13,$21
1431	xor	$25,$2,$3
1432	addu	$7,$6
1433	 xor	$13,$10
1434	sll	$30,$1,30
1435	xor	$25,$1
1436	 srl	$6,$13,31
1437	 addu	$13,$13
1438	srl	$1,$1,2
1439	addu	$7,$12
1440	 or	$13,$6
1441	or	$1,$30
1442	addu	$7,$25
1443#endif
1444#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1445	 xor	$14,$16
1446	addu	$3,$31		# 37
1447	rotr	$6,$7,27
1448	 xor	$14,$22
1449	xor	$25,$1,$2
1450	addu	$3,$6
1451	 xor	$14,$11
1452	xor	$25,$24
1453	addu	$3,$13
1454	 rotr	$14,$14,31
1455	rotr	$24,$24,2
1456	addu	$3,$25
1457#else
1458	 xor	$14,$16
1459	sll	$25,$7,5	# 37
1460	addu	$3,$31
1461	srl	$6,$7,27
1462	addu	$3,$25
1463	 xor	$14,$22
1464	xor	$25,$1,$2
1465	addu	$3,$6
1466	 xor	$14,$11
1467	sll	$30,$24,30
1468	xor	$25,$24
1469	 srl	$6,$14,31
1470	 addu	$14,$14
1471	srl	$24,$24,2
1472	addu	$3,$13
1473	 or	$14,$6
1474	or	$24,$30
1475	addu	$3,$25
1476#endif
1477#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1478	 xor	$15,$17
1479	addu	$2,$31		# 38
1480	rotr	$6,$3,27
1481	 xor	$15,$23
1482	xor	$25,$24,$1
1483	addu	$2,$6
1484	 xor	$15,$12
1485	xor	$25,$7
1486	addu	$2,$14
1487	 rotr	$15,$15,31
1488	rotr	$7,$7,2
1489	addu	$2,$25
1490#else
1491	 xor	$15,$17
1492	sll	$25,$3,5	# 38
1493	addu	$2,$31
1494	srl	$6,$3,27
1495	addu	$2,$25
1496	 xor	$15,$23
1497	xor	$25,$24,$1
1498	addu	$2,$6
1499	 xor	$15,$12
1500	sll	$30,$7,30
1501	xor	$25,$7
1502	 srl	$6,$15,31
1503	 addu	$15,$15
1504	srl	$7,$7,2
1505	addu	$2,$14
1506	 or	$15,$6
1507	or	$7,$30
1508	addu	$2,$25
1509#endif
1510#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1511	 xor	$16,$18
1512	addu	$1,$31		# 39
1513	rotr	$6,$2,27
1514	 xor	$16,$8
1515	xor	$25,$7,$24
1516	addu	$1,$6
1517	 xor	$16,$13
1518	xor	$25,$3
1519	addu	$1,$15
1520	 rotr	$16,$16,31
1521	rotr	$3,$3,2
1522	addu	$1,$25
1523#else
1524	 xor	$16,$18
1525	sll	$25,$2,5	# 39
1526	addu	$1,$31
1527	srl	$6,$2,27
1528	addu	$1,$25
1529	 xor	$16,$8
1530	xor	$25,$7,$24
1531	addu	$1,$6
1532	 xor	$16,$13
1533	sll	$30,$3,30
1534	xor	$25,$3
1535	 srl	$6,$16,31
1536	 addu	$16,$16
1537	srl	$3,$3,2
1538	addu	$1,$15
1539	 or	$16,$6
1540	or	$3,$30
1541	addu	$1,$25
1542#endif
1543	lui	$31,0x8f1b
1544	ori	$31,0xbcdc	# K_40_59
1545#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1546	addu	$24,$31		# 40
1547	and	$25,$3,$7
1548	 xor	$17,$19
1549	rotr	$6,$1,27
1550	addu	$24,$25
1551	 xor	$17,$9
1552	xor	$25,$3,$7
1553	addu	$24,$6
1554	 xor	$17,$14
1555	and	$25,$2
1556	addu	$24,$16
1557	 rotr	$17,$17,31
1558	rotr	$2,$2,2
1559	addu	$24,$25
1560#else
1561	 xor	$17,$19
1562	sll	$25,$1,5	# 40
1563	addu	$24,$31
1564	srl	$6,$1,27
1565	addu	$24,$25
1566	 xor	$17,$9
1567	and	$25,$3,$7
1568	addu	$24,$6
1569	 xor	$17,$14
1570	sll	$30,$2,30
1571	addu	$24,$25
1572	 srl	$6,$17,31
1573	xor	$25,$3,$7
1574	 addu	$17,$17
1575	and	$25,$2
1576	srl	$2,$2,2
1577	 or	$17,$6
1578	addu	$24,$16
1579	or	$2,$30
1580	addu	$24,$25
1581#endif
1582#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1583	addu	$7,$31		# 41
1584	and	$25,$2,$3
1585	 xor	$18,$20
1586	rotr	$6,$24,27
1587	addu	$7,$25
1588	 xor	$18,$10
1589	xor	$25,$2,$3
1590	addu	$7,$6
1591	 xor	$18,$15
1592	and	$25,$1
1593	addu	$7,$17
1594	 rotr	$18,$18,31
1595	rotr	$1,$1,2
1596	addu	$7,$25
1597#else
1598	 xor	$18,$20
1599	sll	$25,$24,5	# 41
1600	addu	$7,$31
1601	srl	$6,$24,27
1602	addu	$7,$25
1603	 xor	$18,$10
1604	and	$25,$2,$3
1605	addu	$7,$6
1606	 xor	$18,$15
1607	sll	$30,$1,30
1608	addu	$7,$25
1609	 srl	$6,$18,31
1610	xor	$25,$2,$3
1611	 addu	$18,$18
1612	and	$25,$1
1613	srl	$1,$1,2
1614	 or	$18,$6
1615	addu	$7,$17
1616	or	$1,$30
1617	addu	$7,$25
1618#endif
1619#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1620	addu	$3,$31		# 42
1621	and	$25,$1,$2
1622	 xor	$19,$21
1623	rotr	$6,$7,27
1624	addu	$3,$25
1625	 xor	$19,$11
1626	xor	$25,$1,$2
1627	addu	$3,$6
1628	 xor	$19,$16
1629	and	$25,$24
1630	addu	$3,$18
1631	 rotr	$19,$19,31
1632	rotr	$24,$24,2
1633	addu	$3,$25
1634#else
1635	 xor	$19,$21
1636	sll	$25,$7,5	# 42
1637	addu	$3,$31
1638	srl	$6,$7,27
1639	addu	$3,$25
1640	 xor	$19,$11
1641	and	$25,$1,$2
1642	addu	$3,$6
1643	 xor	$19,$16
1644	sll	$30,$24,30
1645	addu	$3,$25
1646	 srl	$6,$19,31
1647	xor	$25,$1,$2
1648	 addu	$19,$19
1649	and	$25,$24
1650	srl	$24,$24,2
1651	 or	$19,$6
1652	addu	$3,$18
1653	or	$24,$30
1654	addu	$3,$25
1655#endif
1656#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1657	addu	$2,$31		# 43
1658	and	$25,$24,$1
1659	 xor	$20,$22
1660	rotr	$6,$3,27
1661	addu	$2,$25
1662	 xor	$20,$12
1663	xor	$25,$24,$1
1664	addu	$2,$6
1665	 xor	$20,$17
1666	and	$25,$7
1667	addu	$2,$19
1668	 rotr	$20,$20,31
1669	rotr	$7,$7,2
1670	addu	$2,$25
1671#else
1672	 xor	$20,$22
1673	sll	$25,$3,5	# 43
1674	addu	$2,$31
1675	srl	$6,$3,27
1676	addu	$2,$25
1677	 xor	$20,$12
1678	and	$25,$24,$1
1679	addu	$2,$6
1680	 xor	$20,$17
1681	sll	$30,$7,30
1682	addu	$2,$25
1683	 srl	$6,$20,31
1684	xor	$25,$24,$1
1685	 addu	$20,$20
1686	and	$25,$7
1687	srl	$7,$7,2
1688	 or	$20,$6
1689	addu	$2,$19
1690	or	$7,$30
1691	addu	$2,$25
1692#endif
1693#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1694	addu	$1,$31		# 44
1695	and	$25,$7,$24
1696	 xor	$21,$23
1697	rotr	$6,$2,27
1698	addu	$1,$25
1699	 xor	$21,$13
1700	xor	$25,$7,$24
1701	addu	$1,$6
1702	 xor	$21,$18
1703	and	$25,$3
1704	addu	$1,$20
1705	 rotr	$21,$21,31
1706	rotr	$3,$3,2
1707	addu	$1,$25
1708#else
1709	 xor	$21,$23
1710	sll	$25,$2,5	# 44
1711	addu	$1,$31
1712	srl	$6,$2,27
1713	addu	$1,$25
1714	 xor	$21,$13
1715	and	$25,$7,$24
1716	addu	$1,$6
1717	 xor	$21,$18
1718	sll	$30,$3,30
1719	addu	$1,$25
1720	 srl	$6,$21,31
1721	xor	$25,$7,$24
1722	 addu	$21,$21
1723	and	$25,$3
1724	srl	$3,$3,2
1725	 or	$21,$6
1726	addu	$1,$20
1727	or	$3,$30
1728	addu	$1,$25
1729#endif
1730#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1731	addu	$24,$31		# 45
1732	and	$25,$3,$7
1733	 xor	$22,$8
1734	rotr	$6,$1,27
1735	addu	$24,$25
1736	 xor	$22,$14
1737	xor	$25,$3,$7
1738	addu	$24,$6
1739	 xor	$22,$19
1740	and	$25,$2
1741	addu	$24,$21
1742	 rotr	$22,$22,31
1743	rotr	$2,$2,2
1744	addu	$24,$25
1745#else
1746	 xor	$22,$8
1747	sll	$25,$1,5	# 45
1748	addu	$24,$31
1749	srl	$6,$1,27
1750	addu	$24,$25
1751	 xor	$22,$14
1752	and	$25,$3,$7
1753	addu	$24,$6
1754	 xor	$22,$19
1755	sll	$30,$2,30
1756	addu	$24,$25
1757	 srl	$6,$22,31
1758	xor	$25,$3,$7
1759	 addu	$22,$22
1760	and	$25,$2
1761	srl	$2,$2,2
1762	 or	$22,$6
1763	addu	$24,$21
1764	or	$2,$30
1765	addu	$24,$25
1766#endif
1767#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1768	addu	$7,$31		# 46
1769	and	$25,$2,$3
1770	 xor	$23,$9
1771	rotr	$6,$24,27
1772	addu	$7,$25
1773	 xor	$23,$15
1774	xor	$25,$2,$3
1775	addu	$7,$6
1776	 xor	$23,$20
1777	and	$25,$1
1778	addu	$7,$22
1779	 rotr	$23,$23,31
1780	rotr	$1,$1,2
1781	addu	$7,$25
1782#else
1783	 xor	$23,$9
1784	sll	$25,$24,5	# 46
1785	addu	$7,$31
1786	srl	$6,$24,27
1787	addu	$7,$25
1788	 xor	$23,$15
1789	and	$25,$2,$3
1790	addu	$7,$6
1791	 xor	$23,$20
1792	sll	$30,$1,30
1793	addu	$7,$25
1794	 srl	$6,$23,31
1795	xor	$25,$2,$3
1796	 addu	$23,$23
1797	and	$25,$1
1798	srl	$1,$1,2
1799	 or	$23,$6
1800	addu	$7,$22
1801	or	$1,$30
1802	addu	$7,$25
1803#endif
1804#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1805	addu	$3,$31		# 47
1806	and	$25,$1,$2
1807	 xor	$8,$10
1808	rotr	$6,$7,27
1809	addu	$3,$25
1810	 xor	$8,$16
1811	xor	$25,$1,$2
1812	addu	$3,$6
1813	 xor	$8,$21
1814	and	$25,$24
1815	addu	$3,$23
1816	 rotr	$8,$8,31
1817	rotr	$24,$24,2
1818	addu	$3,$25
1819#else
1820	 xor	$8,$10
1821	sll	$25,$7,5	# 47
1822	addu	$3,$31
1823	srl	$6,$7,27
1824	addu	$3,$25
1825	 xor	$8,$16
1826	and	$25,$1,$2
1827	addu	$3,$6
1828	 xor	$8,$21
1829	sll	$30,$24,30
1830	addu	$3,$25
1831	 srl	$6,$8,31
1832	xor	$25,$1,$2
1833	 addu	$8,$8
1834	and	$25,$24
1835	srl	$24,$24,2
1836	 or	$8,$6
1837	addu	$3,$23
1838	or	$24,$30
1839	addu	$3,$25
1840#endif
1841#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1842	addu	$2,$31		# 48
1843	and	$25,$24,$1
1844	 xor	$9,$11
1845	rotr	$6,$3,27
1846	addu	$2,$25
1847	 xor	$9,$17
1848	xor	$25,$24,$1
1849	addu	$2,$6
1850	 xor	$9,$22
1851	and	$25,$7
1852	addu	$2,$8
1853	 rotr	$9,$9,31
1854	rotr	$7,$7,2
1855	addu	$2,$25
1856#else
1857	 xor	$9,$11
1858	sll	$25,$3,5	# 48
1859	addu	$2,$31
1860	srl	$6,$3,27
1861	addu	$2,$25
1862	 xor	$9,$17
1863	and	$25,$24,$1
1864	addu	$2,$6
1865	 xor	$9,$22
1866	sll	$30,$7,30
1867	addu	$2,$25
1868	 srl	$6,$9,31
1869	xor	$25,$24,$1
1870	 addu	$9,$9
1871	and	$25,$7
1872	srl	$7,$7,2
1873	 or	$9,$6
1874	addu	$2,$8
1875	or	$7,$30
1876	addu	$2,$25
1877#endif
1878#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1879	addu	$1,$31		# 49
1880	and	$25,$7,$24
1881	 xor	$10,$12
1882	rotr	$6,$2,27
1883	addu	$1,$25
1884	 xor	$10,$18
1885	xor	$25,$7,$24
1886	addu	$1,$6
1887	 xor	$10,$23
1888	and	$25,$3
1889	addu	$1,$9
1890	 rotr	$10,$10,31
1891	rotr	$3,$3,2
1892	addu	$1,$25
1893#else
1894	 xor	$10,$12
1895	sll	$25,$2,5	# 49
1896	addu	$1,$31
1897	srl	$6,$2,27
1898	addu	$1,$25
1899	 xor	$10,$18
1900	and	$25,$7,$24
1901	addu	$1,$6
1902	 xor	$10,$23
1903	sll	$30,$3,30
1904	addu	$1,$25
1905	 srl	$6,$10,31
1906	xor	$25,$7,$24
1907	 addu	$10,$10
1908	and	$25,$3
1909	srl	$3,$3,2
1910	 or	$10,$6
1911	addu	$1,$9
1912	or	$3,$30
1913	addu	$1,$25
1914#endif
1915#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1916	addu	$24,$31		# 50
1917	and	$25,$3,$7
1918	 xor	$11,$13
1919	rotr	$6,$1,27
1920	addu	$24,$25
1921	 xor	$11,$19
1922	xor	$25,$3,$7
1923	addu	$24,$6
1924	 xor	$11,$8
1925	and	$25,$2
1926	addu	$24,$10
1927	 rotr	$11,$11,31
1928	rotr	$2,$2,2
1929	addu	$24,$25
1930#else
1931	 xor	$11,$13
1932	sll	$25,$1,5	# 50
1933	addu	$24,$31
1934	srl	$6,$1,27
1935	addu	$24,$25
1936	 xor	$11,$19
1937	and	$25,$3,$7
1938	addu	$24,$6
1939	 xor	$11,$8
1940	sll	$30,$2,30
1941	addu	$24,$25
1942	 srl	$6,$11,31
1943	xor	$25,$3,$7
1944	 addu	$11,$11
1945	and	$25,$2
1946	srl	$2,$2,2
1947	 or	$11,$6
1948	addu	$24,$10
1949	or	$2,$30
1950	addu	$24,$25
1951#endif
1952#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1953	addu	$7,$31		# 51
1954	and	$25,$2,$3
1955	 xor	$12,$14
1956	rotr	$6,$24,27
1957	addu	$7,$25
1958	 xor	$12,$20
1959	xor	$25,$2,$3
1960	addu	$7,$6
1961	 xor	$12,$9
1962	and	$25,$1
1963	addu	$7,$11
1964	 rotr	$12,$12,31
1965	rotr	$1,$1,2
1966	addu	$7,$25
1967#else
1968	 xor	$12,$14
1969	sll	$25,$24,5	# 51
1970	addu	$7,$31
1971	srl	$6,$24,27
1972	addu	$7,$25
1973	 xor	$12,$20
1974	and	$25,$2,$3
1975	addu	$7,$6
1976	 xor	$12,$9
1977	sll	$30,$1,30
1978	addu	$7,$25
1979	 srl	$6,$12,31
1980	xor	$25,$2,$3
1981	 addu	$12,$12
1982	and	$25,$1
1983	srl	$1,$1,2
1984	 or	$12,$6
1985	addu	$7,$11
1986	or	$1,$30
1987	addu	$7,$25
1988#endif
1989#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
1990	addu	$3,$31		# 52
1991	and	$25,$1,$2
1992	 xor	$13,$15
1993	rotr	$6,$7,27
1994	addu	$3,$25
1995	 xor	$13,$21
1996	xor	$25,$1,$2
1997	addu	$3,$6
1998	 xor	$13,$10
1999	and	$25,$24
2000	addu	$3,$12
2001	 rotr	$13,$13,31
2002	rotr	$24,$24,2
2003	addu	$3,$25
2004#else
2005	 xor	$13,$15
2006	sll	$25,$7,5	# 52
2007	addu	$3,$31
2008	srl	$6,$7,27
2009	addu	$3,$25
2010	 xor	$13,$21
2011	and	$25,$1,$2
2012	addu	$3,$6
2013	 xor	$13,$10
2014	sll	$30,$24,30
2015	addu	$3,$25
2016	 srl	$6,$13,31
2017	xor	$25,$1,$2
2018	 addu	$13,$13
2019	and	$25,$24
2020	srl	$24,$24,2
2021	 or	$13,$6
2022	addu	$3,$12
2023	or	$24,$30
2024	addu	$3,$25
2025#endif
2026#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2027	addu	$2,$31		# 53
2028	and	$25,$24,$1
2029	 xor	$14,$16
2030	rotr	$6,$3,27
2031	addu	$2,$25
2032	 xor	$14,$22
2033	xor	$25,$24,$1
2034	addu	$2,$6
2035	 xor	$14,$11
2036	and	$25,$7
2037	addu	$2,$13
2038	 rotr	$14,$14,31
2039	rotr	$7,$7,2
2040	addu	$2,$25
2041#else
2042	 xor	$14,$16
2043	sll	$25,$3,5	# 53
2044	addu	$2,$31
2045	srl	$6,$3,27
2046	addu	$2,$25
2047	 xor	$14,$22
2048	and	$25,$24,$1
2049	addu	$2,$6
2050	 xor	$14,$11
2051	sll	$30,$7,30
2052	addu	$2,$25
2053	 srl	$6,$14,31
2054	xor	$25,$24,$1
2055	 addu	$14,$14
2056	and	$25,$7
2057	srl	$7,$7,2
2058	 or	$14,$6
2059	addu	$2,$13
2060	or	$7,$30
2061	addu	$2,$25
2062#endif
2063#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2064	addu	$1,$31		# 54
2065	and	$25,$7,$24
2066	 xor	$15,$17
2067	rotr	$6,$2,27
2068	addu	$1,$25
2069	 xor	$15,$23
2070	xor	$25,$7,$24
2071	addu	$1,$6
2072	 xor	$15,$12
2073	and	$25,$3
2074	addu	$1,$14
2075	 rotr	$15,$15,31
2076	rotr	$3,$3,2
2077	addu	$1,$25
2078#else
2079	 xor	$15,$17
2080	sll	$25,$2,5	# 54
2081	addu	$1,$31
2082	srl	$6,$2,27
2083	addu	$1,$25
2084	 xor	$15,$23
2085	and	$25,$7,$24
2086	addu	$1,$6
2087	 xor	$15,$12
2088	sll	$30,$3,30
2089	addu	$1,$25
2090	 srl	$6,$15,31
2091	xor	$25,$7,$24
2092	 addu	$15,$15
2093	and	$25,$3
2094	srl	$3,$3,2
2095	 or	$15,$6
2096	addu	$1,$14
2097	or	$3,$30
2098	addu	$1,$25
2099#endif
2100#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2101	addu	$24,$31		# 55
2102	and	$25,$3,$7
2103	 xor	$16,$18
2104	rotr	$6,$1,27
2105	addu	$24,$25
2106	 xor	$16,$8
2107	xor	$25,$3,$7
2108	addu	$24,$6
2109	 xor	$16,$13
2110	and	$25,$2
2111	addu	$24,$15
2112	 rotr	$16,$16,31
2113	rotr	$2,$2,2
2114	addu	$24,$25
2115#else
2116	 xor	$16,$18
2117	sll	$25,$1,5	# 55
2118	addu	$24,$31
2119	srl	$6,$1,27
2120	addu	$24,$25
2121	 xor	$16,$8
2122	and	$25,$3,$7
2123	addu	$24,$6
2124	 xor	$16,$13
2125	sll	$30,$2,30
2126	addu	$24,$25
2127	 srl	$6,$16,31
2128	xor	$25,$3,$7
2129	 addu	$16,$16
2130	and	$25,$2
2131	srl	$2,$2,2
2132	 or	$16,$6
2133	addu	$24,$15
2134	or	$2,$30
2135	addu	$24,$25
2136#endif
2137#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2138	addu	$7,$31		# 56
2139	and	$25,$2,$3
2140	 xor	$17,$19
2141	rotr	$6,$24,27
2142	addu	$7,$25
2143	 xor	$17,$9
2144	xor	$25,$2,$3
2145	addu	$7,$6
2146	 xor	$17,$14
2147	and	$25,$1
2148	addu	$7,$16
2149	 rotr	$17,$17,31
2150	rotr	$1,$1,2
2151	addu	$7,$25
2152#else
2153	 xor	$17,$19
2154	sll	$25,$24,5	# 56
2155	addu	$7,$31
2156	srl	$6,$24,27
2157	addu	$7,$25
2158	 xor	$17,$9
2159	and	$25,$2,$3
2160	addu	$7,$6
2161	 xor	$17,$14
2162	sll	$30,$1,30
2163	addu	$7,$25
2164	 srl	$6,$17,31
2165	xor	$25,$2,$3
2166	 addu	$17,$17
2167	and	$25,$1
2168	srl	$1,$1,2
2169	 or	$17,$6
2170	addu	$7,$16
2171	or	$1,$30
2172	addu	$7,$25
2173#endif
2174#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2175	addu	$3,$31		# 57
2176	and	$25,$1,$2
2177	 xor	$18,$20
2178	rotr	$6,$7,27
2179	addu	$3,$25
2180	 xor	$18,$10
2181	xor	$25,$1,$2
2182	addu	$3,$6
2183	 xor	$18,$15
2184	and	$25,$24
2185	addu	$3,$17
2186	 rotr	$18,$18,31
2187	rotr	$24,$24,2
2188	addu	$3,$25
2189#else
2190	 xor	$18,$20
2191	sll	$25,$7,5	# 57
2192	addu	$3,$31
2193	srl	$6,$7,27
2194	addu	$3,$25
2195	 xor	$18,$10
2196	and	$25,$1,$2
2197	addu	$3,$6
2198	 xor	$18,$15
2199	sll	$30,$24,30
2200	addu	$3,$25
2201	 srl	$6,$18,31
2202	xor	$25,$1,$2
2203	 addu	$18,$18
2204	and	$25,$24
2205	srl	$24,$24,2
2206	 or	$18,$6
2207	addu	$3,$17
2208	or	$24,$30
2209	addu	$3,$25
2210#endif
2211#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2212	addu	$2,$31		# 58
2213	and	$25,$24,$1
2214	 xor	$19,$21
2215	rotr	$6,$3,27
2216	addu	$2,$25
2217	 xor	$19,$11
2218	xor	$25,$24,$1
2219	addu	$2,$6
2220	 xor	$19,$16
2221	and	$25,$7
2222	addu	$2,$18
2223	 rotr	$19,$19,31
2224	rotr	$7,$7,2
2225	addu	$2,$25
2226#else
2227	 xor	$19,$21
2228	sll	$25,$3,5	# 58
2229	addu	$2,$31
2230	srl	$6,$3,27
2231	addu	$2,$25
2232	 xor	$19,$11
2233	and	$25,$24,$1
2234	addu	$2,$6
2235	 xor	$19,$16
2236	sll	$30,$7,30
2237	addu	$2,$25
2238	 srl	$6,$19,31
2239	xor	$25,$24,$1
2240	 addu	$19,$19
2241	and	$25,$7
2242	srl	$7,$7,2
2243	 or	$19,$6
2244	addu	$2,$18
2245	or	$7,$30
2246	addu	$2,$25
2247#endif
2248#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2249	addu	$1,$31		# 59
2250	and	$25,$7,$24
2251	 xor	$20,$22
2252	rotr	$6,$2,27
2253	addu	$1,$25
2254	 xor	$20,$12
2255	xor	$25,$7,$24
2256	addu	$1,$6
2257	 xor	$20,$17
2258	and	$25,$3
2259	addu	$1,$19
2260	 rotr	$20,$20,31
2261	rotr	$3,$3,2
2262	addu	$1,$25
2263#else
2264	 xor	$20,$22
2265	sll	$25,$2,5	# 59
2266	addu	$1,$31
2267	srl	$6,$2,27
2268	addu	$1,$25
2269	 xor	$20,$12
2270	and	$25,$7,$24
2271	addu	$1,$6
2272	 xor	$20,$17
2273	sll	$30,$3,30
2274	addu	$1,$25
2275	 srl	$6,$20,31
2276	xor	$25,$7,$24
2277	 addu	$20,$20
2278	and	$25,$3
2279	srl	$3,$3,2
2280	 or	$20,$6
2281	addu	$1,$19
2282	or	$3,$30
2283	addu	$1,$25
2284#endif
2285	lui	$31,0xca62
2286	ori	$31,0xc1d6	# K_60_79
2287#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2288	 xor	$21,$23
2289	addu	$24,$31		# 60
2290	rotr	$6,$1,27
2291	 xor	$21,$13
2292	xor	$25,$3,$7
2293	addu	$24,$6
2294	 xor	$21,$18
2295	xor	$25,$2
2296	addu	$24,$20
2297	 rotr	$21,$21,31
2298	rotr	$2,$2,2
2299	addu	$24,$25
2300#else
2301	 xor	$21,$23
2302	sll	$25,$1,5	# 60
2303	addu	$24,$31
2304	srl	$6,$1,27
2305	addu	$24,$25
2306	 xor	$21,$13
2307	xor	$25,$3,$7
2308	addu	$24,$6
2309	 xor	$21,$18
2310	sll	$30,$2,30
2311	xor	$25,$2
2312	 srl	$6,$21,31
2313	 addu	$21,$21
2314	srl	$2,$2,2
2315	addu	$24,$20
2316	 or	$21,$6
2317	or	$2,$30
2318	addu	$24,$25
2319#endif
2320#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2321	 xor	$22,$8
2322	addu	$7,$31		# 61
2323	rotr	$6,$24,27
2324	 xor	$22,$14
2325	xor	$25,$2,$3
2326	addu	$7,$6
2327	 xor	$22,$19
2328	xor	$25,$1
2329	addu	$7,$21
2330	 rotr	$22,$22,31
2331	rotr	$1,$1,2
2332	addu	$7,$25
2333#else
2334	 xor	$22,$8
2335	sll	$25,$24,5	# 61
2336	addu	$7,$31
2337	srl	$6,$24,27
2338	addu	$7,$25
2339	 xor	$22,$14
2340	xor	$25,$2,$3
2341	addu	$7,$6
2342	 xor	$22,$19
2343	sll	$30,$1,30
2344	xor	$25,$1
2345	 srl	$6,$22,31
2346	 addu	$22,$22
2347	srl	$1,$1,2
2348	addu	$7,$21
2349	 or	$22,$6
2350	or	$1,$30
2351	addu	$7,$25
2352#endif
2353#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2354	 xor	$23,$9
2355	addu	$3,$31		# 62
2356	rotr	$6,$7,27
2357	 xor	$23,$15
2358	xor	$25,$1,$2
2359	addu	$3,$6
2360	 xor	$23,$20
2361	xor	$25,$24
2362	addu	$3,$22
2363	 rotr	$23,$23,31
2364	rotr	$24,$24,2
2365	addu	$3,$25
2366#else
2367	 xor	$23,$9
2368	sll	$25,$7,5	# 62
2369	addu	$3,$31
2370	srl	$6,$7,27
2371	addu	$3,$25
2372	 xor	$23,$15
2373	xor	$25,$1,$2
2374	addu	$3,$6
2375	 xor	$23,$20
2376	sll	$30,$24,30
2377	xor	$25,$24
2378	 srl	$6,$23,31
2379	 addu	$23,$23
2380	srl	$24,$24,2
2381	addu	$3,$22
2382	 or	$23,$6
2383	or	$24,$30
2384	addu	$3,$25
2385#endif
2386#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2387	 xor	$8,$10
2388	addu	$2,$31		# 63
2389	rotr	$6,$3,27
2390	 xor	$8,$16
2391	xor	$25,$24,$1
2392	addu	$2,$6
2393	 xor	$8,$21
2394	xor	$25,$7
2395	addu	$2,$23
2396	 rotr	$8,$8,31
2397	rotr	$7,$7,2
2398	addu	$2,$25
2399#else
2400	 xor	$8,$10
2401	sll	$25,$3,5	# 63
2402	addu	$2,$31
2403	srl	$6,$3,27
2404	addu	$2,$25
2405	 xor	$8,$16
2406	xor	$25,$24,$1
2407	addu	$2,$6
2408	 xor	$8,$21
2409	sll	$30,$7,30
2410	xor	$25,$7
2411	 srl	$6,$8,31
2412	 addu	$8,$8
2413	srl	$7,$7,2
2414	addu	$2,$23
2415	 or	$8,$6
2416	or	$7,$30
2417	addu	$2,$25
2418#endif
2419#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2420	 xor	$9,$11
2421	addu	$1,$31		# 64
2422	rotr	$6,$2,27
2423	 xor	$9,$17
2424	xor	$25,$7,$24
2425	addu	$1,$6
2426	 xor	$9,$22
2427	xor	$25,$3
2428	addu	$1,$8
2429	 rotr	$9,$9,31
2430	rotr	$3,$3,2
2431	addu	$1,$25
2432#else
2433	 xor	$9,$11
2434	sll	$25,$2,5	# 64
2435	addu	$1,$31
2436	srl	$6,$2,27
2437	addu	$1,$25
2438	 xor	$9,$17
2439	xor	$25,$7,$24
2440	addu	$1,$6
2441	 xor	$9,$22
2442	sll	$30,$3,30
2443	xor	$25,$3
2444	 srl	$6,$9,31
2445	 addu	$9,$9
2446	srl	$3,$3,2
2447	addu	$1,$8
2448	 or	$9,$6
2449	or	$3,$30
2450	addu	$1,$25
2451#endif
2452#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2453	 xor	$10,$12
2454	addu	$24,$31		# 65
2455	rotr	$6,$1,27
2456	 xor	$10,$18
2457	xor	$25,$3,$7
2458	addu	$24,$6
2459	 xor	$10,$23
2460	xor	$25,$2
2461	addu	$24,$9
2462	 rotr	$10,$10,31
2463	rotr	$2,$2,2
2464	addu	$24,$25
2465#else
2466	 xor	$10,$12
2467	sll	$25,$1,5	# 65
2468	addu	$24,$31
2469	srl	$6,$1,27
2470	addu	$24,$25
2471	 xor	$10,$18
2472	xor	$25,$3,$7
2473	addu	$24,$6
2474	 xor	$10,$23
2475	sll	$30,$2,30
2476	xor	$25,$2
2477	 srl	$6,$10,31
2478	 addu	$10,$10
2479	srl	$2,$2,2
2480	addu	$24,$9
2481	 or	$10,$6
2482	or	$2,$30
2483	addu	$24,$25
2484#endif
2485#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2486	 xor	$11,$13
2487	addu	$7,$31		# 66
2488	rotr	$6,$24,27
2489	 xor	$11,$19
2490	xor	$25,$2,$3
2491	addu	$7,$6
2492	 xor	$11,$8
2493	xor	$25,$1
2494	addu	$7,$10
2495	 rotr	$11,$11,31
2496	rotr	$1,$1,2
2497	addu	$7,$25
2498#else
2499	 xor	$11,$13
2500	sll	$25,$24,5	# 66
2501	addu	$7,$31
2502	srl	$6,$24,27
2503	addu	$7,$25
2504	 xor	$11,$19
2505	xor	$25,$2,$3
2506	addu	$7,$6
2507	 xor	$11,$8
2508	sll	$30,$1,30
2509	xor	$25,$1
2510	 srl	$6,$11,31
2511	 addu	$11,$11
2512	srl	$1,$1,2
2513	addu	$7,$10
2514	 or	$11,$6
2515	or	$1,$30
2516	addu	$7,$25
2517#endif
2518#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2519	 xor	$12,$14
2520	addu	$3,$31		# 67
2521	rotr	$6,$7,27
2522	 xor	$12,$20
2523	xor	$25,$1,$2
2524	addu	$3,$6
2525	 xor	$12,$9
2526	xor	$25,$24
2527	addu	$3,$11
2528	 rotr	$12,$12,31
2529	rotr	$24,$24,2
2530	addu	$3,$25
2531#else
2532	 xor	$12,$14
2533	sll	$25,$7,5	# 67
2534	addu	$3,$31
2535	srl	$6,$7,27
2536	addu	$3,$25
2537	 xor	$12,$20
2538	xor	$25,$1,$2
2539	addu	$3,$6
2540	 xor	$12,$9
2541	sll	$30,$24,30
2542	xor	$25,$24
2543	 srl	$6,$12,31
2544	 addu	$12,$12
2545	srl	$24,$24,2
2546	addu	$3,$11
2547	 or	$12,$6
2548	or	$24,$30
2549	addu	$3,$25
2550#endif
2551#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2552	 xor	$13,$15
2553	addu	$2,$31		# 68
2554	rotr	$6,$3,27
2555	 xor	$13,$21
2556	xor	$25,$24,$1
2557	addu	$2,$6
2558	 xor	$13,$10
2559	xor	$25,$7
2560	addu	$2,$12
2561	 rotr	$13,$13,31
2562	rotr	$7,$7,2
2563	addu	$2,$25
2564#else
2565	 xor	$13,$15
2566	sll	$25,$3,5	# 68
2567	addu	$2,$31
2568	srl	$6,$3,27
2569	addu	$2,$25
2570	 xor	$13,$21
2571	xor	$25,$24,$1
2572	addu	$2,$6
2573	 xor	$13,$10
2574	sll	$30,$7,30
2575	xor	$25,$7
2576	 srl	$6,$13,31
2577	 addu	$13,$13
2578	srl	$7,$7,2
2579	addu	$2,$12
2580	 or	$13,$6
2581	or	$7,$30
2582	addu	$2,$25
2583#endif
2584#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2585	 xor	$14,$16
2586	addu	$1,$31		# 69
2587	rotr	$6,$2,27
2588	 xor	$14,$22
2589	xor	$25,$7,$24
2590	addu	$1,$6
2591	 xor	$14,$11
2592	xor	$25,$3
2593	addu	$1,$13
2594	 rotr	$14,$14,31
2595	rotr	$3,$3,2
2596	addu	$1,$25
2597#else
2598	 xor	$14,$16
2599	sll	$25,$2,5	# 69
2600	addu	$1,$31
2601	srl	$6,$2,27
2602	addu	$1,$25
2603	 xor	$14,$22
2604	xor	$25,$7,$24
2605	addu	$1,$6
2606	 xor	$14,$11
2607	sll	$30,$3,30
2608	xor	$25,$3
2609	 srl	$6,$14,31
2610	 addu	$14,$14
2611	srl	$3,$3,2
2612	addu	$1,$13
2613	 or	$14,$6
2614	or	$3,$30
2615	addu	$1,$25
2616#endif
2617#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2618	 xor	$15,$17
2619	addu	$24,$31		# 70
2620	rotr	$6,$1,27
2621	 xor	$15,$23
2622	xor	$25,$3,$7
2623	addu	$24,$6
2624	 xor	$15,$12
2625	xor	$25,$2
2626	addu	$24,$14
2627	 rotr	$15,$15,31
2628	rotr	$2,$2,2
2629	addu	$24,$25
2630#else
2631	 xor	$15,$17
2632	sll	$25,$1,5	# 70
2633	addu	$24,$31
2634	srl	$6,$1,27
2635	addu	$24,$25
2636	 xor	$15,$23
2637	xor	$25,$3,$7
2638	addu	$24,$6
2639	 xor	$15,$12
2640	sll	$30,$2,30
2641	xor	$25,$2
2642	 srl	$6,$15,31
2643	 addu	$15,$15
2644	srl	$2,$2,2
2645	addu	$24,$14
2646	 or	$15,$6
2647	or	$2,$30
2648	addu	$24,$25
2649#endif
2650#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2651	 xor	$16,$18
2652	addu	$7,$31		# 71
2653	rotr	$6,$24,27
2654	 xor	$16,$8
2655	xor	$25,$2,$3
2656	addu	$7,$6
2657	 xor	$16,$13
2658	xor	$25,$1
2659	addu	$7,$15
2660	 rotr	$16,$16,31
2661	rotr	$1,$1,2
2662	addu	$7,$25
2663#else
2664	 xor	$16,$18
2665	sll	$25,$24,5	# 71
2666	addu	$7,$31
2667	srl	$6,$24,27
2668	addu	$7,$25
2669	 xor	$16,$8
2670	xor	$25,$2,$3
2671	addu	$7,$6
2672	 xor	$16,$13
2673	sll	$30,$1,30
2674	xor	$25,$1
2675	 srl	$6,$16,31
2676	 addu	$16,$16
2677	srl	$1,$1,2
2678	addu	$7,$15
2679	 or	$16,$6
2680	or	$1,$30
2681	addu	$7,$25
2682#endif
2683#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2684	 xor	$17,$19
2685	addu	$3,$31		# 72
2686	rotr	$6,$7,27
2687	 xor	$17,$9
2688	xor	$25,$1,$2
2689	addu	$3,$6
2690	 xor	$17,$14
2691	xor	$25,$24
2692	addu	$3,$16
2693	 rotr	$17,$17,31
2694	rotr	$24,$24,2
2695	addu	$3,$25
2696#else
2697	 xor	$17,$19
2698	sll	$25,$7,5	# 72
2699	addu	$3,$31
2700	srl	$6,$7,27
2701	addu	$3,$25
2702	 xor	$17,$9
2703	xor	$25,$1,$2
2704	addu	$3,$6
2705	 xor	$17,$14
2706	sll	$30,$24,30
2707	xor	$25,$24
2708	 srl	$6,$17,31
2709	 addu	$17,$17
2710	srl	$24,$24,2
2711	addu	$3,$16
2712	 or	$17,$6
2713	or	$24,$30
2714	addu	$3,$25
2715#endif
2716#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2717	 xor	$18,$20
2718	addu	$2,$31		# 73
2719	rotr	$6,$3,27
2720	 xor	$18,$10
2721	xor	$25,$24,$1
2722	addu	$2,$6
2723	 xor	$18,$15
2724	xor	$25,$7
2725	addu	$2,$17
2726	 rotr	$18,$18,31
2727	rotr	$7,$7,2
2728	addu	$2,$25
2729#else
2730	 xor	$18,$20
2731	sll	$25,$3,5	# 73
2732	addu	$2,$31
2733	srl	$6,$3,27
2734	addu	$2,$25
2735	 xor	$18,$10
2736	xor	$25,$24,$1
2737	addu	$2,$6
2738	 xor	$18,$15
2739	sll	$30,$7,30
2740	xor	$25,$7
2741	 srl	$6,$18,31
2742	 addu	$18,$18
2743	srl	$7,$7,2
2744	addu	$2,$17
2745	 or	$18,$6
2746	or	$7,$30
2747	addu	$2,$25
2748#endif
2749#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2750	 xor	$19,$21
2751	addu	$1,$31		# 74
2752	rotr	$6,$2,27
2753	 xor	$19,$11
2754	xor	$25,$7,$24
2755	addu	$1,$6
2756	 xor	$19,$16
2757	xor	$25,$3
2758	addu	$1,$18
2759	 rotr	$19,$19,31
2760	rotr	$3,$3,2
2761	addu	$1,$25
2762#else
2763	 xor	$19,$21
2764	sll	$25,$2,5	# 74
2765	addu	$1,$31
2766	srl	$6,$2,27
2767	addu	$1,$25
2768	 xor	$19,$11
2769	xor	$25,$7,$24
2770	addu	$1,$6
2771	 xor	$19,$16
2772	sll	$30,$3,30
2773	xor	$25,$3
2774	 srl	$6,$19,31
2775	 addu	$19,$19
2776	srl	$3,$3,2
2777	addu	$1,$18
2778	 or	$19,$6
2779	or	$3,$30
2780	addu	$1,$25
2781#endif
2782#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2783	 xor	$20,$22
2784	addu	$24,$31		# 75
2785	rotr	$6,$1,27
2786	 xor	$20,$12
2787	xor	$25,$3,$7
2788	addu	$24,$6
2789	 xor	$20,$17
2790	xor	$25,$2
2791	addu	$24,$19
2792	 rotr	$20,$20,31
2793	rotr	$2,$2,2
2794	addu	$24,$25
2795#else
2796	 xor	$20,$22
2797	sll	$25,$1,5	# 75
2798	addu	$24,$31
2799	srl	$6,$1,27
2800	addu	$24,$25
2801	 xor	$20,$12
2802	xor	$25,$3,$7
2803	addu	$24,$6
2804	 xor	$20,$17
2805	sll	$30,$2,30
2806	xor	$25,$2
2807	 srl	$6,$20,31
2808	 addu	$20,$20
2809	srl	$2,$2,2
2810	addu	$24,$19
2811	 or	$20,$6
2812	or	$2,$30
2813	addu	$24,$25
2814#endif
2815#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2816	 xor	$21,$23
2817	addu	$7,$31		# 76
2818	rotr	$6,$24,27
2819	 xor	$21,$13
2820	xor	$25,$2,$3
2821	addu	$7,$6
2822	 xor	$21,$18
2823	xor	$25,$1
2824	addu	$7,$20
2825	 rotr	$21,$21,31
2826	rotr	$1,$1,2
2827	addu	$7,$25
2828#else
2829	 xor	$21,$23
2830	sll	$25,$24,5	# 76
2831	addu	$7,$31
2832	srl	$6,$24,27
2833	addu	$7,$25
2834	 xor	$21,$13
2835	xor	$25,$2,$3
2836	addu	$7,$6
2837	 xor	$21,$18
2838	sll	$30,$1,30
2839	xor	$25,$1
2840	 srl	$6,$21,31
2841	 addu	$21,$21
2842	srl	$1,$1,2
2843	addu	$7,$20
2844	 or	$21,$6
2845	or	$1,$30
2846	addu	$7,$25
2847#endif
2848#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2849	 xor	$22,$8
2850	addu	$3,$31		# 77
2851	rotr	$6,$7,27
2852	 xor	$22,$14
2853	xor	$25,$1,$2
2854	addu	$3,$6
2855	 xor	$22,$19
2856	xor	$25,$24
2857	addu	$3,$21
2858	 rotr	$22,$22,31
2859	rotr	$24,$24,2
2860	addu	$3,$25
2861#else
2862	 xor	$22,$8
2863	sll	$25,$7,5	# 77
2864	addu	$3,$31
2865	srl	$6,$7,27
2866	addu	$3,$25
2867	 xor	$22,$14
2868	xor	$25,$1,$2
2869	addu	$3,$6
2870	 xor	$22,$19
2871	sll	$30,$24,30
2872	xor	$25,$24
2873	 srl	$6,$22,31
2874	 addu	$22,$22
2875	srl	$24,$24,2
2876	addu	$3,$21
2877	 or	$22,$6
2878	or	$24,$30
2879	addu	$3,$25
2880#endif
2881#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2882	 xor	$23,$9
2883	addu	$2,$31		# 78
2884	rotr	$6,$3,27
2885	 xor	$23,$15
2886	xor	$25,$24,$1
2887	addu	$2,$6
2888	 xor	$23,$20
2889	xor	$25,$7
2890	addu	$2,$22
2891	 rotr	$23,$23,31
2892	rotr	$7,$7,2
2893	addu	$2,$25
2894#else
2895	 xor	$23,$9
2896	sll	$25,$3,5	# 78
2897	addu	$2,$31
2898	srl	$6,$3,27
2899	addu	$2,$25
2900	 xor	$23,$15
2901	xor	$25,$24,$1
2902	addu	$2,$6
2903	 xor	$23,$20
2904	sll	$30,$7,30
2905	xor	$25,$7
2906	 srl	$6,$23,31
2907	 addu	$23,$23
2908	srl	$7,$7,2
2909	addu	$2,$22
2910	 or	$23,$6
2911	or	$7,$30
2912	addu	$2,$25
2913#endif
2914#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
2915	 lw	$8,0($4)
2916	addu	$1,$31		# 79
2917	 lw	$9,4($4)
2918	rotr	$6,$2,27
2919	 lw	$10,8($4)
2920	xor	$25,$7,$24
2921	addu	$1,$6
2922	 lw	$11,12($4)
2923	xor	$25,$3
2924	addu	$1,$23
2925	 lw	$12,16($4)
2926	rotr	$3,$3,2
2927	addu	$1,$25
2928#else
2929	 lw	$8,0($4)
2930	sll	$25,$2,5	# 79
2931	addu	$1,$31
2932	 lw	$9,4($4)
2933	srl	$6,$2,27
2934	addu	$1,$25
2935	 lw	$10,8($4)
2936	xor	$25,$7,$24
2937	addu	$1,$6
2938	 lw	$11,12($4)
2939	sll	$30,$3,30
2940	xor	$25,$3
2941	 lw	$12,16($4)
2942	srl	$3,$3,2
2943	addu	$1,$23
2944	or	$3,$30
2945	addu	$1,$25
2946#endif
2947	add $5,64
2948	lw	$6,0($29)
2949
2950	addu	$1,$8
2951	addu	$2,$9
2952	sw	$1,0($4)
2953	addu	$3,$10
2954	addu	$7,$11
2955	sw	$2,4($4)
2956	addu	$24,$12
2957	sw	$3,8($4)
2958	sw	$7,12($4)
2959	sw	$24,16($4)
2960	.set	noreorder
2961	bne	$5,$6,.Loop
2962	nop
2963
2964	.set	noreorder
2965	lw	$31,(16-1)*4($29)
2966	lw	$30,(16-2)*4($29)
2967	lw	$23,(16-3)*4($29)
2968	lw	$22,(16-4)*4($29)
2969	lw	$21,(16-5)*4($29)
2970	lw	$20,(16-6)*4($29)
2971	lw	$19,(16-7)*4($29)
2972	lw	$18,(16-8)*4($29)
2973	lw	$17,(16-9)*4($29)
2974	lw	$16,(16-10)*4($29)
2975	jr	$31
2976	add $29,16*4
2977.end	sha1_block_data_order
2978.rdata
2979.asciiz	"SHA1 for MIPS, CRYPTOGAMS by <appro@openssl.org>"
2980