1#include <machine/asm.h> 2.text 3.globl OPENSSL_ia32_cpuid 4.type OPENSSL_ia32_cpuid,@function 5.align 16 6OPENSSL_ia32_cpuid: 7.L_OPENSSL_ia32_cpuid_begin: 8 pushl %ebp 9 pushl %ebx 10 pushl %esi 11 pushl %edi 12 xorl %edx,%edx 13 pushfl 14 popl %eax 15 movl %eax,%ecx 16 xorl $2097152,%eax 17 pushl %eax 18 popfl 19 pushfl 20 popl %eax 21 xorl %eax,%ecx 22 xorl %eax,%eax 23 btl $21,%ecx 24 jnc .L000nocpuid 25 movl 20(%esp),%esi 26 movl %eax,8(%esi) 27 .byte 0x0f,0xa2 28 movl %eax,%edi 29 xorl %eax,%eax 30 cmpl $1970169159,%ebx 31 setne %al 32 movl %eax,%ebp 33 cmpl $1231384169,%edx 34 setne %al 35 orl %eax,%ebp 36 cmpl $1818588270,%ecx 37 setne %al 38 orl %eax,%ebp 39 jz .L001intel 40 cmpl $1752462657,%ebx 41 setne %al 42 movl %eax,%esi 43 cmpl $1769238117,%edx 44 setne %al 45 orl %eax,%esi 46 cmpl $1145913699,%ecx 47 setne %al 48 orl %eax,%esi 49 jnz .L001intel 50 movl $2147483648,%eax 51 .byte 0x0f,0xa2 52 cmpl $2147483649,%eax 53 jb .L001intel 54 movl %eax,%esi 55 movl $2147483649,%eax 56 .byte 0x0f,0xa2 57 orl %ecx,%ebp 58 andl $2049,%ebp 59 cmpl $2147483656,%esi 60 jb .L001intel 61 movl $2147483656,%eax 62 .byte 0x0f,0xa2 63 movzbl %cl,%esi 64 incl %esi 65 movl $1,%eax 66 xorl %ecx,%ecx 67 .byte 0x0f,0xa2 68 btl $28,%edx 69 jnc .L002generic 70 shrl $16,%ebx 71 andl $255,%ebx 72 cmpl %esi,%ebx 73 ja .L002generic 74 andl $4026531839,%edx 75 jmp .L002generic 76.L001intel: 77 cmpl $7,%edi 78 jb .L003cacheinfo 79 movl 20(%esp),%esi 80 movl $7,%eax 81 xorl %ecx,%ecx 82 .byte 0x0f,0xa2 83 movl %ebx,8(%esi) 84.L003cacheinfo: 85 cmpl $4,%edi 86 movl $-1,%edi 87 jb .L004nocacheinfo 88 movl $4,%eax 89 movl $0,%ecx 90 .byte 0x0f,0xa2 91 movl %eax,%edi 92 shrl $14,%edi 93 andl $4095,%edi 94.L004nocacheinfo: 95 movl $1,%eax 96 xorl %ecx,%ecx 97 .byte 0x0f,0xa2 98 andl $3220176895,%edx 99 cmpl $0,%ebp 100 jne .L005notintel 101 orl $1073741824,%edx 102 andb $15,%ah 103 cmpb $15,%ah 104 jne .L005notintel 105 orl $1048576,%edx 106.L005notintel: 107 btl $28,%edx 108 jnc .L002generic 109 andl $4026531839,%edx 110 cmpl $0,%edi 111 je .L002generic 112 orl $268435456,%edx 113 shrl $16,%ebx 114 cmpb $1,%bl 115 ja .L002generic 116 andl $4026531839,%edx 117.L002generic: 118 andl $2048,%ebp 119 andl $4294965247,%ecx 120 movl %edx,%esi 121 orl %ecx,%ebp 122 btl $27,%ecx 123 jnc .L006clear_avx 124 xorl %ecx,%ecx 125.byte 15,1,208 126 andl $6,%eax 127 cmpl $6,%eax 128 je .L007done 129 cmpl $2,%eax 130 je .L006clear_avx 131.L008clear_xmm: 132 andl $4261412861,%ebp 133 andl $4278190079,%esi 134.L006clear_avx: 135 andl $4026525695,%ebp 136 movl 20(%esp),%edi 137 andl $4294967263,8(%edi) 138.L007done: 139 movl %esi,%eax 140 movl %ebp,%edx 141.L000nocpuid: 142 popl %edi 143 popl %esi 144 popl %ebx 145 popl %ebp 146 ret 147.size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin 148.globl OPENSSL_rdtsc 149.type OPENSSL_rdtsc,@function 150.align 16 151OPENSSL_rdtsc: 152.L_OPENSSL_rdtsc_begin: 153 xorl %eax,%eax 154 xorl %edx,%edx 155 call .L009PIC_me_up 156.L009PIC_me_up: 157 popl %ecx 158 leal OPENSSL_ia32cap_P-.L009PIC_me_up(%ecx),%ecx 159 btl $4,(%ecx) 160 jnc .L010notsc 161 .byte 0x0f,0x31 162.L010notsc: 163 ret 164.size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin 165.globl OPENSSL_instrument_halt 166.type OPENSSL_instrument_halt,@function 167.align 16 168OPENSSL_instrument_halt: 169.L_OPENSSL_instrument_halt_begin: 170 call .L011PIC_me_up 171.L011PIC_me_up: 172 popl %ecx 173 leal OPENSSL_ia32cap_P-.L011PIC_me_up(%ecx),%ecx 174 btl $4,(%ecx) 175 jnc .L012nohalt 176.long 2421723150 177 andl $3,%eax 178 jnz .L012nohalt 179 pushfl 180 popl %eax 181 btl $9,%eax 182 jnc .L012nohalt 183 .byte 0x0f,0x31 184 pushl %edx 185 pushl %eax 186 hlt 187 .byte 0x0f,0x31 188 subl (%esp),%eax 189 sbbl 4(%esp),%edx 190 addl $8,%esp 191 ret 192.L012nohalt: 193 xorl %eax,%eax 194 xorl %edx,%edx 195 ret 196.size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin 197.globl OPENSSL_far_spin 198.type OPENSSL_far_spin,@function 199.align 16 200OPENSSL_far_spin: 201.L_OPENSSL_far_spin_begin: 202 pushfl 203 popl %eax 204 btl $9,%eax 205 jnc .L013nospin 206 movl 4(%esp),%eax 207 movl 8(%esp),%ecx 208.long 2430111262 209 xorl %eax,%eax 210 movl (%ecx),%edx 211 jmp .L014spin 212.align 16 213.L014spin: 214 incl %eax 215 cmpl (%ecx),%edx 216 je .L014spin 217.long 529567888 218 ret 219.L013nospin: 220 xorl %eax,%eax 221 xorl %edx,%edx 222 ret 223.size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin 224.globl OPENSSL_wipe_cpu 225.type OPENSSL_wipe_cpu,@function 226.align 16 227OPENSSL_wipe_cpu: 228.L_OPENSSL_wipe_cpu_begin: 229 xorl %eax,%eax 230 xorl %edx,%edx 231 call .L015PIC_me_up 232.L015PIC_me_up: 233 popl %ecx 234 leal OPENSSL_ia32cap_P-.L015PIC_me_up(%ecx),%ecx 235 movl (%ecx),%ecx 236 btl $1,(%ecx) 237 jnc .L016no_x87 238 andl $83886080,%ecx 239 cmpl $83886080,%ecx 240 jne .L017no_sse2 241 pxor %xmm0,%xmm0 242 pxor %xmm1,%xmm1 243 pxor %xmm2,%xmm2 244 pxor %xmm3,%xmm3 245 pxor %xmm4,%xmm4 246 pxor %xmm5,%xmm5 247 pxor %xmm6,%xmm6 248 pxor %xmm7,%xmm7 249.L017no_sse2: 250.long 4007259865,4007259865,4007259865,4007259865,2430851995 251.L016no_x87: 252 leal 4(%esp),%eax 253 ret 254.size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin 255.globl OPENSSL_atomic_add 256.type OPENSSL_atomic_add,@function 257.align 16 258OPENSSL_atomic_add: 259.L_OPENSSL_atomic_add_begin: 260 movl 4(%esp),%edx 261 movl 8(%esp),%ecx 262 pushl %ebx 263 nop 264 movl (%edx),%eax 265.L018spin: 266 leal (%eax,%ecx,1),%ebx 267 nop 268.long 447811568 269 jne .L018spin 270 movl %ebx,%eax 271 popl %ebx 272 ret 273.size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin 274.globl OPENSSL_indirect_call 275.type OPENSSL_indirect_call,@function 276.align 16 277OPENSSL_indirect_call: 278.L_OPENSSL_indirect_call_begin: 279 pushl %ebp 280 movl %esp,%ebp 281 subl $28,%esp 282 movl 12(%ebp),%ecx 283 movl %ecx,(%esp) 284 movl 16(%ebp),%edx 285 movl %edx,4(%esp) 286 movl 20(%ebp),%eax 287 movl %eax,8(%esp) 288 movl 24(%ebp),%eax 289 movl %eax,12(%esp) 290 movl 28(%ebp),%eax 291 movl %eax,16(%esp) 292 movl 32(%ebp),%eax 293 movl %eax,20(%esp) 294 movl 36(%ebp),%eax 295 movl %eax,24(%esp) 296 call *8(%ebp) 297 movl %ebp,%esp 298 popl %ebp 299 ret 300.size OPENSSL_indirect_call,.-.L_OPENSSL_indirect_call_begin 301.globl OPENSSL_cleanse 302.type OPENSSL_cleanse,@function 303.align 16 304OPENSSL_cleanse: 305.L_OPENSSL_cleanse_begin: 306 movl 4(%esp),%edx 307 movl 8(%esp),%ecx 308 xorl %eax,%eax 309 cmpl $7,%ecx 310 jae .L019lot 311 cmpl $0,%ecx 312 je .L020ret 313.L021little: 314 movb %al,(%edx) 315 subl $1,%ecx 316 leal 1(%edx),%edx 317 jnz .L021little 318.L020ret: 319 ret 320.align 16 321.L019lot: 322 testl $3,%edx 323 jz .L022aligned 324 movb %al,(%edx) 325 leal -1(%ecx),%ecx 326 leal 1(%edx),%edx 327 jmp .L019lot 328.L022aligned: 329 movl %eax,(%edx) 330 leal -4(%ecx),%ecx 331 testl $-4,%ecx 332 leal 4(%edx),%edx 333 jnz .L022aligned 334 cmpl $0,%ecx 335 jne .L021little 336 ret 337.size OPENSSL_cleanse,.-.L_OPENSSL_cleanse_begin 338.globl OPENSSL_ia32_rdrand 339.type OPENSSL_ia32_rdrand,@function 340.align 16 341OPENSSL_ia32_rdrand: 342.L_OPENSSL_ia32_rdrand_begin: 343 movl $8,%ecx 344.L023loop: 345.byte 15,199,240 346 jc .L024break 347 loop .L023loop 348.L024break: 349 cmpl $0,%eax 350 cmovel %ecx,%eax 351 ret 352.size OPENSSL_ia32_rdrand,.-.L_OPENSSL_ia32_rdrand_begin 353.globl OPENSSL_ia32_rdseed 354.type OPENSSL_ia32_rdseed,@function 355.align 16 356OPENSSL_ia32_rdseed: 357.L_OPENSSL_ia32_rdseed_begin: 358 movl $8,%ecx 359.L025loop: 360.byte 15,199,248 361 jc .L026break 362 loop .L025loop 363.L026break: 364 cmpl $0,%eax 365 cmovel %ecx,%eax 366 ret 367.size OPENSSL_ia32_rdseed,.-.L_OPENSSL_ia32_rdseed_begin 368.hidden OPENSSL_cpuid_setup 369.hidden OPENSSL_ia32cap_P 370.comm OPENSSL_ia32cap_P,16,4 371.section .init 372 PIC_PROLOGUE 373 call PIC_PLT(OPENSSL_cpuid_setup) 374 PIC_EPILOGUE 375