xref: /netbsd-src/common/lib/libc/arch/sparc/atomic/membar_ops.S (revision 4f8ce3b31dd3bccb2f78a8118c558aacc733ac7d)
1*4f8ce3b3Sriastradh/*	$NetBSD: membar_ops.S,v 1.8 2022/04/09 23:32:52 riastradh Exp $	*/
2ebe806aaSad
3ebe806aaSad/*-
4ebe806aaSad * Copyright (c) 2007 The NetBSD Foundation, Inc.
5ebe806aaSad * All rights reserved.
6ebe806aaSad *
7ebe806aaSad * This code is derived from software contributed to The NetBSD Foundation
8ebe806aaSad * by Jason R. Thorpe, and by Andrew Doran.
9ebe806aaSad *
10ebe806aaSad * Redistribution and use in source and binary forms, with or without
11ebe806aaSad * modification, are permitted provided that the following conditions
12ebe806aaSad * are met:
13ebe806aaSad * 1. Redistributions of source code must retain the above copyright
14ebe806aaSad *    notice, this list of conditions and the following disclaimer.
15ebe806aaSad * 2. Redistributions in binary form must reproduce the above copyright
16ebe806aaSad *    notice, this list of conditions and the following disclaimer in the
17ebe806aaSad *    documentation and/or other materials provided with the distribution.
18ebe806aaSad *
19ebe806aaSad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20ebe806aaSad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21ebe806aaSad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22ebe806aaSad * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23ebe806aaSad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24ebe806aaSad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25ebe806aaSad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26ebe806aaSad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27ebe806aaSad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28ebe806aaSad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29ebe806aaSad * POSSIBILITY OF SUCH DAMAGE.
30ebe806aaSad */
31ebe806aaSad
32ebe806aaSad#include "atomic_op_asm.h"
33ebe806aaSad
34da06f841Sriastradh#ifdef _KERNEL_OPT
35da06f841Sriastradh#include "opt_multiprocessor.h"
36da06f841Sriastradh#endif
37da06f841Sriastradh
38ebe806aaSad	.text
39ebe806aaSad
40da06f841Sriastradh/*
41da06f841Sriastradh * These assume Total Store Order (TSO), which may reorder
42ca73d729Sriastradh * store-before-load but nothing else.  Hence, only membar_sync (and
43ca73d729Sriastradh * its deprecated alias membar_enter) must issue anything --
44ca73d729Sriastradh * specifically, an LDSTUB, which (along with SWAP) is the only
45ca73d729Sriastradh * instruction that implies a sequential consistency barrier.
46da06f841Sriastradh *
47da06f841Sriastradh * If we ran with Partial Store Order (PSO), we would also need to
48*4f8ce3b3Sriastradh * issue STBAR for membar_release (load/store-before-store) and
49da06f841Sriastradh * membar_producer (store-before-store).
50da06f841Sriastradh */
51ebe806aaSad
52*4f8ce3b3SriastradhENTRY(_membar_acquire)
53ebe806aaSad	retl
54da06f841Sriastradh	 nop
55*4f8ce3b3SriastradhEND(_membar_acquire)
56*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_acquire,_membar_acquire)
57*4f8ce3b3Sriastradh
58*4f8ce3b3SriastradhENTRY(_membar_release)
59*4f8ce3b3Sriastradh	retl
60*4f8ce3b3Sriastradh	 nop
61*4f8ce3b3SriastradhEND(_membar_release)
62*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_release,_membar_release)
63ebe806aaSad
64da06f841SriastradhENTRY(_membar_sync)
65da06f841Sriastradh	retl
66da06f841Sriastradh#if !defined(_KERNEL) || defined(MULTIPROCESSOR)
67da06f841Sriastradh	 ldstub	[%sp - 4], %g0
68da06f841Sriastradh#else
69da06f841Sriastradh	 nop
70da06f841Sriastradh#endif
71da06f841SriastradhEND(_membar_sync)
72*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_sync,_membar_sync)
73da06f841Sriastradh
74*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_producer,_membar_release)
75*4f8ce3b3SriastradhSTRONG_ALIAS(_membar_producer,_membar_release)
76*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_consumer,_membar_acquire)
77*4f8ce3b3SriastradhSTRONG_ALIAS(_membar_consumer,_membar_acquire)
78ca73d729SriastradhATOMIC_OP_ALIAS(membar_enter,_membar_sync)
79ca73d729SriastradhSTRONG_ALIAS(_membar_enter,_membar_sync)
80*4f8ce3b3SriastradhATOMIC_OP_ALIAS(membar_exit,_membar_release)
81*4f8ce3b3SriastradhSTRONG_ALIAS(_membar_exit,_membar_release)
82