1/* $NetBSD: atomic_cas.S,v 1.4 2007/12/08 22:53:33 ad Exp $ */ 2 3/*- 4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran and Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include "atomic_op_asm.h" 40 41#if defined(_KERNEL) 42 43#include <machine/psl.h> 44 45#include "opt_multiprocessor.h" 46 47#define DISABLE_INTERRUPTS \ 48 rd %psr, %o4 /* disable interrupts */;\ 49 or %o4, PSR_PIL, %o5 ;\ 50 wr %o5, 0, %psr ;\ 51 nop ;\ 52 nop ;\ 53 nop 54 55#define RESTORE_INTERRUPTS \ 56 wr %o4, 0, %psr /* enable interrupts */ ;\ 57 nop ;\ 58 nop ;\ 59 nop 60 61#else /* _KERNEL */ 62 63#define MULTIPROCESSOR 1 64#define DISABLE_INTERRUPTS /* nothing */ 65#define RESTORE_INTERRUPTS /* nothing */ 66 67#endif /* _KERNEL */ 68 69#if defined(MULTIPROCESSOR) 70 .section .bss 71 .align 1024 72OTYPE(_C_LABEL(_atomic_cas_locktab)) 73_C_LABEL(_atomic_cas_locktab): 74 .space 1024 75 76#define ACQUIRE_INTERLOCK \ 77 DISABLE_INTERRUPTS ;\ 78 srl %o0, 3, %o5 /* get lock address */ ;\ 79 and %o5, 1023, %o5 ;\ 80 sethi %hi(_C_LABEL(_atomic_cas_locktab)), %o3 ;\ 81 add %o5, %o3, %o5 ;\ 82 ;\ 83 /* %o5 has interlock address */ ;\ 84 ;\ 851: ldstub [%o5], %o3 /* acquire lock */ ;\ 86 tst %o3 ;\ 87 bz,a 2f ;\ 88 nop ;\ 89 nop ;\ 90 nop ;\ 91 b,a 1b /* spin */ ;\ 92 nop ;\ 93 /* We now hold the interlock */ ;\ 942: 95 96#define RELEASE_INTERLOCK \ 97 stb %g0, [%o5] /* release interlock */ ;\ 98 RESTORE_INTERRUPTS 99 100#else /* ! MULTIPROCESSOR */ 101 102#define ACQUIRE_INTERLOCK DISABLE_INTERRUPTS 103 104#define RELEASE_INTERLOCK RESTORE_INTERRUPTS 105 106#endif /* MULTIPROCESSOR */ 107 108 .text 109 110/* 111 * The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts 112 * and use an interlock. 113 * 114 * XXX On single CPU systems, this should use a restartable sequence: 115 * XXX there we don't need the overhead of interlocking. 116 * 117 * XXX NOTE! The interlock trick only works if EVERYTHING writes to 118 * XXX the memory cell through this code path! 119 */ 120ENTRY_NOPROFILE(_atomic_cas_32) 121 ACQUIRE_INTERLOCK 122 ! %o4 has saved PSR value 123 ! %o5 has interlock address 124 125 ld [%o0], %o3 ! get old value 126 cmp %o1, %o3 ! old == new? 127 beq,a 3f ! yes, do the store 128 st %o2, [%o0] ! (in the delay slot) 129 1303: RELEASE_INTERLOCK 131 132 retl 133 mov %o3, %o0 ! return old value 134 135ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32) 136ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32) 137STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32) 138ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32) 139STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32) 140ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32) 141STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32) 142