xref: /netbsd-src/common/lib/libc/arch/sparc/atomic/atomic_cas.S (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1/*	$NetBSD: atomic_cas.S,v 1.8 2009/01/10 23:36:22 pooka Exp $	*/
2
3/*-
4 * Copyright (c) 2007, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran and Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include "atomic_op_asm.h"
33
34#if defined(_KERNEL) && !defined(_RUMPKERNEL)
35#define _HARDKERNEL
36#endif
37
38#if defined(_HARKDERNEL)
39
40#include <machine/psl.h>
41
42#include "opt_multiprocessor.h"
43
44#define	DISABLE_INTERRUPTS						 \
45	rd	%psr, %o4			/* disable interrupts */;\
46	or	%o4, PSR_PIL, %o5					;\
47	wr	%o5, 0, %psr						;\
48	nop								;\
49	nop								;\
50	nop
51
52#define	RESTORE_INTERRUPTS						 \
53	wr	%o4, 0, %psr			/* enable interrupts */	;\
54	nop								;\
55	nop								;\
56	nop
57
58#else	/* _HARDKERNEL */
59
60#define	MULTIPROCESSOR	1
61#define	DISABLE_INTERRUPTS		/* nothing */
62#define	RESTORE_INTERRUPTS		/* nothing */
63
64#endif	/* _HARDKERNEL */
65
66#if defined(MULTIPROCESSOR)
67	.section .bss
68	.align	1024
69OTYPE(_C_LABEL(_atomic_cas_locktab))
70_C_LABEL(_atomic_cas_locktab):
71	.space	1024
72
73#define	ACQUIRE_INTERLOCK						 \
74	DISABLE_INTERRUPTS						;\
75	srl	%o0, 3, %o5			/* get lock address */	;\
76	and	%o5, 1023, %o5						;\
77	sethi	%hi(_C_LABEL(_atomic_cas_locktab)), %o3			;\
78	add	%o5, %o3, %o5						;\
79									;\
80	/* %o5 has interlock address */					;\
81									;\
821:	ldstub	[%o5], %o3			/* acquire lock */	;\
83	tst	%o3							;\
84	bz,a	2f							;\
85	 nop								;\
86	nop								;\
87	nop								;\
88	b,a	1b				/* spin	*/		;\
89	 nop								;\
90	/* We now hold the interlock */					;\
912:
92
93#define	RELEASE_INTERLOCK						 \
94	stb	%g0, [%o5]			/* release interlock */	;\
95	RESTORE_INTERRUPTS
96
97#else /* ! MULTIPROCESSOR */
98
99#define	ACQUIRE_INTERLOCK	DISABLE_INTERRUPTS
100
101#define	RELEASE_INTERLOCK	RESTORE_INTERRUPTS
102
103#endif /* MULTIPROCESSOR */
104
105	.text
106
107/*
108 * The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts
109 * and use an interlock.
110 *
111 * XXX On single CPU systems, this should use a restartable sequence:
112 * XXX there we don't need the overhead of interlocking.
113 *
114 * XXX NOTE!  The interlock trick only works if EVERYTHING writes to
115 * XXX the memory cell through this code path!
116 */
117ENTRY(_atomic_cas_32)
118	ACQUIRE_INTERLOCK
119	! %o4 has saved PSR value
120	! %o5 has interlock address
121
122	ld	[%o0], %o3			! get old value
123	cmp	%o1, %o3			! old == new?
124	beq,a	3f				! yes, do the store
125	 st	%o2, [%o0]			! (in the delay slot)
126
1273:	RELEASE_INTERLOCK
128
129	retl
130	 mov	%o3, %o0			! return old value
131
132ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
133ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
134STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
135ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
136STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
137ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
138STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
139
140ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
141STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
142ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
143STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
144ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
145STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
146ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
147STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
148