1/* $NetBSD: atomic_dec.S,v 1.7 2020/08/06 10:00:21 skrll Exp $ */ 2 3/*- 4 * Copyright (c) 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <machine/asm.h> 30#include "atomic_op_asm.h" 31 32RCSID("$NetBSD: atomic_dec.S,v 1.7 2020/08/06 10:00:21 skrll Exp $") 33 34 .text 35 .set noreorder 36#ifdef _KERNEL_OPT 37#include "opt_cputype.h" 38#ifndef MIPS3_LOONGSON2F 39 .set noat 40 .set nomacro 41#endif 42#else /* _KERNEL_OPT */ 43 .set noat 44 .set nomacro 45#endif /* _KERNEL_OPT */ 46 47LEAF(_atomic_dec_32) 48#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2) 49 li t0, -1 50 saa t0, (a0) 51#else 52 LLSCSYNC 531: INT_LL t0, 0(a0) 54 nop 55 INT_ADDU t0, -1 56 INT_SC t0, 0(a0) 57 beq t0, zero, 1b 58 nop 59#endif 60 j ra 61 nop 62END(_atomic_dec_32) 63ATOMIC_OP_ALIAS(atomic_dec_32, _atomic_dec_32) 64 65LEAF(_atomic_dec_32_nv) 66 LLSCSYNC 671: INT_LL v0, 0(a0) 68 nop 69 INT_ADDU v0, -1 70 move t0, v0 71 INT_SC t0, 0(a0) 72 beq t0, zero, 1b 73 nop 74 j ra 75 nop 76END(_atomic_dec_32_nv) 77ATOMIC_OP_ALIAS(atomic_dec_32_nv, _atomic_dec_32_nv) 78 79#if !defined(__mips_o32) 80LEAF(_atomic_dec_64) 81#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2) 82 li t0, -1 83 saad t0, (a0) 84#else 85 LLSCSYNC 861: REG_LL t0, 0(a0) 87 nop 88 REG_ADDU t0, -1 89 REG_SC t0, 0(a0) 90 beq t0, zero, 1b 91 nop 92#endif 93 j ra 94 nop 95END(_atomic_dec_64) 96ATOMIC_OP_ALIAS(atomic_dec_64, _atomic_dec_64) 97 98LEAF(_atomic_dec_64_nv) 99 LLSCSYNC 1001: REG_LL v0, 0(a0) 101 nop 102 REG_ADDU v0, -1 103 move t0, v0 104 REG_SC t0, 0(a0) 105 beq t0, zero, 1b 106 nop 107 j ra 108 nop 109END(_atomic_dec_64_nv) 110ATOMIC_OP_ALIAS(atomic_dec_64_nv, _atomic_dec_64_nv) 111#endif 112 113#ifdef _LP64 114STRONG_ALIAS(_atomic_dec_ptr, _atomic_dec_64) 115STRONG_ALIAS(_atomic_dec_ptr_nv, _atomic_dec_64_nv) 116STRONG_ALIAS(_atomic_dec_ulong, _atomic_dec_64) 117STRONG_ALIAS(_atomic_dec_ulong_nv, _atomic_dec_64_nv) 118#else 119STRONG_ALIAS(_atomic_dec_ptr, _atomic_dec_32) 120STRONG_ALIAS(_atomic_dec_ptr_nv, _atomic_dec_32_nv) 121STRONG_ALIAS(_atomic_dec_ulong, _atomic_dec_32) 122STRONG_ALIAS(_atomic_dec_ulong_nv, _atomic_dec_32_nv) 123#endif 124STRONG_ALIAS(_atomic_dec_uint, _atomic_dec_32) 125STRONG_ALIAS(_atomic_dec_uint_nv, _atomic_dec_32_nv) 126 127ATOMIC_OP_ALIAS(atomic_dec_ptr, _atomic_dec_ptr) 128ATOMIC_OP_ALIAS(atomic_dec_ptr_nv, _atomic_dec_ptr_nv) 129ATOMIC_OP_ALIAS(atomic_dec_uint, _atomic_dec_uint) 130ATOMIC_OP_ALIAS(atomic_dec_uint_nv, _atomic_dec_uint_nv) 131ATOMIC_OP_ALIAS(atomic_dec_ulong, _atomic_dec_ulong) 132ATOMIC_OP_ALIAS(atomic_dec_ulong_nv, _atomic_dec_ulong_nv) 133