xref: /netbsd-src/common/lib/libc/arch/mips/atomic/atomic_and.S (revision bf8d907e758fe420eb478dc88a22d6c1c0a4be61)
1/*	$NetBSD: atomic_and.S,v 1.6 2020/08/06 10:00:21 skrll Exp $	*/
2
3/*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <machine/asm.h>
30#include "atomic_op_asm.h"
31
32RCSID("$NetBSD: atomic_and.S,v 1.6 2020/08/06 10:00:21 skrll Exp $")
33
34	.text
35	.set	noreorder
36#ifdef _KERNEL_OPT
37#include "opt_cputype.h"
38#ifndef MIPS3_LOONGSON2F
39	.set	noat
40	.set	nomacro
41#endif
42#else /* _KERNEL_OPT */
43	.set	noat
44	.set	nomacro
45#endif /* _KERNEL_OPT */
46
47
48LEAF(_atomic_and_32)
49	LLSCSYNC
501:	INT_LL		t0, 0(a0)
51	 nop
52	and		t0, a1
53	INT_SC		t0, 0(a0)
54	beq		t0, zero, 1b
55 	 nop
56	j		ra
57	 nop
58END(_atomic_and_32)
59ATOMIC_OP_ALIAS(atomic_and_32, _atomic_and_32)
60
61LEAF(_atomic_and_32_nv)
62	LLSCSYNC
631:	INT_LL		v0, 0(a0)
64	 nop
65	and		v0, a1
66	move		t0, v0
67	INT_SC		t0, 0(a0)
68	beq		t0, zero, 1b
69 	 nop
70	j		ra
71	 nop
72END(_atomic_and_32_nv)
73ATOMIC_OP_ALIAS(atomic_and_32_nv, _atomic_and_32_nv)
74
75#if !defined(__mips_o32)
76LEAF(_atomic_and_64)
77	LLSCSYNC
781:	REG_LL		t0, 0(a0)
79	 nop
80	and		t0, a1
81	REG_SC		t0, 0(a0)
82	beq		t0, zero, 1b
83 	 nop
84	j		ra
85	 nop
86END(_atomic_and_64)
87ATOMIC_OP_ALIAS(atomic_and_64, _atomic_and_64)
88
89LEAF(_atomic_and_64_nv)
90	LLSCSYNC
911:	REG_LL		v0, 0(a0)
92	 nop
93	and		v0, a1
94	move		t0, v0
95	REG_SC		t0, 0(a0)
96	beq		t0, zero, 1b
97 	 nop
98	j		ra
99	 nop
100END(_atomic_and_64_nv)
101ATOMIC_OP_ALIAS(atomic_and_64_nv, _atomic_and_64_nv)
102#endif
103
104#ifdef _LP64
105STRONG_ALIAS(_atomic_and_ulong,		_atomic_and_64)
106STRONG_ALIAS(_atomic_and_ulong_nv,	_atomic_and_64_nv)
107#else
108STRONG_ALIAS(_atomic_and_ulong,		_atomic_and_32)
109STRONG_ALIAS(_atomic_and_ulong_nv,	_atomic_and_32_nv)
110#endif
111STRONG_ALIAS(_atomic_and_uint,		_atomic_and_32)
112STRONG_ALIAS(_atomic_and_uint_nv,	_atomic_and_32_nv)
113
114ATOMIC_OP_ALIAS(atomic_and_uint,	_atomic_and_uint)
115ATOMIC_OP_ALIAS(atomic_and_uint_nv,	_atomic_and_uint_nv)
116ATOMIC_OP_ALIAS(atomic_and_ulong,	_atomic_and_ulong)
117ATOMIC_OP_ALIAS(atomic_and_ulong_nv,	_atomic_and_ulong_nv)
118