xref: /netbsd-src/common/lib/libc/arch/arm/atomic/atomic_nand_64.S (revision 8e8c0784cfc7904978df419ced10b97609ae1746)
1/*	$NetBSD: atomic_nand_64.S,v 1.7 2021/07/28 07:32:20 skrll Exp $	*/
2/*-
3 * Copyright (c) 2013 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas <matt@3am-software.com>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include "atomic_op_asm.h"
32
33#if defined(_ARM_ARCH_6)
34
35ENTRY_NP(_atomic_nand_64_nv)
36	push	{r3, r4}		/* save temporary */
37#ifndef __ARM_EABI__
38	mov	r3, r2
39	mov	r2, r1
40#endif
41	mov	ip, r0			/* need r0 for return value */
421:	ldrexd	r0, r1, [ip]		/* load old value */
43	ands	r0, r0, r2		/* calculate new value step 1 */
44	ands	r1, r1, r3		/* calculate new value step 2 */
45	mvns	r0, r0			/* ... complement for new value */
46	mvns	r1, r1			/* ... complement for new value */
47	strexd	r4, r0, r1, [ip]	/* try to store */
48	cmp	r4, #0			/*   succeed? */
49	bne	1b			/*     no, try again? */
50	pop	{r3, r4}		/* restore temporary */
51	RET				/* return new value */
52END(_atomic_nand_64_nv)
53
54STRONG_ALIAS(_atomic_nand_64,_atomic_nand_64_nv)
55ATOMIC_OP_ALIAS(atomic_nand_64_nv,_atomic_nand_64_nv)
56ATOMIC_OP_ALIAS(atomic_nand_64,_atomic_nand_64_nv)
57
58ENTRY_NP(__sync_nand_and_fetch_8)
59	push	{r4, lr}
60	DMB
61	bl	_atomic_nand_64_nv
62	DMB
63	pop	{r4, pc}
64END(__sync_nand_and_fetch_8)
65
66#endif /* _ARM_ARCH_6 */
67