1*8e8c0784Sskrll/* $NetBSD: atomic_nand_32.S,v 1.5 2021/07/28 07:32:20 skrll Exp $ */ 2918e319dSmatt 3918e319dSmatt/*- 4918e319dSmatt * Copyright (c) 2013 The NetBSD Foundation, Inc. 5918e319dSmatt * All rights reserved. 6918e319dSmatt * 7918e319dSmatt * This code is derived from software contributed to The NetBSD Foundation 8918e319dSmatt * by Matt Thomas <matt@3am-software.com> 9918e319dSmatt * 10918e319dSmatt * Redistribution and use in source and binary forms, with or without 11918e319dSmatt * modification, are permitted provided that the following conditions 12918e319dSmatt * are met: 13918e319dSmatt * 1. Redistributions of source code must retain the above copyright 14918e319dSmatt * notice, this list of conditions and the following disclaimer. 15918e319dSmatt * 2. Redistributions in binary form must reproduce the above copyright 16918e319dSmatt * notice, this list of conditions and the following disclaimer in the 17918e319dSmatt * documentation and/or other materials provided with the distribution. 18918e319dSmatt * 19918e319dSmatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20918e319dSmatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21918e319dSmatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22918e319dSmatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23918e319dSmatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24918e319dSmatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25918e319dSmatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26918e319dSmatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27918e319dSmatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28918e319dSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29918e319dSmatt * POSSIBILITY OF SUCH DAMAGE. 30918e319dSmatt */ 31918e319dSmatt 32918e319dSmatt#include "atomic_op_asm.h" 33918e319dSmatt 345e911a38Sskrll#if defined(_ARM_ARCH_6) 35918e319dSmatt 36918e319dSmattENTRY_NP(_atomic_nand_32) 37918e319dSmatt mov ip, r0 38918e319dSmatt1: ldrex r0, [ip] /* load old value (to be returned) */ 39ed17c729Sskrll ands r3, r0, r1 /* calculate new value step 1 */ 40ed17c729Sskrll mvns r3, r3 /* ... complement for new value */ 41918e319dSmatt strex r2, r3, [ip] /* try to store */ 42918e319dSmatt cmp r2, #0 /* succeed? */ 43918e319dSmatt bne 1b /* no, try again */ 44918e319dSmatt RET /* return old value */ 45918e319dSmattEND(_atomic_nand_32) 46918e319dSmatt 47918e319dSmattATOMIC_OP_ALIAS(atomic_nand_32,_atomic_nand_32) 48918e319dSmattATOMIC_OP_ALIAS(atomic_nand_uint,_atomic_nand_32) 49918e319dSmattATOMIC_OP_ALIAS(atomic_nand_ulong,_atomic_nand_32) 50918e319dSmattSTRONG_ALIAS(_atomic_nand_uint,_atomic_nand_32) 51918e319dSmattSTRONG_ALIAS(_atomic_nand_ulong,_atomic_nand_32) 52918e319dSmatt 53*8e8c0784SskrllENTRY_NP(__sync_fetch_and_nand_4) 54*8e8c0784Sskrll push {r4, lr} 55*8e8c0784Sskrll DMB 56*8e8c0784Sskrll bl _atomic_nand_32 57*8e8c0784Sskrll DMB 58*8e8c0784Sskrll pop {r4, pc} 59*8e8c0784SskrllEND(__sync_fetch_and_nand_4) 60*8e8c0784Sskrll 61*8e8c0784Sskrll 62918e319dSmattENTRY_NP(_atomic_nand_32_nv) 63918e319dSmatt mov ip, r0 /* need r0 for return value */ 64918e319dSmatt1: ldrex r0, [ip] /* load old value */ 65ed17c729Sskrll ands r0, r0, r1 /* calculate new value step 1 */ 66ed17c729Sskrll mvns r0, r0 /* ... complement for new value */ 67918e319dSmatt strex r2, r0, [ip] /* try to store */ 68918e319dSmatt cmp r2, #0 /* succeed? */ 69918e319dSmatt bne 1b /* no, try again? */ 70918e319dSmatt RET /* return new value */ 71918e319dSmattEND(_atomic_nand_32_nv) 72918e319dSmatt 73918e319dSmattATOMIC_OP_ALIAS(atomic_nand_32_nv,_atomic_nand_32_nv) 74918e319dSmattATOMIC_OP_ALIAS(atomic_nand_uint_nv,_atomic_nand_32_nv) 75918e319dSmattATOMIC_OP_ALIAS(atomic_nand_ulong_nv,_atomic_nand_32_nv) 76918e319dSmattSTRONG_ALIAS(_atomic_nand_uint_nv,_atomic_nand_32_nv) 77918e319dSmattSTRONG_ALIAS(_atomic_nand_ulong_nv,_atomic_nand_32_nv) 78918e319dSmatt 79*8e8c0784SskrllENTRY_NP(__sync_nand_and_fetch_4) 80*8e8c0784Sskrll push {r4, lr} 81*8e8c0784Sskrll DMB 82*8e8c0784Sskrll bl _atomic_nand_32_nv 83*8e8c0784Sskrll DMB 84*8e8c0784Sskrll pop {r4, pc} 85*8e8c0784SskrllEND(__sync_nand_and_fetch_4) 86*8e8c0784Sskrll 87*8e8c0784Sskrll 88918e319dSmatt#endif /* _ARM_ARCH_6 */ 89