1/* $NetBSD: atomic_cas_64.S,v 1.1 2012/09/11 20:51:25 matt Exp $ */ 2/*- 3 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt@3am-software.com> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include "atomic_op_asm.h" 32 33#if defined(_ARM_ARCH_6) 34/* 35 * ARMv6 has load-exclusive/store-exclusive which works for both user 36 * and kernel. 37 */ 38ENTRY_NP(_atomic_cas_64) 39 stmfd sp!, {r4, r5, r6} /* save temporaries */ 40 mov r6, r0 /* we need r0 for return value */ 41#ifdef __ARM_EABI__ 42 ldrd r4, [sp] /* fetch new value */ 43#else 44 ldr r5, [sp, #4] /* fetch new value */ 45 ldr r4, [sp, #0] /* fetch new value */ 46 mov r3, r2 /* r2 will be overwritten by r1 which ... */ 47 mov r2, r1 /* r1 will be overwritten by ldrexd */ 48#endif 491: 50 ldrexd r0, [r6] /* load current value */ 51 teq r0, r2 /* compare to old? 1st half */ 52 teqeq r1, r3 /* compare to old? 2nd half */ 53 bne 2f /* jump to return if different */ 54 strexd ip, r4, [r6] /* store new value */ 55 cmp ip, #0 /* succeed? */ 56 bne 1b /* nope, try again. */ 57#ifdef _ARM_ARCH_7 58 dsb 59#else 60 mcr p15, 0, ip, c7, c10, 4 /* data synchronization barrier */ 61#endif 622: 63 ldmfd sp!, {r4, r5, r6} /* restore temporaries */ 64 RET /* return. */ 65 END(_atomic_cas_64) 66 67ATOMIC_OP_ALIAS(atomic_cas_64,_atomic_cas_64) 68 69#endif /* _ARCH_ARM_6 */ 70