xref: /netbsd-src/common/lib/libc/arch/arm/atomic/atomic_and_32.S (revision 8e8c0784cfc7904978df419ced10b97609ae1746)
1*8e8c0784Sskrll/*	$NetBSD: atomic_and_32.S,v 1.10 2021/07/28 07:32:20 skrll Exp $	*/
2c7572a70Smatt
3c7572a70Smatt/*-
4c7572a70Smatt * Copyright (c) 2008 The NetBSD Foundation, Inc.
5c7572a70Smatt * All rights reserved.
6c7572a70Smatt *
7c7572a70Smatt * This code is derived from software contributed to The NetBSD Foundation
8c7572a70Smatt * by Matt Thomas <matt@3am-software.com>
9c7572a70Smatt *
10c7572a70Smatt * Redistribution and use in source and binary forms, with or without
11c7572a70Smatt * modification, are permitted provided that the following conditions
12c7572a70Smatt * are met:
13c7572a70Smatt * 1. Redistributions of source code must retain the above copyright
14c7572a70Smatt *    notice, this list of conditions and the following disclaimer.
15c7572a70Smatt * 2. Redistributions in binary form must reproduce the above copyright
16c7572a70Smatt *    notice, this list of conditions and the following disclaimer in the
17c7572a70Smatt *    documentation and/or other materials provided with the distribution.
18c7572a70Smatt *
19c7572a70Smatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20c7572a70Smatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21c7572a70Smatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22c7572a70Smatt * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23c7572a70Smatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24c7572a70Smatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25c7572a70Smatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26c7572a70Smatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27c7572a70Smatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28c7572a70Smatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29c7572a70Smatt * POSSIBILITY OF SUCH DAMAGE.
30c7572a70Smatt */
31c7572a70Smatt
32c7572a70Smatt#include "atomic_op_asm.h"
33c7572a70Smatt
345e911a38Sskrll#if defined(_ARM_ARCH_6)
35c7572a70Smatt
36c7572a70SmattENTRY_NP(_atomic_and_32)
37918e319dSmatt	mov	ip, r0
38918e319dSmatt1:	ldrex	r0, [ip]		/* load old value (to be returned) */
39918e319dSmatt	ands	r3, r0, r1		/* calculate new value */
40918e319dSmatt	strex	r2, r3, [ip]		/* try to store */
41d6502094Smatt	cmp	r2, #0			/*   succeed? */
42c7572a70Smatt	bne	1b			/*     no, try again */
43c7572a70Smatt	RET				/* return old value */
44c7572a70SmattEND(_atomic_and_32)
45d6502094Smatt
46c7572a70SmattATOMIC_OP_ALIAS(atomic_and_32,_atomic_and_32)
47c7572a70SmattATOMIC_OP_ALIAS(atomic_and_uint,_atomic_and_32)
48c7572a70SmattATOMIC_OP_ALIAS(atomic_and_ulong,_atomic_and_32)
49504e8e68SjoergCRT_ALIAS(__atomic_fetch_and_4,_atomic_and_32)
50c7572a70SmattSTRONG_ALIAS(_atomic_and_uint,_atomic_and_32)
51c7572a70SmattSTRONG_ALIAS(_atomic_and_ulong,_atomic_and_32)
52c7572a70Smatt
53*8e8c0784SskrllENTRY_NP(__sync_fetch_and_and_4)
54*8e8c0784Sskrll	push	{r4, lr}
55*8e8c0784Sskrll	DMB
56*8e8c0784Sskrll	bl	_atomic_and_32
57*8e8c0784Sskrll	DMB
58*8e8c0784Sskrll	pop	{r4, pc}
59*8e8c0784SskrllEND(__sync_fetch_and_and_4)
60*8e8c0784Sskrll
61*8e8c0784Sskrll
62c7572a70SmattENTRY_NP(_atomic_and_32_nv)
63c1116705Smatt	mov	ip, r0			/* need r0 for return value */
64c1116705Smatt1:	ldrex	r0, [ip]		/* load old value */
65c1116705Smatt	ands	r0, r0, r1		/* calculate new value (return value) */
66c1116705Smatt	strex	r2, r0, [ip]		/* try to store */
67c7572a70Smatt	cmp	r2, #0			/*   succeed? */
68c7572a70Smatt	bne	1b			/*     no, try again? */
69c7572a70Smatt	RET				/* return new value */
70c7572a70SmattEND(_atomic_and_32_nv)
71d6502094Smatt
72c7572a70SmattATOMIC_OP_ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
73c7572a70SmattATOMIC_OP_ALIAS(atomic_and_uint_nv,_atomic_and_32_nv)
74c7572a70SmattATOMIC_OP_ALIAS(atomic_and_ulong_nv,_atomic_and_32_nv)
75c7572a70SmattSTRONG_ALIAS(_atomic_and_uint_nv,_atomic_and_32_nv)
76c7572a70SmattSTRONG_ALIAS(_atomic_and_ulong_nv,_atomic_and_32_nv)
77c7572a70Smatt
78*8e8c0784SskrllENTRY_NP(__sync_and_and_fetch_4)
79*8e8c0784Sskrll	push	{r4, lr}
80*8e8c0784Sskrll	DMB
81*8e8c0784Sskrll	bl	_atomic_and_32_nv
82*8e8c0784Sskrll	DMB
83*8e8c0784Sskrll	pop	{r4, pc}
84*8e8c0784SskrllEND(__sync_and_and_fetch_4)
85*8e8c0784Sskrll
86c7572a70Smatt#endif /* _ARM_ARCH_6 */
87