1*0a6a1f1dSLionel Sambuc//===-- floatunssidfvfp.S - Implement floatunssidfvfp ---------------------===// 2*0a6a1f1dSLionel Sambuc// 3*0a6a1f1dSLionel Sambuc// The LLVM Compiler Infrastructure 4*0a6a1f1dSLionel Sambuc// 5*0a6a1f1dSLionel Sambuc// This file is dual licensed under the MIT and the University of Illinois Open 6*0a6a1f1dSLionel Sambuc// Source Licenses. See LICENSE.TXT for details. 7*0a6a1f1dSLionel Sambuc// 8*0a6a1f1dSLionel Sambuc//===----------------------------------------------------------------------===// 9*0a6a1f1dSLionel Sambuc 10*0a6a1f1dSLionel Sambuc#include "../assembly.h" 11*0a6a1f1dSLionel Sambuc 12*0a6a1f1dSLionel Sambuc// 13*0a6a1f1dSLionel Sambuc// extern double __floatunssidfvfp(unsigned int a); 14*0a6a1f1dSLionel Sambuc// 15*0a6a1f1dSLionel Sambuc// Converts a 32-bit int to a double precision float. 16*0a6a1f1dSLionel Sambuc// Uses Darwin calling convention where a double precision result is 17*0a6a1f1dSLionel Sambuc// return in GPR register pair. 18*0a6a1f1dSLionel Sambuc// 19*0a6a1f1dSLionel Sambuc .syntax unified 20*0a6a1f1dSLionel Sambuc .p2align 2 21*0a6a1f1dSLionel SambucDEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp) 22*0a6a1f1dSLionel Sambuc vmov s15, r0 // move int to float register s15 23*0a6a1f1dSLionel Sambuc vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7 24*0a6a1f1dSLionel Sambuc vmov r0, r1, d7 // move d7 to result register pair r0/r1 25*0a6a1f1dSLionel Sambuc bx lr 26*0a6a1f1dSLionel SambucEND_COMPILERRT_FUNCTION(__floatunssidfvfp) 27