1*0a6a1f1dSLionel Sambuc//===-- fixdfsivfp.S - Implement fixdfsivfp -----------------------===// 2*0a6a1f1dSLionel Sambuc// 3*0a6a1f1dSLionel Sambuc// The LLVM Compiler Infrastructure 4*0a6a1f1dSLionel Sambuc// 5*0a6a1f1dSLionel Sambuc// This file is dual licensed under the MIT and the University of Illinois Open 6*0a6a1f1dSLionel Sambuc// Source Licenses. See LICENSE.TXT for details. 7*0a6a1f1dSLionel Sambuc// 8*0a6a1f1dSLionel Sambuc//===----------------------------------------------------------------------===// 9*0a6a1f1dSLionel Sambuc 10*0a6a1f1dSLionel Sambuc#include "../assembly.h" 11*0a6a1f1dSLionel Sambuc 12*0a6a1f1dSLionel Sambuc// 13*0a6a1f1dSLionel Sambuc// extern int __fixdfsivfp(double a); 14*0a6a1f1dSLionel Sambuc// 15*0a6a1f1dSLionel Sambuc// Converts double precision float to a 32-bit int rounding towards zero. 16*0a6a1f1dSLionel Sambuc// Uses Darwin calling convention where a double precision parameter is 17*0a6a1f1dSLionel Sambuc// passed in GPR register pair. 18*0a6a1f1dSLionel Sambuc// 19*0a6a1f1dSLionel Sambuc .syntax unified 20*0a6a1f1dSLionel Sambuc .p2align 2 21*0a6a1f1dSLionel SambucDEFINE_COMPILERRT_FUNCTION(__fixdfsivfp) 22*0a6a1f1dSLionel Sambuc vmov d7, r0, r1 // load double register from R0/R1 23*0a6a1f1dSLionel Sambuc vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15 24*0a6a1f1dSLionel Sambuc vmov r0, s15 // move s15 to result register 25*0a6a1f1dSLionel Sambuc bx lr 26*0a6a1f1dSLionel SambucEND_COMPILERRT_FUNCTION(__fixdfsivfp) 27