xref: /minix3/sys/arch/x86/include/smbiosvar.h (revision 1cd76c751364e6270e8d5a0daebc6d3d169baf4d)
1*1cd76c75SBen Gras /*	$NetBSD: smbiosvar.h,v 1.3 2008/04/16 16:06:51 cegger Exp $ */
2*1cd76c75SBen Gras /*
3*1cd76c75SBen Gras  * Copyright (c) 2006 Gordon Willem Klok <gklok@cogeco.ca>
4*1cd76c75SBen Gras  * Copyright (c) 2005 Jordan Hargrave
5*1cd76c75SBen Gras  * All rights reserved.
6*1cd76c75SBen Gras  *
7*1cd76c75SBen Gras  * Redistribution and use in source and binary forms, with or without
8*1cd76c75SBen Gras  * modification, are permitted provided that the following conditions
9*1cd76c75SBen Gras  * are met:
10*1cd76c75SBen Gras  * 1. Redistributions of source code must retain the above copyright
11*1cd76c75SBen Gras  *    notice, this list of conditions and the following disclaimer.
12*1cd76c75SBen Gras  * 2. Redistributions in binary form must reproduce the above copyright
13*1cd76c75SBen Gras  *    notice, this list of conditions and the following disclaimer in the
14*1cd76c75SBen Gras  *    documentation and/or other materials provided with the distribution.
15*1cd76c75SBen Gras  *
16*1cd76c75SBen Gras  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17*1cd76c75SBen Gras  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18*1cd76c75SBen Gras  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19*1cd76c75SBen Gras  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR
20*1cd76c75SBen Gras  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21*1cd76c75SBen Gras  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22*1cd76c75SBen Gras  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23*1cd76c75SBen Gras  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24*1cd76c75SBen Gras  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25*1cd76c75SBen Gras  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26*1cd76c75SBen Gras  * SUCH DAMAGE.
27*1cd76c75SBen Gras  */
28*1cd76c75SBen Gras #ifndef _I386_SMBIOSVAR_
29*1cd76c75SBen Gras #define _I386_SMBIOSVAR_
30*1cd76c75SBen Gras 
31*1cd76c75SBen Gras #define SMBIOS_START			0xf0000
32*1cd76c75SBen Gras #define SMBIOS_END			0xfffff
33*1cd76c75SBen Gras 
34*1cd76c75SBen Gras #define SMBIOS_UUID_NPRESENT		0x1
35*1cd76c75SBen Gras #define SMBIOS_UUID_NSET		0x2
36*1cd76c75SBen Gras 
37*1cd76c75SBen Gras /*
38*1cd76c75SBen Gras  * Section 3.5 of "UUIDs and GUIDs" found at
39*1cd76c75SBen Gras  * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt
40*1cd76c75SBen Gras  * specifies the string repersentation of a UUID.
41*1cd76c75SBen Gras  */
42*1cd76c75SBen Gras #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
43*1cd76c75SBen Gras #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */
44*1cd76c75SBen Gras 
45*1cd76c75SBen Gras struct smbios_entry {
46*1cd76c75SBen Gras 	uint8_t	mjr;
47*1cd76c75SBen Gras 	uint8_t	min;
48*1cd76c75SBen Gras 	uint8_t	*addr;
49*1cd76c75SBen Gras 	uint16_t	len;
50*1cd76c75SBen Gras 	uint16_t	count;
51*1cd76c75SBen Gras };
52*1cd76c75SBen Gras 
53*1cd76c75SBen Gras struct smbhdr {
54*1cd76c75SBen Gras 	uint32_t	sig;		/* "_SM_" */
55*1cd76c75SBen Gras 	uint8_t 	checksum;	/* Entry point checksum */
56*1cd76c75SBen Gras 	uint8_t 	len;		/* Entry point structure length */
57*1cd76c75SBen Gras 	uint8_t	majrev;		/* Specification major revision */
58*1cd76c75SBen Gras 	uint8_t	minrev;		/* Specification minor revision */
59*1cd76c75SBen Gras 	uint16_t	mss;		/* Maximum Structure Size */
60*1cd76c75SBen Gras 	uint8_t 	epr;		/* Entry Point Revision */
61*1cd76c75SBen Gras 	uint8_t 	fa[5];		/* value determined by EPR */
62*1cd76c75SBen Gras 	uint8_t	sasig[5];  	/* Secondary Anchor "_DMI_" */
63*1cd76c75SBen Gras 	uint8_t	sachecksum;	/* Secondary Checksum */
64*1cd76c75SBen Gras 	uint16_t	size;   	/* Length of structure table in bytes */
65*1cd76c75SBen Gras 	uint32_t	addr;	  	/* Structure table address */
66*1cd76c75SBen Gras 	uint16_t	count;		/* Number of SMBIOS structures */
67*1cd76c75SBen Gras 	uint8_t	rev;  		/* BCD revision */
68*1cd76c75SBen Gras } __packed;
69*1cd76c75SBen Gras 
70*1cd76c75SBen Gras struct smbtblhdr {
71*1cd76c75SBen Gras 	uint8_t	type;
72*1cd76c75SBen Gras 	uint8_t	size;
73*1cd76c75SBen Gras 	uint16_t	handle;
74*1cd76c75SBen Gras } __packed;
75*1cd76c75SBen Gras 
76*1cd76c75SBen Gras struct smbtable {
77*1cd76c75SBen Gras 	struct smbtblhdr *hdr;
78*1cd76c75SBen Gras 	void		 *tblhdr;
79*1cd76c75SBen Gras 	uint32_t	 cookie;
80*1cd76c75SBen Gras };
81*1cd76c75SBen Gras 
82*1cd76c75SBen Gras #define	SMBIOS_TYPE_BIOS		0
83*1cd76c75SBen Gras #define	SMBIOS_TYPE_SYSTEM		1
84*1cd76c75SBen Gras #define	SMBIOS_TYPE_BASEBOARD		2
85*1cd76c75SBen Gras #define	SMBIOS_TYPE_ENCLOSURE		3
86*1cd76c75SBen Gras #define	SMBIOS_TYPE_PROCESSOR		4
87*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMCTRL		5
88*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMMOD		6
89*1cd76c75SBen Gras #define	SMBIOS_TYPE_CACHE		7
90*1cd76c75SBen Gras #define	SMBIOS_TYPE_PORT		8
91*1cd76c75SBen Gras #define	SMBIOS_TYPE_SLOTS		9
92*1cd76c75SBen Gras #define	SMBIOS_TYPE_OBD			10
93*1cd76c75SBen Gras #define	SMBIOS_TYPE_OEM			11
94*1cd76c75SBen Gras #define	SMBIOS_TYPE_SYSCONFOPT		12
95*1cd76c75SBen Gras #define	SMBIOS_TYPE_BIOSLANG		13
96*1cd76c75SBen Gras #define	SMBIOS_TYPE_GROUPASSOC		14
97*1cd76c75SBen Gras #define	SMBIOS_TYPE_SYSEVENTLOG		15
98*1cd76c75SBen Gras #define	SMBIOS_TYPE_PHYMEM		16
99*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMDEV		17
100*1cd76c75SBen Gras #define	SMBIOS_TYPE_ECCINFO32		18
101*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMMAPARRAYADDR	19
102*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMMAPDEVADDR	20
103*1cd76c75SBen Gras #define	SMBIOS_TYPE_INBUILTPOINT	21
104*1cd76c75SBen Gras #define	SMBIOS_TYPE_PORTBATT		22
105*1cd76c75SBen Gras #define	SMBIOS_TYPE_SYSRESET		23
106*1cd76c75SBen Gras #define	SMBIOS_TYPE_HWSECUIRTY		24
107*1cd76c75SBen Gras #define	SMBIOS_TYPE_PWRCTRL		25
108*1cd76c75SBen Gras #define	SMBIOS_TYPE_VOLTPROBE		26
109*1cd76c75SBen Gras #define	SMBIOS_TYPE_COOLING		27
110*1cd76c75SBen Gras #define	SMBIOS_TYPE_TEMPPROBE		28
111*1cd76c75SBen Gras #define	SMBIOS_TYPE_CURRENTPROBE	29
112*1cd76c75SBen Gras #define	SMBIOS_TYPE_OOB_REMOTEACCESS	30
113*1cd76c75SBen Gras #define	SMBIOS_TYPE_BIS			31
114*1cd76c75SBen Gras #define	SMBIOS_TYPE_SBI			32
115*1cd76c75SBen Gras #define	SMBIOS_TYPE_ECCINFO64		33
116*1cd76c75SBen Gras #define	SMBIOS_TYPE_MGMTDEV		34
117*1cd76c75SBen Gras #define	SMBIOS_TYPE_MGTDEVCOMP		35
118*1cd76c75SBen Gras #define	SMBIOS_TYPE_MGTDEVTHRESH	36
119*1cd76c75SBen Gras #define	SMBIOS_TYPE_MEMCHANNEL		37
120*1cd76c75SBen Gras #define	SMBIOS_TYPE_IPMIDEV		38
121*1cd76c75SBen Gras #define	SMBIOS_TYPE_SPS			39
122*1cd76c75SBen Gras #define	SMBIOS_TYPE_INACTIVE		126
123*1cd76c75SBen Gras #define	SMBIOS_TYPE_EOT			127
124*1cd76c75SBen Gras 
125*1cd76c75SBen Gras /*
126*1cd76c75SBen Gras  * SMBIOS Structure Type 0 "BIOS Information"
127*1cd76c75SBen Gras  * DMTF Specification DSP0134 Section: 3.3.1 p.g. 34
128*1cd76c75SBen Gras  */
129*1cd76c75SBen Gras struct smbios_struct_bios {
130*1cd76c75SBen Gras 	uint8_t	vendor;		/* string */
131*1cd76c75SBen Gras 	uint8_t	version;	/* string */
132*1cd76c75SBen Gras 	uint16_t	startaddr;
133*1cd76c75SBen Gras 	uint8_t	release;	/* string */
134*1cd76c75SBen Gras 	uint8_t	romsize;
135*1cd76c75SBen Gras 	uint64_t	characteristics;
136*1cd76c75SBen Gras 	uint32_t	charext;
137*1cd76c75SBen Gras 	uint8_t	major_rel;
138*1cd76c75SBen Gras 	uint8_t	minor_rel;
139*1cd76c75SBen Gras 	uint8_t	ecf_mjr_rel;	/* embedded controler firmware */
140*1cd76c75SBen Gras 	uint8_t 	ecf_min_rel;	/* embedded controler firmware */
141*1cd76c75SBen Gras } __packed;
142*1cd76c75SBen Gras 
143*1cd76c75SBen Gras /*
144*1cd76c75SBen Gras  * SMBIOS Structure Type 1 "System Information"
145*1cd76c75SBen Gras  * DMTF Specification DSP0134 Section 3.3.2 p.g. 35
146*1cd76c75SBen Gras  */
147*1cd76c75SBen Gras 
148*1cd76c75SBen Gras struct smbios_sys {
149*1cd76c75SBen Gras /* SMBIOS spec 2.0+ */
150*1cd76c75SBen Gras 	uint8_t	vendor;		/* string */
151*1cd76c75SBen Gras 	uint8_t	product;	/* string */
152*1cd76c75SBen Gras 	uint8_t	version;	/* string */
153*1cd76c75SBen Gras 	uint8_t	serial;		/* string */
154*1cd76c75SBen Gras /* SMBIOS spec 2.1+ */
155*1cd76c75SBen Gras 	uint8_t	uuid[16];
156*1cd76c75SBen Gras 	uint8_t	wakeup;
157*1cd76c75SBen Gras /* SMBIOS spec 2.4+ */
158*1cd76c75SBen Gras 	uint8_t	sku;		/* string */
159*1cd76c75SBen Gras 	uint8_t	family;		/* string */
160*1cd76c75SBen Gras } __packed;
161*1cd76c75SBen Gras 
162*1cd76c75SBen Gras /*
163*1cd76c75SBen Gras  * SMBIOS Structure Type 2 "Base Board (Module) Information"
164*1cd76c75SBen Gras  * DMTF Specification DSP0134 Section 3.3.3 p.g. 37
165*1cd76c75SBen Gras  */
166*1cd76c75SBen Gras struct smbios_board {
167*1cd76c75SBen Gras 	uint8_t	vendor;		/* string */
168*1cd76c75SBen Gras 	uint8_t	product;	/* string */
169*1cd76c75SBen Gras 	uint8_t	version;	/* string */
170*1cd76c75SBen Gras 	uint8_t	serial;		/* string */
171*1cd76c75SBen Gras 	uint8_t	asset;		/* stirng */
172*1cd76c75SBen Gras 	uint8_t	feature;	/* feature flags */
173*1cd76c75SBen Gras 	uint8_t	location;	/* location in chassis */
174*1cd76c75SBen Gras 	uint16_t	handle;		/* chassis handle */
175*1cd76c75SBen Gras 	uint8_t	type;		/* board type */
176*1cd76c75SBen Gras 	uint8_t	noc;		/* number of contained objects */
177*1cd76c75SBen Gras } __packed;
178*1cd76c75SBen Gras 
179*1cd76c75SBen Gras /*
180*1cd76c75SBen Gras  * SMBIOS Structure Type 9 "Expansion slot"
181*1cd76c75SBen Gras  */
182*1cd76c75SBen Gras struct smbios_slot {
183*1cd76c75SBen Gras 	uint8_t		designation;
184*1cd76c75SBen Gras 	uint8_t		type;
185*1cd76c75SBen Gras 	uint8_t		width;
186*1cd76c75SBen Gras 	uint8_t		usage;
187*1cd76c75SBen Gras 	uint8_t		length;
188*1cd76c75SBen Gras 	uint8_t		slotid[2];
189*1cd76c75SBen Gras 	uint8_t		characteristics[2];
190*1cd76c75SBen Gras } __packed;
191*1cd76c75SBen Gras 
192*1cd76c75SBen Gras #define	SMBIOS_SLOT_ISA		0x03
193*1cd76c75SBen Gras #define	SMBIOS_SLOT_EISA	0x05
194*1cd76c75SBen Gras 
195*1cd76c75SBen Gras /*
196*1cd76c75SBen Gras  * SMBIOS Structure Type 38 "IPMI Information"
197*1cd76c75SBen Gras  * DMTF Specification DSP0134 Section 3.3.39 p.g. 91
198*1cd76c75SBen Gras  */
199*1cd76c75SBen Gras struct smbios_ipmi {
200*1cd76c75SBen Gras         uint8_t        smipmi_if_type;         /* IPMI Interface Type */
201*1cd76c75SBen Gras         uint8_t        smipmi_if_rev;          /* BCD IPMI Revision */
202*1cd76c75SBen Gras         uint8_t        smipmi_i2c_address;     /* I2C address of BMC */
203*1cd76c75SBen Gras         uint8_t        smipmi_nvram_address;   /* I2C address of NVRAM
204*1cd76c75SBen Gras 						 * storage */
205*1cd76c75SBen Gras         uint64_t       smipmi_base_address;    /* Base address of BMC (BAR
206*1cd76c75SBen Gras 						 * format */
207*1cd76c75SBen Gras         uint8_t        smipmi_base_flags;      /* Flags field:
208*1cd76c75SBen Gras 						 * bit 7:6 : register spacing
209*1cd76c75SBen Gras 						 *   00 = byte
210*1cd76c75SBen Gras 						 *   01 = dword
211*1cd76c75SBen Gras 						 *   02 = word
212*1cd76c75SBen Gras 						 * bit 4 : Lower bit BAR
213*1cd76c75SBen Gras 						 * bit 3 : IRQ valid
214*1cd76c75SBen Gras 						 * bit 2 : N/A
215*1cd76c75SBen Gras 						 * bit 1 : Interrupt polarity
216*1cd76c75SBen Gras 						 * bit 0 : Interrupt trigger */
217*1cd76c75SBen Gras         uint8_t        smipmi_irq;             /* IRQ if applicable */
218*1cd76c75SBen Gras } __packed;
219*1cd76c75SBen Gras 
220*1cd76c75SBen Gras int smbios_find_table(uint8_t, struct smbtable *);
221*1cd76c75SBen Gras char *smbios_get_string(struct smbtable *, uint8_t, char *, size_t);
222*1cd76c75SBen Gras 
223*1cd76c75SBen Gras #endif
224