1*1cd76c75SBen Gras /* $NetBSD: mtrr.h,v 1.5 2011/12/15 09:38:21 abs Exp $ */ 2*1cd76c75SBen Gras 3*1cd76c75SBen Gras /*- 4*1cd76c75SBen Gras * Copyright (c) 2000 The NetBSD Foundation, Inc. 5*1cd76c75SBen Gras * All rights reserved. 6*1cd76c75SBen Gras * 7*1cd76c75SBen Gras * This code is derived from software contributed to The NetBSD Foundation 8*1cd76c75SBen Gras * by Bill Sommerfeld 9*1cd76c75SBen Gras * 10*1cd76c75SBen Gras * Redistribution and use in source and binary forms, with or without 11*1cd76c75SBen Gras * modification, are permitted provided that the following conditions 12*1cd76c75SBen Gras * are met: 13*1cd76c75SBen Gras * 1. Redistributions of source code must retain the above copyright 14*1cd76c75SBen Gras * notice, this list of conditions and the following disclaimer. 15*1cd76c75SBen Gras * 2. Redistributions in binary form must reproduce the above copyright 16*1cd76c75SBen Gras * notice, this list of conditions and the following disclaimer in the 17*1cd76c75SBen Gras * documentation and/or other materials provided with the distribution. 18*1cd76c75SBen Gras * 19*1cd76c75SBen Gras * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20*1cd76c75SBen Gras * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21*1cd76c75SBen Gras * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22*1cd76c75SBen Gras * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23*1cd76c75SBen Gras * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24*1cd76c75SBen Gras * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25*1cd76c75SBen Gras * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26*1cd76c75SBen Gras * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27*1cd76c75SBen Gras * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28*1cd76c75SBen Gras * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29*1cd76c75SBen Gras * POSSIBILITY OF SUCH DAMAGE. 30*1cd76c75SBen Gras */ 31*1cd76c75SBen Gras 32*1cd76c75SBen Gras #ifndef _X86_MTRR_H_ 33*1cd76c75SBen Gras #define _X86_MTRR_H_ 34*1cd76c75SBen Gras 35*1cd76c75SBen Gras #define MTRR_I686_FIXED_IDX64K 0 36*1cd76c75SBen Gras #define MTRR_I686_FIXED_IDX16K 1 37*1cd76c75SBen Gras #define MTRR_I686_FIXED_IDX4K 3 38*1cd76c75SBen Gras 39*1cd76c75SBen Gras #define MTRR_I686_NVAR_MAX 16 /* could be upto 255? */ 40*1cd76c75SBen Gras 41*1cd76c75SBen Gras #define MTRR_I686_64K_START 0x00000 42*1cd76c75SBen Gras #define MTRR_I686_16K_START 0x80000 43*1cd76c75SBen Gras #define MTRR_I686_4K_START 0xc0000 44*1cd76c75SBen Gras 45*1cd76c75SBen Gras #define MTRR_I686_NFIXED_64K 1 46*1cd76c75SBen Gras #define MTRR_I686_NFIXED_16K 2 47*1cd76c75SBen Gras #define MTRR_I686_NFIXED_4K 8 48*1cd76c75SBen Gras #define MTRR_I686_NFIXED 11 49*1cd76c75SBen Gras #define MTRR_I686_NFIXED_SOFT_64K (MTRR_I686_NFIXED_64K * 8) 50*1cd76c75SBen Gras #define MTRR_I686_NFIXED_SOFT_16K (MTRR_I686_NFIXED_16K * 8) 51*1cd76c75SBen Gras #define MTRR_I686_NFIXED_SOFT_4K (MTRR_I686_NFIXED_4K * 8) 52*1cd76c75SBen Gras #define MTRR_I686_NFIXED_SOFT (MTRR_I686_NFIXED * 8) 53*1cd76c75SBen Gras 54*1cd76c75SBen Gras #define MTRR_I686_ENABLE_MASK 0x0800 55*1cd76c75SBen Gras #define MTRR_I686_FIXED_ENABLE_MASK 0x0400 56*1cd76c75SBen Gras 57*1cd76c75SBen Gras #define MTRR_I686_CAP_VCNT_MASK 0x00ff 58*1cd76c75SBen Gras #define MTRR_I686_CAP_FIX_MASK 0x0100 59*1cd76c75SBen Gras #define MTRR_I686_CAP_WC_MASK 0x0400 60*1cd76c75SBen Gras 61*1cd76c75SBen Gras #define MTRR_TYPE_UC 0 62*1cd76c75SBen Gras #define MTRR_TYPE_WC 1 63*1cd76c75SBen Gras #define MTRR_TYPE_UNDEF1 2 64*1cd76c75SBen Gras #define MTRR_TYPE_UNDEF2 3 65*1cd76c75SBen Gras #define MTRR_TYPE_WT 4 66*1cd76c75SBen Gras #define MTRR_TYPE_WP 5 67*1cd76c75SBen Gras #define MTRR_TYPE_WB 6 68*1cd76c75SBen Gras 69*1cd76c75SBen Gras struct mtrr_state { 70*1cd76c75SBen Gras uint32_t msraddr; 71*1cd76c75SBen Gras uint64_t msrval; 72*1cd76c75SBen Gras }; 73*1cd76c75SBen Gras 74*1cd76c75SBen Gras #define MTRR_PRIVATE 0x0001 /* 'own' range, reset at exit */ 75*1cd76c75SBen Gras #define MTRR_FIXED 0x0002 /* use fixed range mtrr */ 76*1cd76c75SBen Gras #define MTRR_VALID 0x0004 /* entry is valid */ 77*1cd76c75SBen Gras 78*1cd76c75SBen Gras #define MTRR_CANTSET MTRR_FIXED 79*1cd76c75SBen Gras 80*1cd76c75SBen Gras #define MTRR_I686_MASK_VALID (1 << 11) 81*1cd76c75SBen Gras 82*1cd76c75SBen Gras /* 83*1cd76c75SBen Gras * AMD K6 MTRRs. 84*1cd76c75SBen Gras * 85*1cd76c75SBen Gras * There are two of these MTRR-like registers in the UWCRR. 86*1cd76c75SBen Gras */ 87*1cd76c75SBen Gras 88*1cd76c75SBen Gras #define MTRR_K6_ADDR_SHIFT 17 89*1cd76c75SBen Gras #define MTRR_K6_ADDR (0x7fffU << MTRR_K6_ADDR_SHIFT) 90*1cd76c75SBen Gras #define MTRR_K6_MASK_SHIFT 2 91*1cd76c75SBen Gras #define MTRR_K6_MASK (0x7fffU << MTRR_K6_MASK_SHIFT) 92*1cd76c75SBen Gras #define MTRR_K6_WC (1U << 1) /* write-combine */ 93*1cd76c75SBen Gras #define MTRR_K6_UC (1U << 0) /* uncached */ 94*1cd76c75SBen Gras 95*1cd76c75SBen Gras #define MTRR_K6_NVAR 2 96*1cd76c75SBen Gras 97*1cd76c75SBen Gras #ifdef _KERNEL 98*1cd76c75SBen Gras 99*1cd76c75SBen Gras #define mtrr_base_value(mtrrp) \ 100*1cd76c75SBen Gras (((uint64_t)(mtrrp)->base) | ((uint64_t)(mtrrp)->type)) 101*1cd76c75SBen Gras #define mtrr_mask_value(mtrrp) \ 102*1cd76c75SBen Gras ((~((mtrrp)->len - 1) & 0x0000000ffffff000LL)) 103*1cd76c75SBen Gras 104*1cd76c75SBen Gras 105*1cd76c75SBen Gras #define mtrr_len(val) \ 106*1cd76c75SBen Gras ((~((val) & 0x0000000ffffff000LL)+1) & 0x0000000ffffff000LL) 107*1cd76c75SBen Gras #define mtrr_base(val) ((val) & 0x0000000ffffff000LL) 108*1cd76c75SBen Gras #define mtrr_type(val) ((uint8_t)((val) & 0x00000000000000ffLL)) 109*1cd76c75SBen Gras #define mtrr_valid(val) (((val) & MTRR_I686_MASK_VALID) != 0) 110*1cd76c75SBen Gras 111*1cd76c75SBen Gras struct proc; 112*1cd76c75SBen Gras struct mtrr; 113*1cd76c75SBen Gras 114*1cd76c75SBen Gras void i686_mtrr_init_first(void); 115*1cd76c75SBen Gras void k6_mtrr_init_first(void); 116*1cd76c75SBen Gras 117*1cd76c75SBen Gras struct mtrr_funcs { 118*1cd76c75SBen Gras void (*init_cpu)(struct cpu_info *ci); 119*1cd76c75SBen Gras void (*reload_cpu)(struct cpu_info *ci); 120*1cd76c75SBen Gras void (*clean)(struct proc *p); 121*1cd76c75SBen Gras int (*set)(struct mtrr *, int *n, struct proc *p, int flags); 122*1cd76c75SBen Gras int (*get)(struct mtrr *, int *n, struct proc *p, int flags); 123*1cd76c75SBen Gras void (*commit)(void); 124*1cd76c75SBen Gras void (*dump)(const char *tag); 125*1cd76c75SBen Gras }; 126*1cd76c75SBen Gras 127*1cd76c75SBen Gras extern struct mtrr_funcs i686_mtrr_funcs; 128*1cd76c75SBen Gras extern struct mtrr_funcs k6_mtrr_funcs; 129*1cd76c75SBen Gras extern struct mtrr_funcs *mtrr_funcs; 130*1cd76c75SBen Gras 131*1cd76c75SBen Gras #define mtrr_init_cpu(ci) mtrr_funcs->init_cpu(ci) 132*1cd76c75SBen Gras #define mtrr_reload_cpu(ci) mtrr_funcs->reload_cpu(ci) 133*1cd76c75SBen Gras #define mtrr_clean(p) mtrr_funcs->clean(p) 134*1cd76c75SBen Gras #define mtrr_set(mp,n,p,f) mtrr_funcs->set(mp,n,p,f) 135*1cd76c75SBen Gras #define mtrr_get(mp,n,p,f) mtrr_funcs->get(mp,n,p,f) 136*1cd76c75SBen Gras #define mtrr_dump(s) mtrr_funcs->dump(s) 137*1cd76c75SBen Gras #define mtrr_commit() mtrr_funcs->commit() 138*1cd76c75SBen Gras 139*1cd76c75SBen Gras #define MTRR_GETSET_USER 0x0001 140*1cd76c75SBen Gras #define MTRR_GETSET_KERNEL 0x0002 141*1cd76c75SBen Gras 142*1cd76c75SBen Gras #endif /* _KERNEL */ 143*1cd76c75SBen Gras 144*1cd76c75SBen Gras struct mtrr { 145*1cd76c75SBen Gras uint64_t base; /* physical base address */ 146*1cd76c75SBen Gras uint64_t len; 147*1cd76c75SBen Gras uint8_t type; 148*1cd76c75SBen Gras int flags; 149*1cd76c75SBen Gras pid_t owner; /* valid if MTRR_PRIVATE set in flags */ 150*1cd76c75SBen Gras }; 151*1cd76c75SBen Gras 152*1cd76c75SBen Gras #endif /* _X86_MTRR_H_ */ 153