xref: /minix3/sys/arch/x86/include/mpconfig.h (revision 0a6a1f1d05b60e214de2f05a7310ddd1f0e590e7)
1*0a6a1f1dSLionel Sambuc /*	$NetBSD: mpconfig.h,v 1.15 2015/04/27 06:51:40 knakahara Exp $	*/
21cd76c75SBen Gras 
31cd76c75SBen Gras /*
41cd76c75SBen Gras  * Definitions originally from the mpbios code, but now used for ACPI
51cd76c75SBen Gras  * MP config as well.
61cd76c75SBen Gras  */
71cd76c75SBen Gras 
81cd76c75SBen Gras #ifndef _X86_MPCONFIG_H_
91cd76c75SBen Gras #define _X86_MPCONFIG_H_
101cd76c75SBen Gras 
111cd76c75SBen Gras /*
121cd76c75SBen Gras  * XXX
131cd76c75SBen Gras  */
141cd76c75SBen Gras #include <sys/bus.h>
151cd76c75SBen Gras #include <dev/pci/pcivar.h>
161cd76c75SBen Gras #include <machine/pci_machdep.h>
171cd76c75SBen Gras 
181cd76c75SBen Gras /*
191cd76c75SBen Gras  * Interrupt types
201cd76c75SBen Gras  */
211cd76c75SBen Gras #define MPS_INTTYPE_INT         0
221cd76c75SBen Gras #define MPS_INTTYPE_NMI         1
231cd76c75SBen Gras #define MPS_INTTYPE_SMI         2
241cd76c75SBen Gras #define MPS_INTTYPE_ExtINT      3
251cd76c75SBen Gras 
261cd76c75SBen Gras #define MPS_INTPO_DEF           0
271cd76c75SBen Gras #define MPS_INTPO_ACTHI         1
281cd76c75SBen Gras #define MPS_INTPO_ACTLO         3
291cd76c75SBen Gras 
301cd76c75SBen Gras #define MPS_INTTR_DEF           0
311cd76c75SBen Gras #define MPS_INTTR_EDGE          1
321cd76c75SBen Gras #define MPS_INTTR_LEVEL         3
331cd76c75SBen Gras 
341cd76c75SBen Gras #ifndef _LOCORE
351cd76c75SBen Gras 
361cd76c75SBen Gras struct mpbios_int;
371cd76c75SBen Gras 
381cd76c75SBen Gras struct mp_bus
391cd76c75SBen Gras {
401cd76c75SBen Gras 	const char *mb_name;		/* XXX bus name */
411cd76c75SBen Gras 	int mb_idx;		/* XXX bus index */
421cd76c75SBen Gras 	void (*mb_intr_print)(int);
431cd76c75SBen Gras 	void (*mb_intr_cfg)(const struct mpbios_int *, uint32_t *);
441cd76c75SBen Gras 	struct mp_intr_map *mb_intrs;
451cd76c75SBen Gras 	uint32_t mb_data;	/* random bus-specific datum. */
461cd76c75SBen Gras 	device_t mb_dev;	/* has been autoconfigured if mb_dev != NULL */
471cd76c75SBen Gras 	pcitag_t *mb_pci_bridge_tag;
481cd76c75SBen Gras 	pci_chipset_tag_t mb_pci_chipset_tag;
491cd76c75SBen Gras };
501cd76c75SBen Gras 
511cd76c75SBen Gras struct mp_intr_map
521cd76c75SBen Gras {
531cd76c75SBen Gras 	struct mp_intr_map *next;
541cd76c75SBen Gras 	struct mp_bus *bus;
551cd76c75SBen Gras 	/*
561cd76c75SBen Gras 	 * encoding of bus_pin is mp_bus dependant.
571cd76c75SBen Gras 	 * for pci, bus_pin = (pci_device_number << 2) | pin
581cd76c75SBen Gras 	 * where pin is 0=INTA ... 3=INTD.
591cd76c75SBen Gras 	 */
601cd76c75SBen Gras 	int bus_pin;
611cd76c75SBen Gras 	struct pic *ioapic;	/* NULL for local apic */
621cd76c75SBen Gras 	int ioapic_pin;
63*0a6a1f1dSLionel Sambuc 	intr_handle_t ioapic_ih;	/* int handle, see i82093var.h for encoding */
641cd76c75SBen Gras 	int type;		/* from mp spec intr record */
651cd76c75SBen Gras  	int flags;		/* from mp spec intr record */
661cd76c75SBen Gras 	uint32_t redir;
671cd76c75SBen Gras 	uint32_t cpu_id;
681cd76c75SBen Gras 	int global_int;		/* ACPI global interrupt number */
691cd76c75SBen Gras 	int sflags;		/* other, software flags (see below) */
701cd76c75SBen Gras 	void *linkdev;
711cd76c75SBen Gras 	int sourceindex;
721cd76c75SBen Gras };
731cd76c75SBen Gras 
741cd76c75SBen Gras #define MPI_OVR		0x0001	/* Was overridden by an ACPI OVR */
751cd76c75SBen Gras 
761cd76c75SBen Gras #if defined(_KERNEL)
771cd76c75SBen Gras extern int mp_verbose;
781cd76c75SBen Gras extern struct mp_bus *mp_busses;
791cd76c75SBen Gras extern struct mp_intr_map *mp_intrs;
801cd76c75SBen Gras extern int mp_nintr;
811cd76c75SBen Gras extern int mp_isa_bus, mp_eisa_bus;
821cd76c75SBen Gras extern int mp_nbus;
831cd76c75SBen Gras int mp_pci_scan(device_t, struct pcibus_attach_args *, cfprint_t);
841cd76c75SBen Gras void mp_pci_childdetached(device_t, device_t);
851cd76c75SBen Gras #endif
861cd76c75SBen Gras #endif
871cd76c75SBen Gras 
881cd76c75SBen Gras #endif /* _X86_MPCONFIG_H_ */
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