xref: /minix3/sys/arch/i386/stand/lib/isadma.c (revision 58a2b0008e28f606a7f7f5faaeaba4faac57a1ea)
1*58a2b000SEvgeniy Ivanov /*	$NetBSD: isadma.c,v 1.2 2008/12/14 17:03:43 christos Exp $	*/
2*58a2b000SEvgeniy Ivanov 
3*58a2b000SEvgeniy Ivanov /* from: NetBSD:dev/isa/isadma.c */
4*58a2b000SEvgeniy Ivanov 
5*58a2b000SEvgeniy Ivanov #include <sys/types.h>
6*58a2b000SEvgeniy Ivanov #include <machine/pio.h>
7*58a2b000SEvgeniy Ivanov 
8*58a2b000SEvgeniy Ivanov #include <lib/libsa/stand.h>
9*58a2b000SEvgeniy Ivanov 
10*58a2b000SEvgeniy Ivanov #include "isadmavar.h"
11*58a2b000SEvgeniy Ivanov 
12*58a2b000SEvgeniy Ivanov #define	IO_DMA1		0x000		/* 8237A DMA Controller #1 */
13*58a2b000SEvgeniy Ivanov #define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
14*58a2b000SEvgeniy Ivanov #define	DMA37MD_CASCADE	0xc0	/* cascade mode */
15*58a2b000SEvgeniy Ivanov #define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
16*58a2b000SEvgeniy Ivanov #define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
17*58a2b000SEvgeniy Ivanov #define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
18*58a2b000SEvgeniy Ivanov #define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
19*58a2b000SEvgeniy Ivanov 
20*58a2b000SEvgeniy Ivanov /*
21*58a2b000SEvgeniy Ivanov  * isa_dmacascade(): program 8237 DMA controller channel to accept
22*58a2b000SEvgeniy Ivanov  * external dma control by a board.
23*58a2b000SEvgeniy Ivanov  */
24*58a2b000SEvgeniy Ivanov void
isa_dmacascade(int chan)25*58a2b000SEvgeniy Ivanov isa_dmacascade(int chan)
26*58a2b000SEvgeniy Ivanov {
27*58a2b000SEvgeniy Ivanov 
28*58a2b000SEvgeniy Ivanov #ifdef ISADMA_DEBUG
29*58a2b000SEvgeniy Ivanov 	if (chan < 0 || chan > 7)
30*58a2b000SEvgeniy Ivanov 		panic("isa_dmacascade: impossible request");
31*58a2b000SEvgeniy Ivanov #endif
32*58a2b000SEvgeniy Ivanov 
33*58a2b000SEvgeniy Ivanov 	/* set dma channel mode, and set dma channel mode */
34*58a2b000SEvgeniy Ivanov 	if ((chan & 4) == 0) {
35*58a2b000SEvgeniy Ivanov 		outb(DMA1_MODE, chan | DMA37MD_CASCADE);
36*58a2b000SEvgeniy Ivanov 		outb(DMA1_SMSK, chan);
37*58a2b000SEvgeniy Ivanov 	} else {
38*58a2b000SEvgeniy Ivanov 		chan &= 3;
39*58a2b000SEvgeniy Ivanov 
40*58a2b000SEvgeniy Ivanov 		outb(DMA2_MODE, chan | DMA37MD_CASCADE);
41*58a2b000SEvgeniy Ivanov 		outb(DMA2_SMSK, chan);
42*58a2b000SEvgeniy Ivanov 	}
43*58a2b000SEvgeniy Ivanov }
44