1*0a6a1f1dSLionel Sambuc /* $NetBSD: mcontext.h,v 1.12 2014/02/15 22:20:42 dsl Exp $ */
2f6aac1c3SLionel Sambuc
35cecdfcbSBen Gras /*-
45cecdfcbSBen Gras * Copyright (c) 1999 The NetBSD Foundation, Inc.
55cecdfcbSBen Gras * All rights reserved.
65cecdfcbSBen Gras *
75cecdfcbSBen Gras * This code is derived from software contributed to The NetBSD Foundation
85cecdfcbSBen Gras * by Klaus Klein.
95cecdfcbSBen Gras *
105cecdfcbSBen Gras * Redistribution and use in source and binary forms, with or without
115cecdfcbSBen Gras * modification, are permitted provided that the following conditions
125cecdfcbSBen Gras * are met:
135cecdfcbSBen Gras * 1. Redistributions of source code must retain the above copyright
145cecdfcbSBen Gras * notice, this list of conditions and the following disclaimer.
155cecdfcbSBen Gras * 2. Redistributions in binary form must reproduce the above copyright
165cecdfcbSBen Gras * notice, this list of conditions and the following disclaimer in the
175cecdfcbSBen Gras * documentation and/or other materials provided with the distribution.
185cecdfcbSBen Gras *
195cecdfcbSBen Gras * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
205cecdfcbSBen Gras * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
215cecdfcbSBen Gras * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
225cecdfcbSBen Gras * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
235cecdfcbSBen Gras * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
245cecdfcbSBen Gras * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
255cecdfcbSBen Gras * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
265cecdfcbSBen Gras * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
275cecdfcbSBen Gras * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
285cecdfcbSBen Gras * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
295cecdfcbSBen Gras * POSSIBILITY OF SUCH DAMAGE.
305cecdfcbSBen Gras */
31f6aac1c3SLionel Sambuc
325cecdfcbSBen Gras #ifndef _I386_MCONTEXT_H_
335cecdfcbSBen Gras #define _I386_MCONTEXT_H_
34f6aac1c3SLionel Sambuc
355cecdfcbSBen Gras
365cecdfcbSBen Gras /*
375cecdfcbSBen Gras * mcontext extensions to handle signal delivery.
385cecdfcbSBen Gras */
395cecdfcbSBen Gras #define _UC_SETSTACK 0x00010000
405cecdfcbSBen Gras #define _UC_CLRSTACK 0x00020000
415cecdfcbSBen Gras #define _UC_VM 0x00040000
425cecdfcbSBen Gras #define _UC_TLSBASE 0x00080000
435cecdfcbSBen Gras
445cecdfcbSBen Gras /*
455cecdfcbSBen Gras * Layout of mcontext_t according to the System V Application Binary Interface,
465cecdfcbSBen Gras * Intel386(tm) Architecture Processor Supplement, Fourth Edition.
475cecdfcbSBen Gras */
485cecdfcbSBen Gras
495cecdfcbSBen Gras /*
505cecdfcbSBen Gras * General register state
515cecdfcbSBen Gras */
525cecdfcbSBen Gras #define _NGREG 19
535cecdfcbSBen Gras typedef int __greg_t;
545cecdfcbSBen Gras typedef __greg_t __gregset_t[_NGREG];
555cecdfcbSBen Gras
565cecdfcbSBen Gras #define _REG_GS 0
575cecdfcbSBen Gras #define _REG_FS 1
585cecdfcbSBen Gras #define _REG_ES 2
595cecdfcbSBen Gras #define _REG_DS 3
605cecdfcbSBen Gras #define _REG_EDI 4
615cecdfcbSBen Gras #define _REG_ESI 5
625cecdfcbSBen Gras #define _REG_EBP 6
635cecdfcbSBen Gras #define _REG_ESP 7
645cecdfcbSBen Gras #define _REG_EBX 8
655cecdfcbSBen Gras #define _REG_EDX 9
665cecdfcbSBen Gras #define _REG_ECX 10
675cecdfcbSBen Gras #define _REG_EAX 11
685cecdfcbSBen Gras #define _REG_TRAPNO 12
695cecdfcbSBen Gras #define _REG_ERR 13
705cecdfcbSBen Gras #define _REG_EIP 14
715cecdfcbSBen Gras #define _REG_CS 15
725cecdfcbSBen Gras #define _REG_EFL 16
735cecdfcbSBen Gras #define _REG_UESP 17
745cecdfcbSBen Gras #define _REG_SS 18
755cecdfcbSBen Gras
765cecdfcbSBen Gras /*
775cecdfcbSBen Gras * Floating point register state
785cecdfcbSBen Gras */
795cecdfcbSBen Gras typedef struct {
805cecdfcbSBen Gras union {
815cecdfcbSBen Gras struct {
825cecdfcbSBen Gras int __fp_state[27]; /* Environment and registers */
83*0a6a1f1dSLionel Sambuc } __fpchip_state; /* x87 regs in fsave format */
845cecdfcbSBen Gras struct {
855cecdfcbSBen Gras char __fp_xmm[512];
86*0a6a1f1dSLionel Sambuc } __fp_xmm_state; /* x87 and xmm regs in fxsave format */
875cecdfcbSBen Gras int __fp_fpregs[128];
885cecdfcbSBen Gras } __fp_reg_set;
89*0a6a1f1dSLionel Sambuc int __fp_pad[33]; /* Historic padding */
905cecdfcbSBen Gras } __fpregset_t;
91*0a6a1f1dSLionel Sambuc __CTASSERT(sizeof (__fpregset_t) == 512 + 33 * 4);
925cecdfcbSBen Gras
935cecdfcbSBen Gras typedef struct {
945cecdfcbSBen Gras __gregset_t __gregs;
955cecdfcbSBen Gras __fpregset_t __fpregs;
965cecdfcbSBen Gras __greg_t _mc_tlsbase;
975cecdfcbSBen Gras #ifdef __minix
98f6aac1c3SLionel Sambuc int mc_magic;
995cecdfcbSBen Gras int mc_flags;
1005cecdfcbSBen Gras #endif
101f6aac1c3SLionel Sambuc } mcontext_t;
102f6aac1c3SLionel Sambuc
1035cecdfcbSBen Gras #define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */
1045cecdfcbSBen Gras
1055cecdfcbSBen Gras #define _UC_MACHINE_PAD 4 /* Padding appended to ucontext_t */
1065cecdfcbSBen Gras
1075cecdfcbSBen Gras #define _UC_UCONTEXT_ALIGN (~0xf)
1085cecdfcbSBen Gras
1095cecdfcbSBen Gras #ifdef _KERNEL_OPT
1105cecdfcbSBen Gras #include "opt_vm86.h"
1115cecdfcbSBen Gras #ifdef VM86
1125cecdfcbSBen Gras /*#include <machine/psl.h>*/
1135cecdfcbSBen Gras #define PSL_VM 0x00020000
1145cecdfcbSBen Gras #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_UESP] + \
1155cecdfcbSBen Gras ((uc)->uc_mcontext.__gregs[_REG_EFL] & PSL_VM ? \
1165cecdfcbSBen Gras ((uc)->uc_mcontext.__gregs[_REG_SS] << 4) : 0))
1175cecdfcbSBen Gras #endif /* VM86 */
1185cecdfcbSBen Gras #endif /* _KERNEL_OPT */
1195cecdfcbSBen Gras
1205cecdfcbSBen Gras #ifndef _UC_MACHINE_SP
1215cecdfcbSBen Gras #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_UESP])
1225cecdfcbSBen Gras #endif
1235cecdfcbSBen Gras #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_EIP])
1245cecdfcbSBen Gras #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_EAX])
1255cecdfcbSBen Gras
1265cecdfcbSBen Gras #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
1275cecdfcbSBen Gras
12884d9c625SLionel Sambuc #if defined(__minix)
1295cecdfcbSBen Gras #define _UC_MACHINE_STACK(uc) ((uc)->uc_mcontext.__gregs[_REG_ESP])
1305cecdfcbSBen Gras #define _UC_MACHINE_SET_STACK(uc, esp) _UC_MACHINE_STACK(uc) = (esp)
1315cecdfcbSBen Gras
1325cecdfcbSBen Gras #define _UC_MACHINE_EBP(uc) ((uc)->uc_mcontext.__gregs[_REG_EBP])
1335cecdfcbSBen Gras #define _UC_MACHINE_SET_EBP(uc, ebp) _UC_MACHINE_EBP(uc) = (ebp)
1345cecdfcbSBen Gras
1355cecdfcbSBen Gras #define _UC_MACHINE_ESI(uc) ((uc)->uc_mcontext.__gregs[_REG_ESI])
1365cecdfcbSBen Gras #define _UC_MACHINE_SET_ESI(uc, esi) _UC_MACHINE_ESI(uc) = (esi)
13784d9c625SLionel Sambuc
13884d9c625SLionel Sambuc int setmcontext(const mcontext_t *mcp);
13984d9c625SLionel Sambuc int getmcontext(mcontext_t *mcp);
14084d9c625SLionel Sambuc
14184d9c625SLionel Sambuc #define MCF_MAGIC 0xc0ffee
14284d9c625SLionel Sambuc #define _MC_FPU_SAVED 0x001
14384d9c625SLionel Sambuc
14484d9c625SLionel Sambuc #endif /* defined(__minix) */
1455cecdfcbSBen Gras
1465cecdfcbSBen Gras #define __UCONTEXT_SIZE 776
1475cecdfcbSBen Gras
1485cecdfcbSBen Gras static __inline void *
__lwp_getprivate_fast(void)1495cecdfcbSBen Gras __lwp_getprivate_fast(void)
1505cecdfcbSBen Gras {
1515cecdfcbSBen Gras void *__tmp;
1525cecdfcbSBen Gras
1535cecdfcbSBen Gras __asm volatile("movl %%gs:0, %0" : "=r" (__tmp));
1545cecdfcbSBen Gras
1555cecdfcbSBen Gras return __tmp;
1565cecdfcbSBen Gras }
1575cecdfcbSBen Gras
1585cecdfcbSBen Gras #endif /* !_I386_MCONTEXT_H_ */
159