xref: /minix3/sys/arch/i386/include/i82093reg.h (revision 0a6a1f1d05b60e214de2f05a7310ddd1f0e590e7)
1*0a6a1f1dSLionel Sambuc /*	 $NetBSD: i82093reg.h,v 1.8 2008/07/03 14:02:25 drochner Exp $ */
2*0a6a1f1dSLionel Sambuc 
3*0a6a1f1dSLionel Sambuc #include <x86/i82093reg.h>
4*0a6a1f1dSLionel Sambuc 
5*0a6a1f1dSLionel Sambuc #ifdef _KERNEL
6*0a6a1f1dSLionel Sambuc 
7*0a6a1f1dSLionel Sambuc #if defined(_KERNEL_OPT)
8*0a6a1f1dSLionel Sambuc #include "opt_multiprocessor.h"
9*0a6a1f1dSLionel Sambuc #endif
10*0a6a1f1dSLionel Sambuc 
11*0a6a1f1dSLionel Sambuc #define ioapic_asm_ack(num) \
12*0a6a1f1dSLionel Sambuc 	movl	$0,_C_LABEL(local_apic)+LAPIC_EOI
13*0a6a1f1dSLionel Sambuc 
14*0a6a1f1dSLionel Sambuc #ifdef MULTIPROCESSOR
15*0a6a1f1dSLionel Sambuc 
16*0a6a1f1dSLionel Sambuc #define ioapic_asm_lock(num) \
17*0a6a1f1dSLionel Sambuc 	movl	$1,%esi						;\
18*0a6a1f1dSLionel Sambuc 77:								\
19*0a6a1f1dSLionel Sambuc 	xchgl	%esi,PIC_LOCK(%edi)				;\
20*0a6a1f1dSLionel Sambuc 	testl	%esi,%esi					;\
21*0a6a1f1dSLionel Sambuc 	jne	77b
22*0a6a1f1dSLionel Sambuc 
23*0a6a1f1dSLionel Sambuc #define ioapic_asm_unlock(num) \
24*0a6a1f1dSLionel Sambuc 	movl	$0,PIC_LOCK(%edi)
25*0a6a1f1dSLionel Sambuc 
26*0a6a1f1dSLionel Sambuc #else
27*0a6a1f1dSLionel Sambuc 
28*0a6a1f1dSLionel Sambuc #define ioapic_asm_lock(num)
29*0a6a1f1dSLionel Sambuc #define ioapic_asm_unlock(num)
30*0a6a1f1dSLionel Sambuc 
31*0a6a1f1dSLionel Sambuc #endif	/* MULTIPROCESSOR */
32*0a6a1f1dSLionel Sambuc 
33*0a6a1f1dSLionel Sambuc #define ioapic_mask(num) \
34*0a6a1f1dSLionel Sambuc 	movl	IS_PIC(%ebp),%edi				;\
35*0a6a1f1dSLionel Sambuc 	ioapic_asm_lock(num)					;\
36*0a6a1f1dSLionel Sambuc 	movl	IS_PIN(%ebp),%esi				;\
37*0a6a1f1dSLionel Sambuc 	leal	0x10(%esi,%esi,1),%esi				;\
38*0a6a1f1dSLionel Sambuc 	movl	PIC_IOAPIC(%edi),%edi				;\
39*0a6a1f1dSLionel Sambuc 	movl	IOAPIC_SC_REG(%edi),%ebx			;\
40*0a6a1f1dSLionel Sambuc 	movl	%esi, (%ebx)					;\
41*0a6a1f1dSLionel Sambuc 	movl	IOAPIC_SC_DATA(%edi),%ebx			;\
42*0a6a1f1dSLionel Sambuc 	movl	(%ebx),%esi					;\
43*0a6a1f1dSLionel Sambuc 	orl	$IOAPIC_REDLO_MASK,%esi				;\
44*0a6a1f1dSLionel Sambuc 	movl	%esi,(%ebx)					;\
45*0a6a1f1dSLionel Sambuc 	movl	IS_PIC(%ebp),%edi				;\
46*0a6a1f1dSLionel Sambuc 	ioapic_asm_unlock(num)
47*0a6a1f1dSLionel Sambuc 
48*0a6a1f1dSLionel Sambuc /*
49*0a6a1f1dSLionel Sambuc  * Since this is called just before the interrupt stub exits, AND
50*0a6a1f1dSLionel Sambuc  * because the apic ACK doesn't use any registers, all registers
51*0a6a1f1dSLionel Sambuc  * can be used here.
52*0a6a1f1dSLionel Sambuc  * XXX this is not obvious
53*0a6a1f1dSLionel Sambuc  */
54*0a6a1f1dSLionel Sambuc #define ioapic_unmask(num) \
55*0a6a1f1dSLionel Sambuc 	movl    (%esp),%eax					;\
56*0a6a1f1dSLionel Sambuc 	cmpl    $IREENT_MAGIC,(TF_ERR+4)(%eax)			;\
57*0a6a1f1dSLionel Sambuc 	jne     79f						;\
58*0a6a1f1dSLionel Sambuc 	movl	IS_PIC(%ebp),%edi				;\
59*0a6a1f1dSLionel Sambuc 	ioapic_asm_lock(num)					;\
60*0a6a1f1dSLionel Sambuc 	movl	IS_PIN(%ebp),%esi				;\
61*0a6a1f1dSLionel Sambuc 	leal	0x10(%esi,%esi,1),%esi				;\
62*0a6a1f1dSLionel Sambuc 	movl	PIC_IOAPIC(%edi),%edi				;\
63*0a6a1f1dSLionel Sambuc 	movl	IOAPIC_SC_REG(%edi),%ebx			;\
64*0a6a1f1dSLionel Sambuc 	movl	IOAPIC_SC_DATA(%edi),%eax			;\
65*0a6a1f1dSLionel Sambuc 	movl	%esi, (%ebx)					;\
66*0a6a1f1dSLionel Sambuc 	movl	(%eax),%edx					;\
67*0a6a1f1dSLionel Sambuc 	andl	$~IOAPIC_REDLO_MASK,%edx			;\
68*0a6a1f1dSLionel Sambuc 	movl	%esi, (%ebx)					;\
69*0a6a1f1dSLionel Sambuc 	movl	%edx,(%eax)					;\
70*0a6a1f1dSLionel Sambuc 	movl	IS_PIC(%ebp),%edi				;\
71*0a6a1f1dSLionel Sambuc 	ioapic_asm_unlock(num)					;\
72*0a6a1f1dSLionel Sambuc 79:
73*0a6a1f1dSLionel Sambuc 
74*0a6a1f1dSLionel Sambuc #endif
75