1*433d6423SLionel Sambuc 2*433d6423SLionel Sambuc void oxpcie_set_vaddr(unsigned char *vaddr); 3*433d6423SLionel Sambuc void oxpcie_putc(char c); 4*433d6423SLionel Sambuc int oxpcie_in(void); 5*433d6423SLionel Sambuc 6*433d6423SLionel Sambuc #include "serial.h" 7*433d6423SLionel Sambuc 8*433d6423SLionel Sambuc /* OXPCIe952 info */ 9*433d6423SLionel Sambuc #define UART1BASE_550 0x1000 10*433d6423SLionel Sambuc #define UART1BASE_650 0x1090 11*433d6423SLionel Sambuc #define UART1BASE_950 12*433d6423SLionel Sambuc #define BASELINEICR (UART1BASE_550 + 0xC0) 13*433d6423SLionel Sambuc #define OXPCIE_THR oxpcie_vaddr[UART1BASE_550 + THRREG] 14*433d6423SLionel Sambuc #define OXPCIE_RBR oxpcie_vaddr[UART1BASE_550 + RBRREG] 15*433d6423SLionel Sambuc #define OXPCIE_LSR oxpcie_vaddr[UART1BASE_550 + LSRREG] 16*433d6423SLionel Sambuc #define OXPCIE_LCR oxpcie_vaddr[UART1BASE_550 + LCRREG] 17*433d6423SLionel Sambuc #define OXPCIE_DLL oxpcie_vaddr[UART1BASE_550 + 0x00] 18*433d6423SLionel Sambuc #define OXPCIE_DLM oxpcie_vaddr[UART1BASE_550 + 0x01] 19*433d6423SLionel Sambuc #define OXPCIE_FICR oxpcie_vaddr[UART1BASE_550 + FICRREG] 20*433d6423SLionel Sambuc #define OXPCIE_SPR oxpcie_vaddr[UART1BASE_550 + SPRREG] 21*433d6423SLionel Sambuc #define OXPCIE_EFR oxpcie_vaddr[UART1BASE_650 + 0x10] 22*433d6423SLionel Sambuc #define OXPCIE_ICR oxpcie_vaddr[UART1BASE_950 + 0x05] 23*433d6423SLionel Sambuc 24*433d6423SLionel Sambuc #define OXPCIE_CPR oxpcie_vaddr[BASELINEICR + 0x01] 25*433d6423SLionel Sambuc #define OXPCIE_TCR oxpcie_vaddr[BASELINEICR + 0x02] 26*433d6423SLionel Sambuc #define OXPCIE_CPR2 oxpcie_vaddr[BASELINEICR + 0x03] 27*433d6423SLionel Sambuc #define OXPCIE_CSR oxpcie_vaddr[BASELINEICR + 0x0C] 28*433d6423SLionel Sambuc #define OXPCIE_PIDX oxpcie_vaddr[BASELINEICR + 0x12] 29*433d6423SLionel Sambuc 30*433d6423SLionel Sambuc #define LCR_CONFIG 0x03 /* bits 6:0 -= 0x03 => 8N1, no break. */ 31*433d6423SLionel Sambuc 32