1*433d6423SLionel Sambuc #ifndef __SMP_X86_H__ 2*433d6423SLionel Sambuc #define __SMP_X86_H__ 3*433d6423SLionel Sambuc 4*433d6423SLionel Sambuc #include "arch_proto.h" /* K_STACK_SIZE */ 5*433d6423SLionel Sambuc 6*433d6423SLionel Sambuc #define MAX_NR_INTERRUPT_ENTRIES 128 7*433d6423SLionel Sambuc 8*433d6423SLionel Sambuc #ifndef __ASSEMBLY__ 9*433d6423SLionel Sambuc 10*433d6423SLionel Sambuc /* returns the current cpu id */ 11*433d6423SLionel Sambuc #define cpuid (((u32_t *)(((u32_t)get_stack_frame() + (K_STACK_SIZE - 1)) \ 12*433d6423SLionel Sambuc & ~(K_STACK_SIZE - 1)))[-1]) 13*433d6423SLionel Sambuc /* 14*433d6423SLionel Sambuc * in case apic or smp is disabled in boot monitor, we need to finish single cpu 15*433d6423SLionel Sambuc * boot using the legacy PIC 16*433d6423SLionel Sambuc */ 17*433d6423SLionel Sambuc #define smp_single_cpu_fallback() do { \ 18*433d6423SLionel Sambuc tss_init(0, get_k_stack_top(0)); \ 19*433d6423SLionel Sambuc bsp_cpu_id = 0; \ 20*433d6423SLionel Sambuc ncpus = 1; \ 21*433d6423SLionel Sambuc bsp_finish_booting(); \ 22*433d6423SLionel Sambuc } while(0) 23*433d6423SLionel Sambuc 24*433d6423SLionel Sambuc extern unsigned char cpuid2apicid[CONFIG_MAX_CPUS]; 25*433d6423SLionel Sambuc 26*433d6423SLionel Sambuc #define barrier() do { mfence(); } while(0) 27*433d6423SLionel Sambuc 28*433d6423SLionel Sambuc #endif 29*433d6423SLionel Sambuc 30*433d6423SLionel Sambuc #endif /* __SMP_X86_H__ */ 31*433d6423SLionel Sambuc 32