xref: /minix3/minix/kernel/arch/earm/bsp/ti/omap_rtc.c (revision 433d6423c39e34ec4b79c950597bb2d236f886be)
1*433d6423SLionel Sambuc /*
2*433d6423SLionel Sambuc  * This is a mini driver for the AM335X Real Time Clock. The majority of the
3*433d6423SLionel Sambuc  * work is done in user space in readclock, but for power-off the clock needs
4*433d6423SLionel Sambuc  * to be put into run mode at the last possible moment in arch_reset.c. This
5*433d6423SLionel Sambuc  * driver just implements mapping the memory and re-starting the clock.
6*433d6423SLionel Sambuc  */
7*433d6423SLionel Sambuc 
8*433d6423SLionel Sambuc #include <assert.h>
9*433d6423SLionel Sambuc #include <sys/types.h>
10*433d6423SLionel Sambuc #include <machine/cpu.h>
11*433d6423SLionel Sambuc #include <minix/type.h>
12*433d6423SLionel Sambuc #include <minix/board.h>
13*433d6423SLionel Sambuc #include <io.h>
14*433d6423SLionel Sambuc 
15*433d6423SLionel Sambuc #include "kernel/kernel.h"
16*433d6423SLionel Sambuc #include "kernel/proc.h"
17*433d6423SLionel Sambuc #include "kernel/vm.h"
18*433d6423SLionel Sambuc #include "kernel/proto.h"
19*433d6423SLionel Sambuc #include "arch_proto.h"
20*433d6423SLionel Sambuc #include "omap_rtc.h"
21*433d6423SLionel Sambuc 
22*433d6423SLionel Sambuc #define RTC_SS_BASE 0x44e3e000
23*433d6423SLionel Sambuc #define RTC_SS_SIZE 0x1000
24*433d6423SLionel Sambuc #define RTC_CTRL_REG 0x40
25*433d6423SLionel Sambuc #define RTC_CTRL_RTC_STOP_BIT 0
26*433d6423SLionel Sambuc 
27*433d6423SLionel Sambuc struct omap_rtc
28*433d6423SLionel Sambuc {
29*433d6423SLionel Sambuc 	vir_bytes base;
30*433d6423SLionel Sambuc 	vir_bytes size;
31*433d6423SLionel Sambuc };
32*433d6423SLionel Sambuc 
33*433d6423SLionel Sambuc static struct omap_rtc omap_rtc = {
34*433d6423SLionel Sambuc 	.base = RTC_SS_BASE,
35*433d6423SLionel Sambuc 	.size = RTC_SS_SIZE
36*433d6423SLionel Sambuc };
37*433d6423SLionel Sambuc 
38*433d6423SLionel Sambuc static kern_phys_map rtc_phys_map;
39*433d6423SLionel Sambuc 
40*433d6423SLionel Sambuc void
omap3_rtc_init(void)41*433d6423SLionel Sambuc omap3_rtc_init(void)
42*433d6423SLionel Sambuc {
43*433d6423SLionel Sambuc 	if (BOARD_IS_BB(machine.board_id)) {
44*433d6423SLionel Sambuc 		kern_phys_map_ptr(omap_rtc.base, omap_rtc.size,
45*433d6423SLionel Sambuc 		    VMMF_UNCACHED | VMMF_WRITE, &rtc_phys_map,
46*433d6423SLionel Sambuc 		    (vir_bytes) & omap_rtc.base);
47*433d6423SLionel Sambuc 	}
48*433d6423SLionel Sambuc }
49*433d6423SLionel Sambuc 
50*433d6423SLionel Sambuc void
omap3_rtc_run(void)51*433d6423SLionel Sambuc omap3_rtc_run(void)
52*433d6423SLionel Sambuc {
53*433d6423SLionel Sambuc 	if (BOARD_IS_BB(machine.board_id)) {
54*433d6423SLionel Sambuc 		/* Setting the stop bit starts the RTC running */
55*433d6423SLionel Sambuc 		mmio_set((omap_rtc.base + RTC_CTRL_REG),
56*433d6423SLionel Sambuc 		    (1 << RTC_CTRL_RTC_STOP_BIT));
57*433d6423SLionel Sambuc 	}
58*433d6423SLionel Sambuc }
59