xref: /minix3/minix/kernel/arch/earm/bsp/ti/omap_reset.c (revision 222afb38ac2ffd175d501786a8456d2269c52ffb)
1433d6423SLionel Sambuc #include <assert.h>
2433d6423SLionel Sambuc #include <sys/types.h>
3433d6423SLionel Sambuc #include <machine/cpu.h>
4433d6423SLionel Sambuc #include <minix/type.h>
5433d6423SLionel Sambuc #include <minix/board.h>
6433d6423SLionel Sambuc #include <io.h>
7433d6423SLionel Sambuc 
8433d6423SLionel Sambuc #include "kernel/kernel.h"
9433d6423SLionel Sambuc #include "kernel/proc.h"
10433d6423SLionel Sambuc #include "kernel/vm.h"
11433d6423SLionel Sambuc #include "kernel/proto.h"
12433d6423SLionel Sambuc #include "arch_proto.h"
13433d6423SLionel Sambuc #include "bsp_reset.h"
14433d6423SLionel Sambuc 
15*222afb38SBen Gras #include "omap_timer_registers.h"
16433d6423SLionel Sambuc #include "omap_rtc.h"
17433d6423SLionel Sambuc 
18433d6423SLionel Sambuc #define AM335X_CM_BASE 0x44E00000
19433d6423SLionel Sambuc #define AM335X_CM_SIZE 0x1000
20433d6423SLionel Sambuc 
21433d6423SLionel Sambuc #define AM335X_PRM_DEVICE_OFFSET 0xf00
22433d6423SLionel Sambuc #define AM335X_PRM_RSTCTRL_REG 0x00
23433d6423SLionel Sambuc #define AM335X_RST_GLOBAL_WARM_SW_BIT 0
24433d6423SLionel Sambuc 
25433d6423SLionel Sambuc #define DM37XX_CM_BASE 0x48307000
26433d6423SLionel Sambuc #define DM37XX_CM_SIZE 0x1000
27433d6423SLionel Sambuc #define DM37XX_PRM_RSTCTRL_REG 0x250
28433d6423SLionel Sambuc #define DM37XX_RST_DPLL3_BIT 2
29433d6423SLionel Sambuc 
30433d6423SLionel Sambuc struct omap_reset
31433d6423SLionel Sambuc {
32433d6423SLionel Sambuc 	vir_bytes base;
33433d6423SLionel Sambuc 	vir_bytes size;
34433d6423SLionel Sambuc };
35433d6423SLionel Sambuc 
36433d6423SLionel Sambuc static struct omap_reset omap_reset;
37433d6423SLionel Sambuc 
38433d6423SLionel Sambuc static kern_phys_map reset_phys_map;
39433d6423SLionel Sambuc 
40433d6423SLionel Sambuc void
bsp_reset_init(void)41433d6423SLionel Sambuc bsp_reset_init(void)
42433d6423SLionel Sambuc {
43433d6423SLionel Sambuc 	if (BOARD_IS_BBXM(machine.board_id)) {
44433d6423SLionel Sambuc 		omap_reset.base = DM37XX_CM_BASE;
45433d6423SLionel Sambuc 		omap_reset.size = DM37XX_CM_SIZE;
46433d6423SLionel Sambuc 	} else if (BOARD_IS_BB(machine.board_id)) {
47433d6423SLionel Sambuc 		omap_reset.base = AM335X_CM_BASE;
48433d6423SLionel Sambuc 		omap_reset.size = AM335X_CM_SIZE;
49433d6423SLionel Sambuc 	}
50433d6423SLionel Sambuc 
51433d6423SLionel Sambuc 	kern_phys_map_ptr(omap_reset.base, omap_reset.size,
52433d6423SLionel Sambuc 	    VMMF_UNCACHED | VMMF_WRITE,
53433d6423SLionel Sambuc 	    &reset_phys_map, (vir_bytes) & omap_reset.base);
54433d6423SLionel Sambuc }
55433d6423SLionel Sambuc 
56433d6423SLionel Sambuc void
bsp_reset(void)57433d6423SLionel Sambuc bsp_reset(void)
58433d6423SLionel Sambuc {
59433d6423SLionel Sambuc 	if (BOARD_IS_BBXM(machine.board_id)) {
60433d6423SLionel Sambuc 		mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG),
61433d6423SLionel Sambuc 		    (1 << DM37XX_RST_DPLL3_BIT));
62433d6423SLionel Sambuc 	} else if (BOARD_IS_BB(machine.board_id)) {
63433d6423SLionel Sambuc 		mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET +
64433d6423SLionel Sambuc 			AM335X_PRM_RSTCTRL_REG),
65433d6423SLionel Sambuc 		    (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
66433d6423SLionel Sambuc 	}
67433d6423SLionel Sambuc }
68433d6423SLionel Sambuc 
69433d6423SLionel Sambuc void
bsp_poweroff(void)70433d6423SLionel Sambuc bsp_poweroff(void)
71433d6423SLionel Sambuc {
72433d6423SLionel Sambuc 
73433d6423SLionel Sambuc /*
74433d6423SLionel Sambuc  * The am335x can signal an external power management chip to cut the power
75433d6423SLionel Sambuc  * by toggling the PMIC_POWER_EN pin. It might fail if there isn't an
76433d6423SLionel Sambuc  * external PMIC or if the PMIC hasn't been configured to respond to toggles.
77433d6423SLionel Sambuc  * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
78433d6423SLionel Sambuc  * At this point PM should have already signaled readclock to set the alarm.
79433d6423SLionel Sambuc  */
80433d6423SLionel Sambuc 	if (BOARD_IS_BB(machine.board_id)) {
81433d6423SLionel Sambuc 		/* rtc was frozen to prevent premature power-off, unfreeze it
82433d6423SLionel Sambuc 		 * now */
83433d6423SLionel Sambuc 		omap3_rtc_run();
84433d6423SLionel Sambuc 
85433d6423SLionel Sambuc 		/* wait for the alarm to go off and PMIC to disable power to
86433d6423SLionel Sambuc 		 * SoC */
87433d6423SLionel Sambuc 		while (1);
88433d6423SLionel Sambuc 	}
89433d6423SLionel Sambuc }
90*222afb38SBen Gras 
bsp_disable_watchdog(void)91*222afb38SBen Gras void bsp_disable_watchdog(void)
92*222afb38SBen Gras {
93*222afb38SBen Gras         if(BOARD_IS_BB(machine.board_id)) {
94*222afb38SBen Gras 		mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0xAAAA);
95*222afb38SBen Gras 		while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ;
96*222afb38SBen Gras 		mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0x5555);
97*222afb38SBen Gras 		while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ;
98*222afb38SBen Gras 	}
99*222afb38SBen Gras }
100*222afb38SBen Gras 
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