xref: /minix3/minix/drivers/net/lan8710a/lan8710a.h (revision f7df02e7476731c31f12548e38bcadbaf0233f6a)
1*433d6423SLionel Sambuc #ifndef LAN8710A_H_
2*433d6423SLionel Sambuc #define LAN8710A_H_
3*433d6423SLionel Sambuc 
4*433d6423SLionel Sambuc #define LAN8710A_DEBUG		(1)
5*433d6423SLionel Sambuc 
6*433d6423SLionel Sambuc #if LAN8710A_DEBUG == 1
7*433d6423SLionel Sambuc 	#define LAN8710A_DEBUG_PRINT(args) 		\
8*433d6423SLionel Sambuc 		do {					\
9*433d6423SLionel Sambuc 			printf("LAN8710A DEBUG: ");	\
10*433d6423SLionel Sambuc 			printf args; 			\
11*433d6423SLionel Sambuc 			printf("\n");			\
12*433d6423SLionel Sambuc 		} while (0)
13*433d6423SLionel Sambuc #else
14*433d6423SLionel Sambuc 	#define LAN8710A_DEBUG_PRINT(args)
15*433d6423SLionel Sambuc #endif
16*433d6423SLionel Sambuc 
17*433d6423SLionel Sambuc /* Ethernet driver defines */
18*433d6423SLionel Sambuc #define LAN8710A_NAME_LEN	(11)
19*433d6423SLionel Sambuc 
20*433d6423SLionel Sambuc /* Descriptors flags */
21*433d6423SLionel Sambuc #define LAN8710A_DESC_FLAG_OWN		(1 << 29) /* ownership flag */
22*433d6423SLionel Sambuc #define LAN8710A_DESC_FLAG_SOP		(1 << 31) /* start of packet flag */
23*433d6423SLionel Sambuc #define LAN8710A_DESC_FLAG_EOP		(1 << 30) /* end of packet flag */
24*433d6423SLionel Sambuc 
25*433d6423SLionel Sambuc /* Number of Tx and Rx interrupts */
26*433d6423SLionel Sambuc #define LAN8710A_RX_INTR		(41)
27*433d6423SLionel Sambuc #define LAN8710A_TX_INTR		(42)
28*433d6423SLionel Sambuc 
29*433d6423SLionel Sambuc /* Values to be written after interrupt handle and interrupt masks*/
30*433d6423SLionel Sambuc #define RX_INT				(1)
31*433d6423SLionel Sambuc #define TX_INT				(2)
32*433d6423SLionel Sambuc 
33*433d6423SLionel Sambuc /** Numbers of Tx DMA channels */
34*433d6423SLionel Sambuc #define TX_DMA_CHANNELS			(8)
35*433d6423SLionel Sambuc 
36*433d6423SLionel Sambuc /** Number of transmit descriptors */
37*433d6423SLionel Sambuc #define LAN8710A_NUM_TX_DESC		(255)
38*433d6423SLionel Sambuc 
39*433d6423SLionel Sambuc /** Number of receive descriptors */
40*433d6423SLionel Sambuc #define LAN8710A_NUM_RX_DESC		(255)
41*433d6423SLionel Sambuc 
42*433d6423SLionel Sambuc /** Size of each I/O buffer per descriptor. */
43*433d6423SLionel Sambuc #define LAN8710A_IOBUF_SIZE		(1520)
44*433d6423SLionel Sambuc 
45*433d6423SLionel Sambuc /** MAC address override variable. */
46*433d6423SLionel Sambuc #define LAN8710A_ENVVAR 		"LAN8710AETH"
47*433d6423SLionel Sambuc 
48*433d6423SLionel Sambuc /** MAX DMA Channels */
49*433d6423SLionel Sambuc #define DMA_MAX_CHANNELS		(8)
50*433d6423SLionel Sambuc 
51*433d6423SLionel Sambuc /* Setting of Tx descriptors */
52*433d6423SLionel Sambuc #define TX_DESC_TO_PORT1 		(1 << 16)
53*433d6423SLionel Sambuc #define TX_DESC_TO_PORT_EN 		(1 << 20)
54*433d6423SLionel Sambuc 
55*433d6423SLionel Sambuc typedef struct lan8710a_desc_t
56*433d6423SLionel Sambuc {
57*433d6423SLionel Sambuc 	u32_t  next_pointer;
58*433d6423SLionel Sambuc 	u32_t  buffer_pointer;
59*433d6423SLionel Sambuc 	u32_t  buffer_length_off;
60*433d6423SLionel Sambuc 	u32_t  pkt_len_flags;
61*433d6423SLionel Sambuc } lan8710a_desc_t;
62*433d6423SLionel Sambuc 
63*433d6423SLionel Sambuc typedef struct lan8710a_t
64*433d6423SLionel Sambuc {
65*433d6423SLionel Sambuc 	lan8710a_desc_t  *rx_desc;
66*433d6423SLionel Sambuc 	lan8710a_desc_t  *tx_desc;
67*433d6423SLionel Sambuc 	phys_bytes  rx_desc_phy;
68*433d6423SLionel Sambuc 	phys_bytes  tx_desc_phy;
69*433d6423SLionel Sambuc 	int  irq_rx_hook;	/* Rx interrupt Request Vector Hook. */
70*433d6423SLionel Sambuc 	int  irq_tx_hook;	/* Tx interrupt Request Vector Hook. */
71*433d6423SLionel Sambuc 	u8_t  *regs;
72*433d6423SLionel Sambuc 	u32_t  phy_address;
73*433d6423SLionel Sambuc 	u8_t  *p_rx_buf;	/* pointer to the buffer with receive frames */
74*433d6423SLionel Sambuc 	u8_t  *p_tx_buf;	/* pointer to the buffer with transmit frames */
75*433d6423SLionel Sambuc 
76*433d6423SLionel Sambuc 	u16_t  tx_desc_idx;	/* index of the next transmit desciptor */
77*433d6423SLionel Sambuc 	u16_t  rx_desc_idx;	/* index of the next receive desciptor */
78*433d6423SLionel Sambuc 
79*433d6423SLionel Sambuc 	/* register mapping */
80*433d6423SLionel Sambuc 	vir_bytes  regs_cp_per;
81*433d6423SLionel Sambuc 	vir_bytes  regs_mdio;
82*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_cpdma;
83*433d6423SLionel Sambuc 	vir_bytes  regs_ctrl_mod;
84*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_sl;
85*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_ss;
86*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_stats;
87*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_ale;
88*433d6423SLionel Sambuc 	vir_bytes  regs_cpsw_wr;
89*433d6423SLionel Sambuc 	vir_bytes  regs_intc;
90*433d6423SLionel Sambuc 	vir_bytes  regs_cpdma_stram;
91*433d6423SLionel Sambuc } lan8710a_t;
92*433d6423SLionel Sambuc 
93*433d6423SLionel Sambuc #endif /* LAN8710A_H_ */
94