1*433d6423SLionel Sambuc /** 2*433d6423SLionel Sambuc * @file e1000.h 3*433d6423SLionel Sambuc * 4*433d6423SLionel Sambuc * @brief Hardware specific datastructures of the Intel 5*433d6423SLionel Sambuc * Pro/1000 Gigabit Ethernet card(s). 6*433d6423SLionel Sambuc * 7*433d6423SLionel Sambuc * Parts of this code is based on the DragonflyBSD (FreeBSD) 8*433d6423SLionel Sambuc * implementation, and the fxp driver for Minix 3. 9*433d6423SLionel Sambuc * 10*433d6423SLionel Sambuc * @see http://svn.freebsd.org/viewvc/base/head/sys/dev/e1000/ 11*433d6423SLionel Sambuc * @see fxp.c 12*433d6423SLionel Sambuc * 13*433d6423SLionel Sambuc * @author Niek Linnenbank <nieklinnenbank@gmail.com> 14*433d6423SLionel Sambuc * @date September 2009 15*433d6423SLionel Sambuc * 16*433d6423SLionel Sambuc */ 17*433d6423SLionel Sambuc 18*433d6423SLionel Sambuc #ifndef __E1000_HW_H 19*433d6423SLionel Sambuc #define __E1000_HW_H 20*433d6423SLionel Sambuc 21*433d6423SLionel Sambuc #include <stdint.h> 22*433d6423SLionel Sambuc 23*433d6423SLionel Sambuc /** 24*433d6423SLionel Sambuc * @name Datastructures. 25*433d6423SLionel Sambuc * @{ 26*433d6423SLionel Sambuc */ 27*433d6423SLionel Sambuc 28*433d6423SLionel Sambuc /** 29*433d6423SLionel Sambuc * @brief Receive Descriptor Format. 30*433d6423SLionel Sambuc */ 31*433d6423SLionel Sambuc typedef struct e1000_rx_desc 32*433d6423SLionel Sambuc { 33*433d6423SLionel Sambuc u32_t buffer; /**< Address of the receive data buffer (64-bit). */ 34*433d6423SLionel Sambuc u32_t buffer_h; /**< High 32-bits of the receive data buffer (unused). */ 35*433d6423SLionel Sambuc u16_t length; /**< Size of the receive buffer. */ 36*433d6423SLionel Sambuc u16_t checksum; /**< Packet checksum. */ 37*433d6423SLionel Sambuc u8_t status; /**< Descriptor status. */ 38*433d6423SLionel Sambuc u8_t errors; /**< Descriptor errors. */ 39*433d6423SLionel Sambuc u16_t special; /**< VLAN information. */ 40*433d6423SLionel Sambuc } 41*433d6423SLionel Sambuc e1000_rx_desc_t; 42*433d6423SLionel Sambuc 43*433d6423SLionel Sambuc /** 44*433d6423SLionel Sambuc * @brief Transmit Descriptor Format. 45*433d6423SLionel Sambuc */ 46*433d6423SLionel Sambuc typedef struct e1000_tx_desc 47*433d6423SLionel Sambuc { 48*433d6423SLionel Sambuc u32_t buffer; /**< Address of the transmit buffer (64-bit). */ 49*433d6423SLionel Sambuc u32_t buffer_h; /**< High 32-bits of the transmit buffer (unused). */ 50*433d6423SLionel Sambuc u16_t length; /**< Size of the transmit buffer contents. */ 51*433d6423SLionel Sambuc u8_t checksum_off; /**< Checksum Offset. */ 52*433d6423SLionel Sambuc u8_t command; /**< Command field. */ 53*433d6423SLionel Sambuc u8_t status; /**< Status field. */ 54*433d6423SLionel Sambuc u8_t checksum_st; /**< Checksum Start. */ 55*433d6423SLionel Sambuc u16_t special; /**< Optional special bits. */ 56*433d6423SLionel Sambuc } 57*433d6423SLionel Sambuc e1000_tx_desc_t; 58*433d6423SLionel Sambuc 59*433d6423SLionel Sambuc /** 60*433d6423SLionel Sambuc * @brief ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown. 61*433d6423SLionel Sambuc * @see http://gitweb.dragonflybsd.org 62*433d6423SLionel Sambuc */ 63*433d6423SLionel Sambuc union ich8_hws_flash_status 64*433d6423SLionel Sambuc { 65*433d6423SLionel Sambuc struct ich8_hsfsts 66*433d6423SLionel Sambuc { 67*433d6423SLionel Sambuc unsigned flcdone :1; /**< bit 0 Flash Cycle Done */ 68*433d6423SLionel Sambuc unsigned flcerr :1; /**< bit 1 Flash Cycle Error */ 69*433d6423SLionel Sambuc unsigned dael :1; /**< bit 2 Direct Access error Log */ 70*433d6423SLionel Sambuc unsigned berasesz :2; /**< bit 4:3 Sector Erase Size */ 71*433d6423SLionel Sambuc unsigned flcinprog :1; /**< bit 5 flash cycle in Progress */ 72*433d6423SLionel Sambuc unsigned reserved1 :2; /**< bit 13:6 Reserved */ 73*433d6423SLionel Sambuc unsigned reserved2 :6; /**< bit 13:6 Reserved */ 74*433d6423SLionel Sambuc unsigned fldesvalid :1; /**< bit 14 Flash Descriptor Valid */ 75*433d6423SLionel Sambuc unsigned flockdn :1; /**< bit 15 Flash Config Lock-Down */ 76*433d6423SLionel Sambuc } hsf_status; 77*433d6423SLionel Sambuc u16_t regval; 78*433d6423SLionel Sambuc }; 79*433d6423SLionel Sambuc 80*433d6423SLionel Sambuc /** 81*433d6423SLionel Sambuc * @brief ICH GbE Flash Hardware Sequencing Flash control Register bit breakdown. 82*433d6423SLionel Sambuc * @see http://gitweb.dragonflybsd.org 83*433d6423SLionel Sambuc */ 84*433d6423SLionel Sambuc union ich8_hws_flash_ctrl 85*433d6423SLionel Sambuc { 86*433d6423SLionel Sambuc struct ich8_hsflctl 87*433d6423SLionel Sambuc { 88*433d6423SLionel Sambuc unsigned flcgo :1; /**< 0 Flash Cycle Go */ 89*433d6423SLionel Sambuc unsigned flcycle :2; /**< 2:1 Flash Cycle */ 90*433d6423SLionel Sambuc unsigned reserved :5; /**< 7:3 Reserved */ 91*433d6423SLionel Sambuc unsigned fldbcount :2; /**< 9:8 Flash Data Byte Count */ 92*433d6423SLionel Sambuc unsigned flockdn :6; /**< 15:10 Reserved */ 93*433d6423SLionel Sambuc } hsf_ctrl; 94*433d6423SLionel Sambuc u16_t regval; 95*433d6423SLionel Sambuc }; 96*433d6423SLionel Sambuc 97*433d6423SLionel Sambuc /** 98*433d6423SLionel Sambuc * @brief ICH Flash Region Access Permissions. 99*433d6423SLionel Sambuc * @see http://gitweb.dragonflybsd.org 100*433d6423SLionel Sambuc */ 101*433d6423SLionel Sambuc union ich8_hws_flash_regacc 102*433d6423SLionel Sambuc { 103*433d6423SLionel Sambuc struct ich8_flracc 104*433d6423SLionel Sambuc { 105*433d6423SLionel Sambuc unsigned grra :8; /**< 0:7 GbE region Read Access */ 106*433d6423SLionel Sambuc unsigned grwa :8; /**< 8:15 GbE region Write Access */ 107*433d6423SLionel Sambuc unsigned gmrag :8; /**< 23:16 GbE Master Read Access Grant */ 108*433d6423SLionel Sambuc unsigned gmwag :8; /**< 31:24 GbE Master Write Access Grant */ 109*433d6423SLionel Sambuc } hsf_flregacc; 110*433d6423SLionel Sambuc u16_t regval; 111*433d6423SLionel Sambuc }; 112*433d6423SLionel Sambuc 113*433d6423SLionel Sambuc /** 114*433d6423SLionel Sambuc * @} 115*433d6423SLionel Sambuc */ 116*433d6423SLionel Sambuc 117*433d6423SLionel Sambuc /** 118*433d6423SLionel Sambuc * @name Receive Status Field Bits. 119*433d6423SLionel Sambuc * @{ 120*433d6423SLionel Sambuc */ 121*433d6423SLionel Sambuc 122*433d6423SLionel Sambuc /** Passed In-exact Filter. */ 123*433d6423SLionel Sambuc #define E1000_RX_STATUS_PIF (1 << 7) 124*433d6423SLionel Sambuc 125*433d6423SLionel Sambuc /** End of Packet. */ 126*433d6423SLionel Sambuc #define E1000_RX_STATUS_EOP (1 << 1) 127*433d6423SLionel Sambuc 128*433d6423SLionel Sambuc /** Descriptor Done. */ 129*433d6423SLionel Sambuc #define E1000_RX_STATUS_DONE (1 << 0) 130*433d6423SLionel Sambuc 131*433d6423SLionel Sambuc /** 132*433d6423SLionel Sambuc * @} 133*433d6423SLionel Sambuc */ 134*433d6423SLionel Sambuc 135*433d6423SLionel Sambuc /** 136*433d6423SLionel Sambuc * @name Receive Errors Field Bits. 137*433d6423SLionel Sambuc * @{ 138*433d6423SLionel Sambuc */ 139*433d6423SLionel Sambuc 140*433d6423SLionel Sambuc /** RX Data Error. */ 141*433d6423SLionel Sambuc #define E1000_RX_ERROR_RXE (1 << 7) 142*433d6423SLionel Sambuc 143*433d6423SLionel Sambuc /** Carrier Extension Error. */ 144*433d6423SLionel Sambuc #define E1000_RX_ERROR_CXE (1 << 4) 145*433d6423SLionel Sambuc 146*433d6423SLionel Sambuc /** Sequence/Framing Error. */ 147*433d6423SLionel Sambuc #define E1000_RX_ERROR_SEQ (1 << 2) 148*433d6423SLionel Sambuc 149*433d6423SLionel Sambuc /** CRC/Alignment Error. */ 150*433d6423SLionel Sambuc #define E1000_RX_ERROR_CE (1 << 0) 151*433d6423SLionel Sambuc 152*433d6423SLionel Sambuc /** 153*433d6423SLionel Sambuc * @} 154*433d6423SLionel Sambuc */ 155*433d6423SLionel Sambuc 156*433d6423SLionel Sambuc /** 157*433d6423SLionel Sambuc * @name Transmit Command Field Bits. 158*433d6423SLionel Sambuc * @{ 159*433d6423SLionel Sambuc */ 160*433d6423SLionel Sambuc 161*433d6423SLionel Sambuc /** End of Packet. */ 162*433d6423SLionel Sambuc #define E1000_TX_CMD_EOP (1 << 0) 163*433d6423SLionel Sambuc 164*433d6423SLionel Sambuc /** Insert FCS/CRC. */ 165*433d6423SLionel Sambuc #define E1000_TX_CMD_FCS (1 << 1) 166*433d6423SLionel Sambuc 167*433d6423SLionel Sambuc /** Report Status. */ 168*433d6423SLionel Sambuc #define E1000_TX_CMD_RS (1 << 3) 169*433d6423SLionel Sambuc 170*433d6423SLionel Sambuc /** 171*433d6423SLionel Sambuc * @} 172*433d6423SLionel Sambuc */ 173*433d6423SLionel Sambuc 174*433d6423SLionel Sambuc #endif /* __E1000_HW_H */ 175