1*e415d488SLionel Sambuc/* $NetBSD: compat___sigtramp1.S,v 1.2 2011/07/12 07:51:33 mrg Exp $ */ 22fe8fb19SBen Gras 32fe8fb19SBen Gras/* 42fe8fb19SBen Gras * Copyright (c) 1996-2002 Eduardo Horvath 52fe8fb19SBen Gras * Copyright (c) 1996 Paul Kranenburg 62fe8fb19SBen Gras * Copyright (c) 1996 72fe8fb19SBen Gras * The President and Fellows of Harvard College. All rights reserved. 82fe8fb19SBen Gras * Copyright (c) 1992, 1993 92fe8fb19SBen Gras * The Regents of the University of California. All rights reserved. 102fe8fb19SBen Gras * 112fe8fb19SBen Gras * This software was developed by the Computer Systems Engineering group 122fe8fb19SBen Gras * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 132fe8fb19SBen Gras * contributed to Berkeley. 142fe8fb19SBen Gras * 152fe8fb19SBen Gras * All advertising materials mentioning features or use of this software 162fe8fb19SBen Gras * must display the following acknowledgement: 172fe8fb19SBen Gras * This product includes software developed by the University of 182fe8fb19SBen Gras * California, Lawrence Berkeley Laboratory. 192fe8fb19SBen Gras * This product includes software developed by Harvard University. 202fe8fb19SBen Gras * 212fe8fb19SBen Gras * Redistribution and use in source and binary forms, with or without 222fe8fb19SBen Gras * modification, are permitted provided that the following conditions 232fe8fb19SBen Gras * are met: 242fe8fb19SBen Gras * 1. Redistributions of source code must retain the above copyright 252fe8fb19SBen Gras * notice, this list of conditions and the following disclaimer. 262fe8fb19SBen Gras * 2. Redistributions in binary form must reproduce the above copyright 272fe8fb19SBen Gras * notice, this list of conditions and the following disclaimer in the 282fe8fb19SBen Gras * documentation and/or other materials provided with the distribution. 292fe8fb19SBen Gras * 3. All advertising materials mentioning features or use of this software 302fe8fb19SBen Gras * must display the following acknowledgement: 312fe8fb19SBen Gras * This product includes software developed by Harvard University. 322fe8fb19SBen Gras * This product includes software developed by Paul Kranenburg. 332fe8fb19SBen Gras * 4. Neither the name of the University nor the names of its contributors 342fe8fb19SBen Gras * may be used to endorse or promote products derived from this software 352fe8fb19SBen Gras * without specific prior written permission. 362fe8fb19SBen Gras * 372fe8fb19SBen Gras * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 382fe8fb19SBen Gras * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 392fe8fb19SBen Gras * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 402fe8fb19SBen Gras * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 412fe8fb19SBen Gras * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 422fe8fb19SBen Gras * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 432fe8fb19SBen Gras * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 442fe8fb19SBen Gras * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 452fe8fb19SBen Gras * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 462fe8fb19SBen Gras * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 472fe8fb19SBen Gras * SUCH DAMAGE. 482fe8fb19SBen Gras */ 492fe8fb19SBen Gras 502fe8fb19SBen Gras#include "SYS.h" 512fe8fb19SBen Gras 522fe8fb19SBen Gras#define _LOCORE 532fe8fb19SBen Gras#include <machine/frame.h> 542fe8fb19SBen Gras#include <machine/fsr.h> 552fe8fb19SBen Gras#include <machine/ctlreg.h> 562fe8fb19SBen Gras#include <machine/psl.h> 572fe8fb19SBen Gras 582fe8fb19SBen Gras .register %g2,#ignore 592fe8fb19SBen Gras .register %g3,#ignore 602fe8fb19SBen Gras 61*e415d488SLionel Sambuc#define BLOCK_SIZE SPARC64_BLOCK_SIZE 62*e415d488SLionel Sambuc#define BLOCK_ALIGN SPARC64_BLOCK_ALIGN 63*e415d488SLionel Sambuc 642fe8fb19SBen Gras/* 652fe8fb19SBen Gras * When this code is run, the stack looks like: 662fe8fb19SBen Gras * [%sp] 128 bytes to which registers can be dumped 672fe8fb19SBen Gras * [%sp + 128] signal number (goes in %o0) 682fe8fb19SBen Gras * [%sp + 128 + 4] signal code (goes in %o1) 692fe8fb19SBen Gras * [%sp + 128 + 8] first word of saved state (sigcontext) 702fe8fb19SBen Gras * . 712fe8fb19SBen Gras * . 722fe8fb19SBen Gras * . 732fe8fb19SBen Gras * [%sp + NNN] last word of saved state 742fe8fb19SBen Gras * (followed by previous stack contents or top of signal stack). 752fe8fb19SBen Gras * The address of the function to call is in %g1; the old %g1 and %o0 762fe8fb19SBen Gras * have already been saved in the sigcontext. We are running in a clean 772fe8fb19SBen Gras * window, all previous windows now being saved to the stack. 782fe8fb19SBen Gras * 792fe8fb19SBen Gras * Note that [%sp + 128 + 8] == %sp + 128 + 16. The copy at %sp+128+8 802fe8fb19SBen Gras * will eventually be removed, with a hole left in its place, if things 812fe8fb19SBen Gras * work out. 822fe8fb19SBen Gras */ 832fe8fb19SBen GrasENTRY_NOPROFILE(__sigtramp_sigcontext_1) 842fe8fb19SBen Gras /* 852fe8fb19SBen Gras * XXX the `save' and `restore' below are unnecessary: should 862fe8fb19SBen Gras * replace with simple arithmetic on %sp 872fe8fb19SBen Gras * 882fe8fb19SBen Gras * Make room on the stack for 64 %f registers + %fsr. This comes 892fe8fb19SBen Gras * out to 64*4+8 or 264 bytes, but this must be aligned to a multiple 902fe8fb19SBen Gras * of 64, or 320 bytes. 912fe8fb19SBen Gras */ 922fe8fb19SBen Gras save %sp, -CC64FSZ - 320, %sp 932fe8fb19SBen Gras mov %g2, %l2 /* save globals in %l registers */ 942fe8fb19SBen Gras mov %g3, %l3 952fe8fb19SBen Gras mov %g4, %l4 962fe8fb19SBen Gras mov %g5, %l5 972fe8fb19SBen Gras mov %g6, %l6 982fe8fb19SBen Gras mov %g7, %l7 992fe8fb19SBen Gras /* 1002fe8fb19SBen Gras * Saving the fpu registers is expensive, so do it iff it is 1012fe8fb19SBen Gras * enabled and dirty. 1022fe8fb19SBen Gras */ 1032fe8fb19SBen Gras rd %fprs, %l0 1042fe8fb19SBen Gras btst FPRS_DL|FPRS_DU, %l0 /* All clean? */ 1052fe8fb19SBen Gras bz,pt %icc, 2f 1062fe8fb19SBen Gras btst FPRS_DL, %l0 /* test dl */ 1072fe8fb19SBen Gras bz,pt %icc, 1f 1082fe8fb19SBen Gras btst FPRS_DU, %l0 /* test du */ 1092fe8fb19SBen Gras 1102fe8fb19SBen Gras /* fpu is enabled, oh well */ 1112fe8fb19SBen Gras stx %fsr, [%sp + CC64FSZ + BIAS + 0] 1122fe8fb19SBen Gras add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 /* Generate a pointer so */ 1132fe8fb19SBen Gras andn %l0, BLOCK_ALIGN, %l0 /* we can do a block store */ 1142fe8fb19SBen Gras stda %f0, [%l0] ASI_BLK_P 1152fe8fb19SBen Gras inc BLOCK_SIZE, %l0 1162fe8fb19SBen Gras stda %f16, [%l0] ASI_BLK_P 1172fe8fb19SBen Gras1: 1182fe8fb19SBen Gras bz,pt %icc, 2f 1192fe8fb19SBen Gras add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 /* Generate a pointer so */ 1202fe8fb19SBen Gras andn %l0, BLOCK_ALIGN, %l0 /* we can do a block store */ 1212fe8fb19SBen Gras add %l0, 2*BLOCK_SIZE, %l0 /* and skip what we already stored */ 1222fe8fb19SBen Gras stda %f32, [%l0] ASI_BLK_P 1232fe8fb19SBen Gras inc BLOCK_SIZE, %l0 1242fe8fb19SBen Gras stda %f48, [%l0] ASI_BLK_P 1252fe8fb19SBen Gras2: 1262fe8fb19SBen Gras membar #Sync 1272fe8fb19SBen Gras rd %y, %l1 /* in any case, save %y */ 1282fe8fb19SBen Gras lduw [%fp + BIAS + 128], %o0 /* sig */ 1292fe8fb19SBen Gras lduw [%fp + BIAS + 128 + 4], %o1 /* code */ 1302fe8fb19SBen Gras call %g1 /* call handler */ 1312fe8fb19SBen Gras add %fp, BIAS + 128 + 8, %o2 /* scp */ 1322fe8fb19SBen Gras 1332fe8fb19SBen Gras /* 1342fe8fb19SBen Gras * Now that the handler has returned, re-establish all the state 1352fe8fb19SBen Gras * we just saved above, then do a sigreturn. 1362fe8fb19SBen Gras */ 1372fe8fb19SBen Gras btst 3, %l0 /* All clean? */ 1382fe8fb19SBen Gras bz,pt %icc, 2f 1392fe8fb19SBen Gras btst 1, %l0 /* test dl */ 1402fe8fb19SBen Gras bz,pt %icc, 1f 1412fe8fb19SBen Gras btst 2, %l0 /* test du */ 1422fe8fb19SBen Gras 1432fe8fb19SBen Gras ldx [%sp + CC64FSZ + BIAS + 0], %fsr 1442fe8fb19SBen Gras add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 /* Generate a pointer so */ 1452fe8fb19SBen Gras andn %l0, BLOCK_ALIGN, %l0 /* we can do a block load */ 1462fe8fb19SBen Gras ldda [%l0] ASI_BLK_P, %f0 1472fe8fb19SBen Gras inc BLOCK_SIZE, %l0 1482fe8fb19SBen Gras ldda [%l0] ASI_BLK_P, %f16 1492fe8fb19SBen Gras1: 1502fe8fb19SBen Gras bz,pt %icc, 2f 1512fe8fb19SBen Gras wr %l1, %g0, %y /* in any case, restore %y */ 1522fe8fb19SBen Gras add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 /* Generate a pointer so */ 1532fe8fb19SBen Gras andn %l0, BLOCK_ALIGN, %l0 /* we can do a block load */ 1542fe8fb19SBen Gras inc 2*BLOCK_SIZE, %l0 /* and skip what we already loaded */ 1552fe8fb19SBen Gras ldda [%l0] ASI_BLK_P, %f32 1562fe8fb19SBen Gras inc BLOCK_SIZE, %l0 1572fe8fb19SBen Gras ldda [%l0] ASI_BLK_P, %f48 1582fe8fb19SBen Gras2: 1592fe8fb19SBen Gras mov %l2, %g2 1602fe8fb19SBen Gras mov %l3, %g3 1612fe8fb19SBen Gras mov %l4, %g4 1622fe8fb19SBen Gras mov %l5, %g5 1632fe8fb19SBen Gras mov %l6, %g6 1642fe8fb19SBen Gras mov %l7, %g7 1652fe8fb19SBen Gras membar #Sync 1662fe8fb19SBen Gras 1672fe8fb19SBen Gras /* get registers back and set syscall # */ 1682fe8fb19SBen Gras restore %g0, SYS_compat_16___sigreturn14, %g1 1692fe8fb19SBen Gras add %sp, BIAS + 128 + 8, %o0 /* compute scp */ 1702fe8fb19SBen Gras t ST_SYSCALL /* call sigreturn */ 1712fe8fb19SBen Gras mov SYS_exit, %g1 /* exit with errno */ 1722fe8fb19SBen Gras t ST_SYSCALL /* if sigreturn fails */ 173