1*2fe8fb19SBen Gras/* $NetBSD: compat___sigtramp1.S,v 1.1 2005/10/15 22:11:22 uwe Exp $ */ 2*2fe8fb19SBen Gras 3*2fe8fb19SBen Gras/* 4*2fe8fb19SBen Gras * Copyright (c) 1996 Paul Kranenburg 5*2fe8fb19SBen Gras * Copyright (c) 1996 6*2fe8fb19SBen Gras * The President and Fellows of Harvard College. All rights reserved. 7*2fe8fb19SBen Gras * Copyright (c) 1992, 1993 8*2fe8fb19SBen Gras * The Regents of the University of California. All rights reserved. 9*2fe8fb19SBen Gras * 10*2fe8fb19SBen Gras * This software was developed by the Computer Systems Engineering group 11*2fe8fb19SBen Gras * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 12*2fe8fb19SBen Gras * contributed to Berkeley. 13*2fe8fb19SBen Gras * 14*2fe8fb19SBen Gras * All advertising materials mentioning features or use of this software 15*2fe8fb19SBen Gras * must display the following acknowledgement: 16*2fe8fb19SBen Gras * This product includes software developed by the University of 17*2fe8fb19SBen Gras * California, Lawrence Berkeley Laboratory. 18*2fe8fb19SBen Gras * This product includes software developed by Harvard University. 19*2fe8fb19SBen Gras * 20*2fe8fb19SBen Gras * Redistribution and use in source and binary forms, with or without 21*2fe8fb19SBen Gras * modification, are permitted provided that the following conditions 22*2fe8fb19SBen Gras * are met: 23*2fe8fb19SBen Gras * 1. Redistributions of source code must retain the above copyright 24*2fe8fb19SBen Gras * notice, this list of conditions and the following disclaimer. 25*2fe8fb19SBen Gras * 2. Redistributions in binary form must reproduce the above copyright 26*2fe8fb19SBen Gras * notice, this list of conditions and the following disclaimer in the 27*2fe8fb19SBen Gras * documentation and/or other materials provided with the distribution. 28*2fe8fb19SBen Gras * 3. All advertising materials mentioning features or use of this software 29*2fe8fb19SBen Gras * must display the following acknowledgement: 30*2fe8fb19SBen Gras * This product includes software developed by Harvard University. 31*2fe8fb19SBen Gras * This product includes software developed by Paul Kranenburg. 32*2fe8fb19SBen Gras * 4. Neither the name of the University nor the names of its contributors 33*2fe8fb19SBen Gras * may be used to endorse or promote products derived from this software 34*2fe8fb19SBen Gras * without specific prior written permission. 35*2fe8fb19SBen Gras * 36*2fe8fb19SBen Gras * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 37*2fe8fb19SBen Gras * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 38*2fe8fb19SBen Gras * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 39*2fe8fb19SBen Gras * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 40*2fe8fb19SBen Gras * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 41*2fe8fb19SBen Gras * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 42*2fe8fb19SBen Gras * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 43*2fe8fb19SBen Gras * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 44*2fe8fb19SBen Gras * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 45*2fe8fb19SBen Gras * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 46*2fe8fb19SBen Gras * SUCH DAMAGE. 47*2fe8fb19SBen Gras */ 48*2fe8fb19SBen Gras 49*2fe8fb19SBen Gras#include "SYS.h" 50*2fe8fb19SBen Gras 51*2fe8fb19SBen Gras#define _LOCORE 52*2fe8fb19SBen Gras#include <machine/frame.h> 53*2fe8fb19SBen Gras#include <machine/psl.h> 54*2fe8fb19SBen Gras#include <machine/signal.h> 55*2fe8fb19SBen Gras 56*2fe8fb19SBen Gras/* 57*2fe8fb19SBen Gras * When this code is run, the stack looks like: 58*2fe8fb19SBen Gras * [%sp] 64 bytes to which registers can be dumped 59*2fe8fb19SBen Gras * [%sp + 64] signal number (goes in %o0) 60*2fe8fb19SBen Gras * [%sp + 64 + 4] signal code (goes in %o1) 61*2fe8fb19SBen Gras * [%sp + 64 + 8] placeholder 62*2fe8fb19SBen Gras * [%sp + 64 + 12] argument for %o3, currently unsupported (always 0) 63*2fe8fb19SBen Gras * [%sp + 64 + 16] first word of saved state (sigcontext) 64*2fe8fb19SBen Gras * . 65*2fe8fb19SBen Gras * . 66*2fe8fb19SBen Gras * . 67*2fe8fb19SBen Gras * [%sp + NNN] last word of saved state 68*2fe8fb19SBen Gras * (followed by previous stack contents or top of signal stack). 69*2fe8fb19SBen Gras * The address of the function to call is in %g1; the old %g1 and %o0 70*2fe8fb19SBen Gras * have already been saved in the sigcontext. We are running in a clean 71*2fe8fb19SBen Gras * window, all previous windows now being saved to the stack. 72*2fe8fb19SBen Gras * 73*2fe8fb19SBen Gras * Note that [%sp + 64 + 8] == %sp + 64 + 16. The copy at %sp+64+8 74*2fe8fb19SBen Gras * will eventually be removed, with a hole left in its place, if things 75*2fe8fb19SBen Gras * work out. 76*2fe8fb19SBen Gras */ 77*2fe8fb19SBen Gras#define SAVE_STATE \ 78*2fe8fb19SBen Gras /* \ 79*2fe8fb19SBen Gras * XXX the `save' and `restore' below are unnecessary: should \ 80*2fe8fb19SBen Gras * replace with simple arithmetic on %sp \ 81*2fe8fb19SBen Gras * \ 82*2fe8fb19SBen Gras * Make room on the stack for 32 %f registers + %fsr. This comes \ 83*2fe8fb19SBen Gras * out to 33*4 or 132 bytes, but this must be aligned to a multiple \ 84*2fe8fb19SBen Gras * of 8, or 136 bytes. \ 85*2fe8fb19SBen Gras */ \ 86*2fe8fb19SBen Gras save %sp, -CCFSZ - 136, %sp; \ 87*2fe8fb19SBen Gras mov %g2, %l2; /* save globals in %l registers */ \ 88*2fe8fb19SBen Gras mov %g3, %l3; \ 89*2fe8fb19SBen Gras mov %g4, %l4; \ 90*2fe8fb19SBen Gras mov %g5, %l5; \ 91*2fe8fb19SBen Gras mov %g6, %l6; \ 92*2fe8fb19SBen Gras mov %g7, %l7; \ 93*2fe8fb19SBen Gras /* \ 94*2fe8fb19SBen Gras * Saving the fpu registers is expensive, so do it iff the fsr \ 95*2fe8fb19SBen Gras * stored in the sigcontext shows that the fpu is enabled. \ 96*2fe8fb19SBen Gras */ \ 97*2fe8fb19SBen Gras ld [%fp + 64 + 16 + SC_PSR_OFFSET], %l0; \ 98*2fe8fb19SBen Gras sethi %hi(PSR_EF), %l1; /* FPU enable is too high for andcc */ \ 99*2fe8fb19SBen Gras andcc %l0, %l1, %l0; /* %l0 = fpu enable bit */ \ 100*2fe8fb19SBen Gras be 1f; /* if not set, skip the saves */ \ 101*2fe8fb19SBen Gras rd %y, %l1; /* in any case, save %y */ \ 102*2fe8fb19SBen Gras /* fpu is enabled, oh well */ \ 103*2fe8fb19SBen Gras st %fsr, [%sp + CCFSZ + 0]; \ 104*2fe8fb19SBen Gras std %f0, [%sp + CCFSZ + 8]; \ 105*2fe8fb19SBen Gras std %f2, [%sp + CCFSZ + 16]; \ 106*2fe8fb19SBen Gras std %f4, [%sp + CCFSZ + 24]; \ 107*2fe8fb19SBen Gras std %f6, [%sp + CCFSZ + 32]; \ 108*2fe8fb19SBen Gras std %f8, [%sp + CCFSZ + 40]; \ 109*2fe8fb19SBen Gras std %f10, [%sp + CCFSZ + 48]; \ 110*2fe8fb19SBen Gras std %f12, [%sp + CCFSZ + 56]; \ 111*2fe8fb19SBen Gras std %f14, [%sp + CCFSZ + 64]; \ 112*2fe8fb19SBen Gras std %f16, [%sp + CCFSZ + 72]; \ 113*2fe8fb19SBen Gras std %f18, [%sp + CCFSZ + 80]; \ 114*2fe8fb19SBen Gras std %f20, [%sp + CCFSZ + 88]; \ 115*2fe8fb19SBen Gras std %f22, [%sp + CCFSZ + 96]; \ 116*2fe8fb19SBen Gras std %f24, [%sp + CCFSZ + 104]; \ 117*2fe8fb19SBen Gras std %f26, [%sp + CCFSZ + 112]; \ 118*2fe8fb19SBen Gras std %f28, [%sp + CCFSZ + 120]; \ 119*2fe8fb19SBen Gras std %f30, [%sp + CCFSZ + 128]; \ 120*2fe8fb19SBen Gras1: 121*2fe8fb19SBen Gras 122*2fe8fb19SBen Gras#define RESTORE_STATE \ 123*2fe8fb19SBen Gras /* \ 124*2fe8fb19SBen Gras * Now that the handler has returned, re-establish all the state \ 125*2fe8fb19SBen Gras * we just saved above, then do a sigreturn. \ 126*2fe8fb19SBen Gras */ \ 127*2fe8fb19SBen Gras tst %l0; /* reload fpu registers? */ \ 128*2fe8fb19SBen Gras be 1f; /* if not, skip the loads */ \ 129*2fe8fb19SBen Gras wr %l1, %g0, %y; /* in any case, restore %y */ \ 130*2fe8fb19SBen Gras ld [%sp + CCFSZ + 0], %fsr; \ 131*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 8], %f0; \ 132*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 16], %f2; \ 133*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 24], %f4; \ 134*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 32], %f6; \ 135*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 40], %f8; \ 136*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 48], %f10; \ 137*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 56], %f12; \ 138*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 64], %f14; \ 139*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 72], %f16; \ 140*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 80], %f18; \ 141*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 88], %f20; \ 142*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 96], %f22; \ 143*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 104], %f24; \ 144*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 112], %f26; \ 145*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 120], %f28; \ 146*2fe8fb19SBen Gras ldd [%sp + CCFSZ + 128], %f30; \ 147*2fe8fb19SBen Gras1: \ 148*2fe8fb19SBen Gras mov %l2, %g2; \ 149*2fe8fb19SBen Gras mov %l3, %g3; \ 150*2fe8fb19SBen Gras mov %l4, %g4; \ 151*2fe8fb19SBen Gras mov %l5, %g5; \ 152*2fe8fb19SBen Gras mov %l6, %g6; \ 153*2fe8fb19SBen Gras mov %l7, %g7 154*2fe8fb19SBen Gras 155*2fe8fb19SBen GrasENTRY_NOPROFILE(__sigtramp_sigcontext_1) 156*2fe8fb19SBen Gras SAVE_STATE 157*2fe8fb19SBen Gras 158*2fe8fb19SBen Gras ldd [%fp + 64], %o0 /* sig, code */ 159*2fe8fb19SBen Gras ld [%fp + 76], %o3 /* arg3 */ 160*2fe8fb19SBen Gras call %g1 /* call handler */ 161*2fe8fb19SBen Gras add %fp, 64 + 16, %o2 /* pointer to sigcontext */ 162*2fe8fb19SBen Gras 163*2fe8fb19SBen Gras RESTORE_STATE 164*2fe8fb19SBen Gras 165*2fe8fb19SBen Gras /* Get registers back and set syscall # */ 166*2fe8fb19SBen Gras restore %g0, SYS_compat_16___sigreturn14, %g1 167*2fe8fb19SBen Gras add %sp, 64 + 16, %o0 /* compute scp */ 168*2fe8fb19SBen Gras t ST_SYSCALL /* call sigreturn */ 169*2fe8fb19SBen Gras mov SYS_exit, %g1 /* exit with errno */ 170*2fe8fb19SBen Gras t ST_SYSCALL /* if sigreturn fails */ 171