xref: /minix3/lib/libc/arch/arm/gen/_setjmp.S (revision 84d9c625bfea59e274550651111ae9edfdc40fbd)
1*84d9c625SLionel Sambuc/*	$NetBSD: _setjmp.S,v 1.16 2013/11/30 20:20:42 joerg Exp $	*/
22fe8fb19SBen Gras
32fe8fb19SBen Gras/*
42fe8fb19SBen Gras * Copyright (c) 1997 Mark Brinicombe
52fe8fb19SBen Gras * All rights reserved.
62fe8fb19SBen Gras *
72fe8fb19SBen Gras * Redistribution and use in source and binary forms, with or without
82fe8fb19SBen Gras * modification, are permitted provided that the following conditions
92fe8fb19SBen Gras * are met:
102fe8fb19SBen Gras * 1. Redistributions of source code must retain the above copyright
112fe8fb19SBen Gras *    notice, this list of conditions and the following disclaimer.
122fe8fb19SBen Gras * 2. Redistributions in binary form must reproduce the above copyright
132fe8fb19SBen Gras *    notice, this list of conditions and the following disclaimer in the
142fe8fb19SBen Gras *    documentation and/or other materials provided with the distribution.
152fe8fb19SBen Gras * 3. All advertising materials mentioning features or use of this software
162fe8fb19SBen Gras *    must display the following acknowledgement:
172fe8fb19SBen Gras *	This product includes software developed by Mark Brinicombe
182fe8fb19SBen Gras * 4. Neither the name of the University nor the names of its contributors
192fe8fb19SBen Gras *    may be used to endorse or promote products derived from this software
202fe8fb19SBen Gras *    without specific prior written permission.
212fe8fb19SBen Gras *
222fe8fb19SBen Gras * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
232fe8fb19SBen Gras * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
242fe8fb19SBen Gras * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
252fe8fb19SBen Gras * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
262fe8fb19SBen Gras * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
272fe8fb19SBen Gras * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
282fe8fb19SBen Gras * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
292fe8fb19SBen Gras * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
302fe8fb19SBen Gras * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
312fe8fb19SBen Gras * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
322fe8fb19SBen Gras * SUCH DAMAGE.
332fe8fb19SBen Gras */
342fe8fb19SBen Gras
35*84d9c625SLionel Sambuc#if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS)
36*84d9c625SLionel Sambuc#error FPA is not supported anymore
37*84d9c625SLionel Sambuc#endif
38*84d9c625SLionel Sambuc
39*84d9c625SLionel Sambuc#if defined(__ARM_EABI__) && !defined(__ARM_PCS_VFP)
40*84d9c625SLionel Sambuc	.fpu	vfp
41*84d9c625SLionel Sambuc#endif
42*84d9c625SLionel Sambuc
432fe8fb19SBen Gras#include <machine/asm.h>
442fe8fb19SBen Gras#include <machine/setjmp.h>
452fe8fb19SBen Gras
462fe8fb19SBen Gras/*
472fe8fb19SBen Gras * C library -- _setjmp, _longjmp
482fe8fb19SBen Gras *
492fe8fb19SBen Gras *	_longjmp(a,v)
502fe8fb19SBen Gras * will generate a "return(v)" from the last call to
512fe8fb19SBen Gras *	_setjmp(a)
522fe8fb19SBen Gras * by restoring registers from the stack.
532fe8fb19SBen Gras * The previous signal state is NOT restored.
542fe8fb19SBen Gras *
552fe8fb19SBen Gras * Note: r0 is the return value
56*84d9c625SLionel Sambuc *       r1-r3,ip are scratch registers in functions
572fe8fb19SBen Gras */
582fe8fb19SBen Gras
592fe8fb19SBen GrasENTRY(_setjmp)
602fe8fb19SBen Gras	ldr	r1, .L_setjmp_magic
612fe8fb19SBen Gras
62*84d9c625SLionel Sambuc#if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
63*84d9c625SLionel Sambuc	ldr	r2, .Lfpu_present
64*84d9c625SLionel Sambuc#ifdef __PIC__
65*84d9c625SLionel Sambuc	add	r2, r2, pc	/* pc = &.LPIC0 */
66*84d9c625SLionel Sambuc#endif
67*84d9c625SLionel Sambuc	ldr	r2, [r2]
68*84d9c625SLionel Sambuc.LPIC0:
69*84d9c625SLionel Sambuc#if defined(__thumb__) && defined(_ARM_ARCH_T2)
70*84d9c625SLionel Sambuc	cbz	r2, 1f
71*84d9c625SLionel Sambuc#else
72*84d9c625SLionel Sambuc	cmp	r2, #0		/* do we have a FPU? */
73*84d9c625SLionel Sambuc	beq	1f		/*   no, don't save VFP registers */
74*84d9c625SLionel Sambuc#endif
75*84d9c625SLionel Sambuc
76*84d9c625SLionel Sambuc	orrs	r1, r1, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
77*84d9c625SLionel Sambuc				/* change magic to VFP magic */
78*84d9c625SLionel Sambuc	adds	r2, r0, #(_JB_REG_D8 * 4)
79*84d9c625SLionel Sambuc	vstmia	r2, {d8-d15}
80*84d9c625SLionel Sambuc	vmrs	r2, fpscr
81*84d9c625SLionel Sambuc	str	r2, [r0, #(_JB_REG_FPSCR * 4)]
82*84d9c625SLionel Sambuc1:
83*84d9c625SLionel Sambuc#endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
84*84d9c625SLionel Sambuc
85*84d9c625SLionel Sambuc	str	r1, [r0]
86*84d9c625SLionel Sambuc
87*84d9c625SLionel Sambuc	adds	r0, r0, #(_JB_REG_R4 * 4)
88*84d9c625SLionel Sambuc	/* Store integer registers */
89*84d9c625SLionel Sambuc#if !defined(__thumb__) || defined(_ARCH_ARCH_T2)
90*84d9c625SLionel Sambuc        stmia	r0, {r4-r14}
91*84d9c625SLionel Sambuc#else
92*84d9c625SLionel Sambuc        stmia	r0!, {r4-r7}
93*84d9c625SLionel Sambuc	mov	r1, r8
94*84d9c625SLionel Sambuc	mov	r2, r9
95*84d9c625SLionel Sambuc	mov	r3, r10
96*84d9c625SLionel Sambuc	stmia	r0!, {r1-r3}
97*84d9c625SLionel Sambuc	mov	r2, r11
98*84d9c625SLionel Sambuc	mov	r3, r12
99*84d9c625SLionel Sambuc	stmia	r0!, {r2-r3}
100*84d9c625SLionel Sambuc	mov	r2, sp
101*84d9c625SLionel Sambuc	mov	r3, lr
102*84d9c625SLionel Sambuc	stmia	r0!, {r2-r3}
103*84d9c625SLionel Sambuc#endif
104*84d9c625SLionel Sambuc
105*84d9c625SLionel Sambuc        movs	r0, #0
1062fe8fb19SBen Gras        RET
1072fe8fb19SBen Gras
108*84d9c625SLionel Sambuc#if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
109*84d9c625SLionel Sambuc	.align	0
110*84d9c625SLionel Sambuc.Lfpu_present:
111*84d9c625SLionel Sambuc	.word	REL_SYM(_libc_arm_fpu_present, .LPIC0)
112*84d9c625SLionel Sambuc#endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
113*84d9c625SLionel SambucEND(_setjmp)
1142fe8fb19SBen Gras
1152fe8fb19SBen GrasENTRY(_longjmp)
116*84d9c625SLionel Sambuc	ldr	r2, [r0]			/* get magic from jmp_buf */
117*84d9c625SLionel Sambuc#if !defined(__thumb__) || defined(_ARM_ARCH_T2)
118*84d9c625SLionel Sambuc	bics	r3, r2, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
119*84d9c625SLionel Sambuc						/* ignore VFP-ness of magic */
120*84d9c625SLionel Sambuc	ldr	ip, .L_setjmp_magic		/* load magic */
1212fe8fb19SBen Gras#else
122*84d9c625SLionel Sambuc	ldr	r3, .L_setjmp_magic		/* load magic */
123*84d9c625SLionel Sambuc	mov	ip, r3
124*84d9c625SLionel Sambuc	movs	r3, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
125*84d9c625SLionel Sambuc	ands	r3, r3, r2
126*84d9c625SLionel Sambuc	eors	r3, r3, r2			/* ignore VFP-ness of magic */
127*84d9c625SLionel Sambuc#endif
128*84d9c625SLionel Sambuc	cmp	ip, r3				/* magic correct? */
129*84d9c625SLionel Sambuc	bne	botch				/*   no, botch */
130*84d9c625SLionel Sambuc
131*84d9c625SLionel Sambuc#if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
132*84d9c625SLionel Sambuc	cmp	r3, r2				/* did magic change? */
133*84d9c625SLionel Sambuc	beq	1f				/*   no, don't restore VFP */
134*84d9c625SLionel Sambuc	adds	r3, r0, #(_JB_REG_D8 * 4)
135*84d9c625SLionel Sambuc	vldmia	r3, {d8-d15}
136*84d9c625SLionel Sambuc	ldr	r3, [r0, #(_JB_REG_FPSCR * 4)]
137*84d9c625SLionel Sambuc	vmsr	fpscr, r3
138*84d9c625SLionel Sambuc1:
139*84d9c625SLionel Sambuc#endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
140*84d9c625SLionel Sambuc
141*84d9c625SLionel Sambuc	adds	r0, r0, #(_JB_REG_R4 * 4)
1422fe8fb19SBen Gras       	/* Restore integer registers */
143*84d9c625SLionel Sambuc#if !defined(__thumb__) || defined(_ARM_ARCH_T2)
144*84d9c625SLionel Sambuc        ldmia	r0!, {r4-r12}
145*84d9c625SLionel Sambuc#else
146*84d9c625SLionel Sambuc	ldmia	r0!, {r4-r7}
147*84d9c625SLionel Sambuc	ldmia	r0!, {r2-r3}
148*84d9c625SLionel Sambuc	mov	r8, r2
149*84d9c625SLionel Sambuc	mov	r9, r3
150*84d9c625SLionel Sambuc	ldmia	r0!, {r2-r3}
151*84d9c625SLionel Sambuc	mov	r10, r2
152*84d9c625SLionel Sambuc	mov	r1, r3
153*84d9c625SLionel Sambuc	adds	r0, r0, #4		/* skip r12 */
154*84d9c625SLionel Sambuc#endif
155*84d9c625SLionel Sambuc	ldmia	r0!, {r2-r3}		/* r2 = sp, r3 = lr */
1562fe8fb19SBen Gras
1572fe8fb19SBen Gras	/* Validate sp and r14 */
158*84d9c625SLionel Sambuc#if defined(__thumb__) && defined(_ARM_ARCH_T2)
159*84d9c625SLionel Sambuc	cbz	r2, botch
160*84d9c625SLionel Sambuc#else
161*84d9c625SLionel Sambuc	cmp	r2, #0
1622fe8fb19SBen Gras	beq	botch
163*84d9c625SLionel Sambuc#endif
164*84d9c625SLionel Sambuc	mov	sp, r2
165*84d9c625SLionel Sambuc
166*84d9c625SLionel Sambuc#if defined(__thumb__) && defined(_ARM_ARCH_T2)
167*84d9c625SLionel Sambuc	cbz	r3, botch
168*84d9c625SLionel Sambuc#else
169*84d9c625SLionel Sambuc	cmp	r3, #0
170*84d9c625SLionel Sambuc	beq	botch
171*84d9c625SLionel Sambuc#endif
172*84d9c625SLionel Sambuc	mov	lr, r3
1732fe8fb19SBen Gras
1742fe8fb19SBen Gras	/* Set return value */
175*84d9c625SLionel Sambuc	movs	r0, r1
176*84d9c625SLionel Sambuc#ifdef __thumb__
177*84d9c625SLionel Sambuc	bne	1f
178*84d9c625SLionel Sambuc	movs	r0, #1
179*84d9c625SLionel Sambuc1:
180*84d9c625SLionel Sambuc#else
181*84d9c625SLionel Sambuc	moveq	r0, #1
182*84d9c625SLionel Sambuc#endif
1832fe8fb19SBen Gras	RET
1842fe8fb19SBen Gras
1852fe8fb19SBen Gras	/* validation failed, die die die. */
1862fe8fb19SBen Grasbotch:
187*84d9c625SLionel Sambuc	bl	PLT_SYM(_C_LABEL(longjmperror))
188*84d9c625SLionel Sambuc	bl	PLT_SYM(_C_LABEL(abort))
189*84d9c625SLionel Sambuc1:	b	1b		/* Cannot get here */
190*84d9c625SLionel Sambuc
191*84d9c625SLionel Sambuc	.align	0
192*84d9c625SLionel Sambuc.L_setjmp_magic:
193*84d9c625SLionel Sambuc	.word	_JB_MAGIC__SETJMP
194*84d9c625SLionel SambucEND(_longjmp)
195