1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class wraps target description classes used by the various code 11 // generation TableGen backends. This makes it easier to access the data and 12 // provides a single place that needs to check it for validity. All of these 13 // classes abort on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "CodeGenTarget.h" 18 #include "CodeGenIntrinsics.h" 19 #include "CodeGenSchedule.h" 20 #include "llvm/ADT/STLExtras.h" 21 #include "llvm/ADT/StringExtras.h" 22 #include "llvm/Support/CommandLine.h" 23 #include "llvm/TableGen/Error.h" 24 #include "llvm/TableGen/Record.h" 25 #include <algorithm> 26 using namespace llvm; 27 28 static cl::opt<unsigned> 29 AsmParserNum("asmparsernum", cl::init(0), 30 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 31 32 static cl::opt<unsigned> 33 AsmWriterNum("asmwriternum", cl::init(0), 34 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 35 36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 37 /// record corresponds to. 38 MVT::SimpleValueType llvm::getValueType(Record *Rec) { 39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 40 } 41 42 std::string llvm::getName(MVT::SimpleValueType T) { 43 switch (T) { 44 case MVT::Other: return "UNKNOWN"; 45 case MVT::iPTR: return "TLI.getPointerTy()"; 46 case MVT::iPTRAny: return "TLI.getPointerTy()"; 47 default: return getEnumName(T); 48 } 49 } 50 51 std::string llvm::getEnumName(MVT::SimpleValueType T) { 52 switch (T) { 53 case MVT::Other: return "MVT::Other"; 54 case MVT::i1: return "MVT::i1"; 55 case MVT::i8: return "MVT::i8"; 56 case MVT::i16: return "MVT::i16"; 57 case MVT::i32: return "MVT::i32"; 58 case MVT::i64: return "MVT::i64"; 59 case MVT::i128: return "MVT::i128"; 60 case MVT::iAny: return "MVT::iAny"; 61 case MVT::fAny: return "MVT::fAny"; 62 case MVT::vAny: return "MVT::vAny"; 63 case MVT::f16: return "MVT::f16"; 64 case MVT::f32: return "MVT::f32"; 65 case MVT::f64: return "MVT::f64"; 66 case MVT::f80: return "MVT::f80"; 67 case MVT::f128: return "MVT::f128"; 68 case MVT::ppcf128: return "MVT::ppcf128"; 69 case MVT::x86mmx: return "MVT::x86mmx"; 70 case MVT::Glue: return "MVT::Glue"; 71 case MVT::isVoid: return "MVT::isVoid"; 72 case MVT::v2i1: return "MVT::v2i1"; 73 case MVT::v4i1: return "MVT::v4i1"; 74 case MVT::v8i1: return "MVT::v8i1"; 75 case MVT::v16i1: return "MVT::v16i1"; 76 case MVT::v32i1: return "MVT::v32i1"; 77 case MVT::v64i1: return "MVT::v64i1"; 78 case MVT::v1i8: return "MVT::v1i8"; 79 case MVT::v2i8: return "MVT::v2i8"; 80 case MVT::v4i8: return "MVT::v4i8"; 81 case MVT::v8i8: return "MVT::v8i8"; 82 case MVT::v16i8: return "MVT::v16i8"; 83 case MVT::v32i8: return "MVT::v32i8"; 84 case MVT::v64i8: return "MVT::v64i8"; 85 case MVT::v1i16: return "MVT::v1i16"; 86 case MVT::v2i16: return "MVT::v2i16"; 87 case MVT::v4i16: return "MVT::v4i16"; 88 case MVT::v8i16: return "MVT::v8i16"; 89 case MVT::v16i16: return "MVT::v16i16"; 90 case MVT::v32i16: return "MVT::v32i16"; 91 case MVT::v1i32: return "MVT::v1i32"; 92 case MVT::v2i32: return "MVT::v2i32"; 93 case MVT::v4i32: return "MVT::v4i32"; 94 case MVT::v8i32: return "MVT::v8i32"; 95 case MVT::v16i32: return "MVT::v16i32"; 96 case MVT::v1i64: return "MVT::v1i64"; 97 case MVT::v2i64: return "MVT::v2i64"; 98 case MVT::v4i64: return "MVT::v4i64"; 99 case MVT::v8i64: return "MVT::v8i64"; 100 case MVT::v16i64: return "MVT::v16i64"; 101 case MVT::v2f16: return "MVT::v2f16"; 102 case MVT::v4f16: return "MVT::v4f16"; 103 case MVT::v8f16: return "MVT::v8f16"; 104 case MVT::v1f32: return "MVT::v1f32"; 105 case MVT::v2f32: return "MVT::v2f32"; 106 case MVT::v4f32: return "MVT::v4f32"; 107 case MVT::v8f32: return "MVT::v8f32"; 108 case MVT::v16f32: return "MVT::v16f32"; 109 case MVT::v1f64: return "MVT::v1f64"; 110 case MVT::v2f64: return "MVT::v2f64"; 111 case MVT::v4f64: return "MVT::v4f64"; 112 case MVT::v8f64: return "MVT::v8f64"; 113 case MVT::Metadata: return "MVT::Metadata"; 114 case MVT::iPTR: return "MVT::iPTR"; 115 case MVT::iPTRAny: return "MVT::iPTRAny"; 116 case MVT::Untyped: return "MVT::Untyped"; 117 default: llvm_unreachable("ILLEGAL VALUE TYPE!"); 118 } 119 } 120 121 /// getQualifiedName - Return the name of the specified record, with a 122 /// namespace qualifier if the record contains one. 123 /// 124 std::string llvm::getQualifiedName(const Record *R) { 125 std::string Namespace; 126 if (R->getValue("Namespace")) 127 Namespace = R->getValueAsString("Namespace"); 128 if (Namespace.empty()) return R->getName(); 129 return Namespace + "::" + R->getName(); 130 } 131 132 133 /// getTarget - Return the current instance of the Target class. 134 /// 135 CodeGenTarget::CodeGenTarget(RecordKeeper &records) 136 : Records(records) { 137 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 138 if (Targets.size() == 0) 139 PrintFatalError("ERROR: No 'Target' subclasses defined!"); 140 if (Targets.size() != 1) 141 PrintFatalError("ERROR: Multiple subclasses of Target defined!"); 142 TargetRec = Targets[0]; 143 } 144 145 CodeGenTarget::~CodeGenTarget() { 146 } 147 148 const std::string &CodeGenTarget::getName() const { 149 return TargetRec->getName(); 150 } 151 152 std::string CodeGenTarget::getInstNamespace() const { 153 for (const CodeGenInstruction *Inst : instructions()) { 154 // Make sure not to pick up "TargetOpcode" by accidentally getting 155 // the namespace off the PHI instruction or something. 156 if (Inst->Namespace != "TargetOpcode") 157 return Inst->Namespace; 158 } 159 160 return ""; 161 } 162 163 Record *CodeGenTarget::getInstructionSet() const { 164 return TargetRec->getValueAsDef("InstructionSet"); 165 } 166 167 168 /// getAsmParser - Return the AssemblyParser definition for this target. 169 /// 170 Record *CodeGenTarget::getAsmParser() const { 171 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 172 if (AsmParserNum >= LI.size()) 173 PrintFatalError("Target does not have an AsmParser #" + 174 Twine(AsmParserNum) + "!"); 175 return LI[AsmParserNum]; 176 } 177 178 /// getAsmParserVariant - Return the AssmblyParserVariant definition for 179 /// this target. 180 /// 181 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const { 182 std::vector<Record*> LI = 183 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 184 if (i >= LI.size()) 185 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) + 186 "!"); 187 return LI[i]; 188 } 189 190 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition 191 /// available for this target. 192 /// 193 unsigned CodeGenTarget::getAsmParserVariantCount() const { 194 std::vector<Record*> LI = 195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 196 return LI.size(); 197 } 198 199 /// getAsmWriter - Return the AssemblyWriter definition for this target. 200 /// 201 Record *CodeGenTarget::getAsmWriter() const { 202 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 203 if (AsmWriterNum >= LI.size()) 204 PrintFatalError("Target does not have an AsmWriter #" + 205 Twine(AsmWriterNum) + "!"); 206 return LI[AsmWriterNum]; 207 } 208 209 CodeGenRegBank &CodeGenTarget::getRegBank() const { 210 if (!RegBank) 211 RegBank = llvm::make_unique<CodeGenRegBank>(Records); 212 return *RegBank; 213 } 214 215 void CodeGenTarget::ReadRegAltNameIndices() const { 216 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); 217 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); 218 } 219 220 /// getRegisterByName - If there is a register with the specific AsmName, 221 /// return it. 222 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 223 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 224 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 225 if (I == Regs.end()) 226 return nullptr; 227 return I->second; 228 } 229 230 std::vector<MVT::SimpleValueType> CodeGenTarget:: 231 getRegisterVTs(Record *R) const { 232 const CodeGenRegister *Reg = getRegBank().getReg(R); 233 std::vector<MVT::SimpleValueType> Result; 234 for (const auto &RC : getRegBank().getRegClasses()) { 235 if (RC.contains(Reg)) { 236 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes(); 237 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 238 } 239 } 240 241 // Remove duplicates. 242 array_pod_sort(Result.begin(), Result.end()); 243 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 244 return Result; 245 } 246 247 248 void CodeGenTarget::ReadLegalValueTypes() const { 249 for (const auto &RC : getRegBank().getRegClasses()) 250 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end()); 251 252 // Remove duplicates. 253 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 254 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 255 LegalValueTypes.end()), 256 LegalValueTypes.end()); 257 } 258 259 CodeGenSchedModels &CodeGenTarget::getSchedModels() const { 260 if (!SchedModels) 261 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this); 262 return *SchedModels; 263 } 264 265 void CodeGenTarget::ReadInstructions() const { 266 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 267 if (Insts.size() <= 2) 268 PrintFatalError("No 'Instruction' subclasses defined!"); 269 270 // Parse the instructions defined in the .td file. 271 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 272 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]); 273 } 274 275 static const CodeGenInstruction * 276 GetInstByName(const char *Name, 277 const DenseMap<const Record*, 278 std::unique_ptr<CodeGenInstruction>> &Insts, 279 RecordKeeper &Records) { 280 const Record *Rec = Records.getDef(Name); 281 282 const auto I = Insts.find(Rec); 283 if (!Rec || I == Insts.end()) 284 PrintFatalError(Twine("Could not find '") + Name + "' instruction!"); 285 return I->second.get(); 286 } 287 288 /// \brief Return all of the instructions defined by the target, ordered by 289 /// their enum value. 290 void CodeGenTarget::ComputeInstrsByEnum() const { 291 // The ordering here must match the ordering in TargetOpcodes.h. 292 static const char *const FixedInstrs[] = { 293 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL", 294 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG", 295 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE", 296 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START", 297 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD", 298 "STATEPOINT", "FRAME_ALLOC", 299 nullptr}; 300 const auto &Insts = getInstructions(); 301 for (const char *const *p = FixedInstrs; *p; ++p) { 302 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 303 assert(Instr && "Missing target independent instruction"); 304 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 305 InstrsByEnum.push_back(Instr); 306 } 307 unsigned EndOfPredefines = InstrsByEnum.size(); 308 309 for (const auto &I : Insts) { 310 const CodeGenInstruction *CGI = I.second.get(); 311 if (CGI->Namespace != "TargetOpcode") 312 InstrsByEnum.push_back(CGI); 313 } 314 315 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 316 317 // All of the instructions are now in random order based on the map iteration. 318 // Sort them by name. 319 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(), 320 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) { 321 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 322 }); 323 } 324 325 326 /// isLittleEndianEncoding - Return whether this target encodes its instruction 327 /// in little-endian format, i.e. bits laid out in the order [0..n] 328 /// 329 bool CodeGenTarget::isLittleEndianEncoding() const { 330 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 331 } 332 333 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit 334 /// encodings, reverse the bit order of all instructions. 335 void CodeGenTarget::reverseBitsForLittleEndianEncoding() { 336 if (!isLittleEndianEncoding()) 337 return; 338 339 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 340 for (Record *R : Insts) { 341 if (R->getValueAsString("Namespace") == "TargetOpcode" || 342 R->getValueAsBit("isPseudo")) 343 continue; 344 345 BitsInit *BI = R->getValueAsBitsInit("Inst"); 346 347 unsigned numBits = BI->getNumBits(); 348 349 SmallVector<Init *, 16> NewBits(numBits); 350 351 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) { 352 unsigned bitSwapIdx = numBits - bit - 1; 353 Init *OrigBit = BI->getBit(bit); 354 Init *BitSwap = BI->getBit(bitSwapIdx); 355 NewBits[bit] = BitSwap; 356 NewBits[bitSwapIdx] = OrigBit; 357 } 358 if (numBits % 2) { 359 unsigned middle = (numBits + 1) / 2; 360 NewBits[middle] = BI->getBit(middle); 361 } 362 363 BitsInit *NewBI = BitsInit::get(NewBits); 364 365 // Update the bits in reversed order so that emitInstrOpBits will get the 366 // correct endianness. 367 R->getValue("Inst")->setValue(NewBI); 368 } 369 } 370 371 /// guessInstructionProperties - Return true if it's OK to guess instruction 372 /// properties instead of raising an error. 373 /// 374 /// This is configurable as a temporary migration aid. It will eventually be 375 /// permanently false. 376 bool CodeGenTarget::guessInstructionProperties() const { 377 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); 378 } 379 380 //===----------------------------------------------------------------------===// 381 // ComplexPattern implementation 382 // 383 ComplexPattern::ComplexPattern(Record *R) { 384 Ty = ::getValueType(R->getValueAsDef("Ty")); 385 NumOperands = R->getValueAsInt("NumOperands"); 386 SelectFunc = R->getValueAsString("SelectFunc"); 387 RootNodes = R->getValueAsListOfDefs("RootNodes"); 388 389 // Parse the properties. 390 Properties = 0; 391 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 392 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 393 if (PropList[i]->getName() == "SDNPHasChain") { 394 Properties |= 1 << SDNPHasChain; 395 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 396 Properties |= 1 << SDNPOptInGlue; 397 } else if (PropList[i]->getName() == "SDNPMayStore") { 398 Properties |= 1 << SDNPMayStore; 399 } else if (PropList[i]->getName() == "SDNPMayLoad") { 400 Properties |= 1 << SDNPMayLoad; 401 } else if (PropList[i]->getName() == "SDNPSideEffect") { 402 Properties |= 1 << SDNPSideEffect; 403 } else if (PropList[i]->getName() == "SDNPMemOperand") { 404 Properties |= 1 << SDNPMemOperand; 405 } else if (PropList[i]->getName() == "SDNPVariadic") { 406 Properties |= 1 << SDNPVariadic; 407 } else if (PropList[i]->getName() == "SDNPWantRoot") { 408 Properties |= 1 << SDNPWantRoot; 409 } else if (PropList[i]->getName() == "SDNPWantParent") { 410 Properties |= 1 << SDNPWantParent; 411 } else { 412 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 413 << "' on ComplexPattern '" << R->getName() << "'!\n"; 414 exit(1); 415 } 416 } 417 418 //===----------------------------------------------------------------------===// 419 // CodeGenIntrinsic Implementation 420 //===----------------------------------------------------------------------===// 421 422 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 423 bool TargetOnly) { 424 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 425 426 std::vector<CodeGenIntrinsic> Result; 427 428 for (unsigned i = 0, e = I.size(); i != e; ++i) { 429 bool isTarget = I[i]->getValueAsBit("isTarget"); 430 if (isTarget == TargetOnly) 431 Result.push_back(CodeGenIntrinsic(I[i])); 432 } 433 return Result; 434 } 435 436 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 437 TheDef = R; 438 std::string DefName = R->getName(); 439 ModRef = ReadWriteMem; 440 isOverloaded = false; 441 isCommutative = false; 442 canThrow = false; 443 isNoReturn = false; 444 isNoDuplicate = false; 445 446 if (DefName.size() <= 4 || 447 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 448 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!"); 449 450 EnumName = std::string(DefName.begin()+4, DefName.end()); 451 452 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 453 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 454 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field. 455 MSBuiltinName = R->getValueAsString("MSBuiltinName"); 456 457 TargetPrefix = R->getValueAsString("TargetPrefix"); 458 Name = R->getValueAsString("LLVMName"); 459 460 if (Name == "") { 461 // If an explicit name isn't specified, derive one from the DefName. 462 Name = "llvm."; 463 464 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 465 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 466 } else { 467 // Verify it starts with "llvm.". 468 if (Name.size() <= 5 || 469 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 470 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"); 471 } 472 473 // If TargetPrefix is specified, make sure that Name starts with 474 // "llvm.<targetprefix>.". 475 if (!TargetPrefix.empty()) { 476 if (Name.size() < 6+TargetPrefix.size() || 477 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 478 != (TargetPrefix + ".")) 479 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." + 480 TargetPrefix + ".'!"); 481 } 482 483 // Parse the list of return types. 484 std::vector<MVT::SimpleValueType> OverloadedVTs; 485 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 486 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 487 Record *TyEl = TypeList->getElementAsRecord(i); 488 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 489 MVT::SimpleValueType VT; 490 if (TyEl->isSubClassOf("LLVMMatchType")) { 491 unsigned MatchTy = TyEl->getValueAsInt("Number"); 492 assert(MatchTy < OverloadedVTs.size() && 493 "Invalid matching number!"); 494 VT = OverloadedVTs[MatchTy]; 495 // It only makes sense to use the extended and truncated vector element 496 // variants with iAny types; otherwise, if the intrinsic is not 497 // overloaded, all the types can be specified directly. 498 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && 499 !TyEl->isSubClassOf("LLVMTruncatedType")) || 500 VT == MVT::iAny || VT == MVT::vAny) && 501 "Expected iAny or vAny type"); 502 } else { 503 VT = getValueType(TyEl->getValueAsDef("VT")); 504 } 505 if (MVT(VT).isOverloaded()) { 506 OverloadedVTs.push_back(VT); 507 isOverloaded = true; 508 } 509 510 // Reject invalid types. 511 if (VT == MVT::isVoid) 512 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 513 514 IS.RetVTs.push_back(VT); 515 IS.RetTypeDefs.push_back(TyEl); 516 } 517 518 // Parse the list of parameter types. 519 TypeList = R->getValueAsListInit("ParamTypes"); 520 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 521 Record *TyEl = TypeList->getElementAsRecord(i); 522 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 523 MVT::SimpleValueType VT; 524 if (TyEl->isSubClassOf("LLVMMatchType")) { 525 unsigned MatchTy = TyEl->getValueAsInt("Number"); 526 assert(MatchTy < OverloadedVTs.size() && 527 "Invalid matching number!"); 528 VT = OverloadedVTs[MatchTy]; 529 // It only makes sense to use the extended and truncated vector element 530 // variants with iAny types; otherwise, if the intrinsic is not 531 // overloaded, all the types can be specified directly. 532 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && 533 !TyEl->isSubClassOf("LLVMTruncatedType") && 534 !TyEl->isSubClassOf("LLVMVectorSameWidth") && 535 !TyEl->isSubClassOf("LLVMPointerToElt")) || 536 VT == MVT::iAny || VT == MVT::vAny) && 537 "Expected iAny or vAny type"); 538 } else 539 VT = getValueType(TyEl->getValueAsDef("VT")); 540 541 if (MVT(VT).isOverloaded()) { 542 OverloadedVTs.push_back(VT); 543 isOverloaded = true; 544 } 545 546 // Reject invalid types. 547 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 548 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 549 550 IS.ParamVTs.push_back(VT); 551 IS.ParamTypeDefs.push_back(TyEl); 552 } 553 554 // Parse the intrinsic properties. 555 ListInit *PropList = R->getValueAsListInit("Properties"); 556 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 557 Record *Property = PropList->getElementAsRecord(i); 558 assert(Property->isSubClassOf("IntrinsicProperty") && 559 "Expected a property!"); 560 561 if (Property->getName() == "IntrNoMem") 562 ModRef = NoMem; 563 else if (Property->getName() == "IntrReadArgMem") 564 ModRef = ReadArgMem; 565 else if (Property->getName() == "IntrReadMem") 566 ModRef = ReadMem; 567 else if (Property->getName() == "IntrReadWriteArgMem") 568 ModRef = ReadWriteArgMem; 569 else if (Property->getName() == "Commutative") 570 isCommutative = true; 571 else if (Property->getName() == "Throws") 572 canThrow = true; 573 else if (Property->getName() == "IntrNoDuplicate") 574 isNoDuplicate = true; 575 else if (Property->getName() == "IntrNoReturn") 576 isNoReturn = true; 577 else if (Property->isSubClassOf("NoCapture")) { 578 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 579 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 580 } else if (Property->isSubClassOf("ReadOnly")) { 581 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 582 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly)); 583 } else if (Property->isSubClassOf("ReadNone")) { 584 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 585 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone)); 586 } else 587 llvm_unreachable("Unknown property!"); 588 } 589 590 // Sort the argument attributes for later benefit. 591 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end()); 592 } 593