xref: /minix3/external/bsd/llvm/dist/llvm/test/CodeGen/X86/vec_fneg.ll (revision 433d6423c39e34ec4b79c950597bb2d236f886be)
1; RUN: llc < %s -march=x86 -mattr=+sse2
2
3define <4 x float> @t1(<4 x float> %Q) {
4        %tmp15 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
5	ret <4 x float> %tmp15
6}
7
8define <4 x float> @t2(<4 x float> %Q) {
9        %tmp15 = fsub <4 x float> zeroinitializer, %Q
10	ret <4 x float> %tmp15
11}
12