xref: /minix3/external/bsd/llvm/dist/llvm/test/CodeGen/X86/mmx-shift.ll (revision 0b98e8aad89f2bd4ba80b523d73cf29e9dd82ce1)
1; RUN: llc < %s -march=x86 -mattr=+mmx | FileCheck %s
2; RUN: llc < %s -march=x86-64 -mattr=+mmx | FileCheck %s
3
4define i64 @t1(<1 x i64> %mm1) nounwind  {
5entry:
6        %tmp = bitcast <1 x i64> %mm1 to x86_mmx
7	%tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 )		; <x86_mmx> [#uses=1]
8        %retval1112 = bitcast x86_mmx %tmp6 to i64
9	ret i64 %retval1112
10
11; CHECK-LABEL: t1:
12; CHECK: psllq $32
13}
14
15declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone
16
17define i64 @t2(x86_mmx %mm1, x86_mmx %mm2) nounwind  {
18entry:
19	%tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone 		; <x86_mmx> [#uses=1]
20        %retval1112 = bitcast x86_mmx %tmp7 to i64
21	ret i64 %retval1112
22
23; CHECK-LABEL: t2:
24; CHECK: psrad
25}
26
27declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone
28
29define i64 @t3(x86_mmx %mm1, i32 %bits) nounwind  {
30entry:
31	%tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone 		; <x86_mmx> [#uses=1]
32        %retval1314 = bitcast x86_mmx %tmp8 to i64
33	ret i64 %retval1314
34
35; CHECK-LABEL: t3:
36; CHECK: psrlw
37}
38
39declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone
40