xref: /minix3/external/bsd/llvm/dist/clang/test/CodeGen/mips-vector-arg.c (revision ebfedea0ce5bbe81e252ddf32d732e40fb633fae)
1 // RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32
2 // RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64
3 
4 // check that
5 // 1. vector arguments are passed in integer registers
6 // 2. argument alignment is no larger than 8-byte for O32 and 16-byte for N64.
7 
8 typedef float  v4sf __attribute__ ((__vector_size__ (16)));
9 typedef int v4i32 __attribute__ ((__vector_size__ (16)));
10 
11 // O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW:#[0-9]+]]
12 // O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
13 // N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW:#[0-9]+]]
14 // N64: declare i32 @test_v4sf_2(i64, i64, i32, i64, i64, i64)
15 extern test_v4sf_2(v4sf, int, v4sf);
16 void test_v4sf(v4sf a1, int a2, v4sf a3) {
17   test_v4sf_2(a3, a2, a1);
18 }
19 
20 // O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW]]
21 // O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
22 // N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW]]
23 // N64: declare i32 @test_v4i32_2(i64, i64, i32, i64, i64, i64)
24 extern test_v4i32_2(v4i32, int, v4i32);
25 void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
26   test_v4i32_2(a3, a2, a1);
27 }
28 
29 // O32: attributes [[NUW]] = { nounwind{{.*}} }
30 
31 // N64: attributes [[NUW]] = { nounwind{{.*}} }
32