1 //===- SparseTensorPipelines.cpp - Pipelines for sparse tensor code -------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "mlir/Dialect/SparseTensor/Pipelines/Passes.h" 10 11 #include "mlir/Conversion/ArithToLLVM/ArithToLLVM.h" 12 #include "mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h" 13 #include "mlir/Conversion/Passes.h" 14 #include "mlir/Dialect/Arith/Transforms/Passes.h" 15 #include "mlir/Dialect/Bufferization/Transforms/Bufferize.h" 16 #include "mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h" 17 #include "mlir/Dialect/Bufferization/Transforms/Passes.h" 18 #include "mlir/Dialect/Func/IR/FuncOps.h" 19 #include "mlir/Dialect/GPU/IR/GPUDialect.h" 20 #include "mlir/Dialect/GPU/Transforms/Passes.h" 21 #include "mlir/Dialect/LLVMIR/NVVMDialect.h" 22 #include "mlir/Dialect/Linalg/Passes.h" 23 #include "mlir/Dialect/MemRef/Transforms/Passes.h" 24 #include "mlir/Dialect/SparseTensor/IR/SparseTensor.h" 25 #include "mlir/Dialect/SparseTensor/Transforms/Passes.h" 26 #include "mlir/Pass/PassManager.h" 27 #include "mlir/Transforms/Passes.h" 28 29 //===----------------------------------------------------------------------===// 30 // Pipeline implementation. 31 //===----------------------------------------------------------------------===// 32 33 void mlir::sparse_tensor::buildSparsifier(OpPassManager &pm, 34 const SparsifierOptions &options) { 35 // Rewrite named linalg ops into generic ops and apply fusion. 36 pm.addNestedPass<func::FuncOp>(createLinalgGeneralizeNamedOpsPass()); 37 pm.addNestedPass<func::FuncOp>(createLinalgElementwiseOpFusionPass()); 38 39 // Sparsification and bufferization mini-pipeline. 40 pm.addPass(createSparsificationAndBufferizationPass( 41 getBufferizationOptionsForSparsification( 42 options.testBufferizationAnalysisOnly), 43 options.sparsificationOptions(), options.createSparseDeallocs, 44 options.enableRuntimeLibrary, options.enableBufferInitialization, 45 options.vectorLength, 46 /*enableVLAVectorization=*/options.armSVE, 47 /*enableSIMDIndex32=*/options.force32BitVectorIndices, 48 options.enableGPULibgen, 49 options.sparsificationOptions().sparseEmitStrategy, 50 options.sparsificationOptions().parallelizationStrategy)); 51 52 // Bail-early for test setup. 53 if (options.testBufferizationAnalysisOnly) 54 return; 55 56 // Storage specifier lowering and bufferization wrap-up. 57 pm.addPass(createStorageSpecifierToLLVMPass()); 58 pm.addNestedPass<func::FuncOp>(createCanonicalizerPass()); 59 60 // GPU code generation. 61 const bool gpuCodegen = options.gpuTriple.hasValue(); 62 if (gpuCodegen) { 63 pm.addPass(createSparseGPUCodegenPass()); 64 pm.addNestedPass<gpu::GPUModuleOp>(createStripDebugInfoPass()); 65 pm.addNestedPass<gpu::GPUModuleOp>(createConvertSCFToCFPass()); 66 pm.addNestedPass<gpu::GPUModuleOp>(createConvertGpuOpsToNVVMOps()); 67 } 68 69 // Progressively lower to LLVM. Note that the convert-vector-to-llvm 70 // pass is repeated on purpose. 71 // TODO(springerm): Add sparse support to the BufferDeallocation pass and add 72 // it to this pipeline. 73 pm.addNestedPass<func::FuncOp>(createConvertLinalgToLoopsPass()); 74 pm.addNestedPass<func::FuncOp>(createConvertVectorToSCFPass()); 75 pm.addNestedPass<func::FuncOp>(memref::createExpandReallocPass()); 76 pm.addNestedPass<func::FuncOp>(createConvertSCFToCFPass()); 77 pm.addPass(memref::createExpandStridedMetadataPass()); 78 pm.addPass(createLowerAffinePass()); 79 pm.addPass( 80 createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions())); 81 pm.addPass(createFinalizeMemRefToLLVMConversionPass()); 82 pm.addNestedPass<func::FuncOp>(createConvertComplexToStandardPass()); 83 pm.addNestedPass<func::FuncOp>(arith::createArithExpandOpsPass()); 84 pm.addNestedPass<func::FuncOp>(createConvertMathToLLVMPass()); 85 pm.addPass(createConvertMathToLibmPass()); 86 pm.addPass(createConvertComplexToLibmPass()); 87 pm.addPass( 88 createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions())); 89 pm.addPass(createConvertComplexToLLVMPass()); 90 pm.addPass( 91 createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions())); 92 pm.addPass(createConvertFuncToLLVMPass()); 93 pm.addPass(createArithToLLVMConversionPass()); 94 95 // Finalize GPU code generation. 96 if (gpuCodegen) { 97 GpuNVVMAttachTargetOptions nvvmTargetOptions; 98 nvvmTargetOptions.triple = options.gpuTriple; 99 nvvmTargetOptions.chip = options.gpuChip; 100 nvvmTargetOptions.features = options.gpuFeatures; 101 pm.addPass(createGpuNVVMAttachTarget(nvvmTargetOptions)); 102 pm.addPass(createGpuToLLVMConversionPass()); 103 GpuModuleToBinaryPassOptions gpuModuleToBinaryPassOptions; 104 gpuModuleToBinaryPassOptions.compilationTarget = options.gpuFormat; 105 pm.addPass(createGpuModuleToBinaryPass(gpuModuleToBinaryPassOptions)); 106 } 107 108 // Ensure all casts are realized. 109 pm.addPass(createReconcileUnrealizedCastsPass()); 110 } 111 112 //===----------------------------------------------------------------------===// 113 // Pipeline registration. 114 //===----------------------------------------------------------------------===// 115 116 void mlir::sparse_tensor::registerSparseTensorPipelines() { 117 PassPipelineRegistration<SparsifierOptions>( 118 "sparsifier", 119 "The standard pipeline for taking sparsity-agnostic IR using the" 120 " sparse-tensor type, and lowering it to LLVM IR with concrete" 121 " representations and algorithms for sparse tensors.", 122 buildSparsifier); 123 } 124