1 //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h" 10 11 #include "../PassDetail.h" 12 13 #include "mlir/Conversion/LLVMCommon/ConversionTarget.h" 14 #include "mlir/Conversion/LLVMCommon/TypeConverter.h" 15 #include "mlir/Dialect/AMX/AMXDialect.h" 16 #include "mlir/Dialect/AMX/Transforms.h" 17 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h" 18 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h" 19 #include "mlir/Dialect/ArmSVE/Transforms.h" 20 #include "mlir/Dialect/LLVMIR/LLVMDialect.h" 21 #include "mlir/Dialect/MemRef/IR/MemRef.h" 22 #include "mlir/Dialect/StandardOps/IR/Ops.h" 23 #include "mlir/Dialect/Vector/VectorOps.h" 24 #include "mlir/Dialect/X86Vector/Transforms.h" 25 #include "mlir/Dialect/X86Vector/X86VectorDialect.h" 26 #include "mlir/Transforms/GreedyPatternRewriteDriver.h" 27 28 using namespace mlir; 29 using namespace mlir::vector; 30 31 namespace { 32 struct LowerVectorToLLVMPass 33 : public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> { 34 LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) { 35 this->reassociateFPReductions = options.reassociateFPReductions; 36 this->enableIndexOptimizations = options.enableIndexOptimizations; 37 this->enableArmNeon = options.enableArmNeon; 38 this->enableArmSVE = options.enableArmSVE; 39 this->enableAMX = options.enableAMX; 40 this->enableX86Vector = options.enableX86Vector; 41 } 42 // Override explicitly to allow conditional dialect dependence. 43 void getDependentDialects(DialectRegistry ®istry) const override { 44 registry.insert<LLVM::LLVMDialect>(); 45 registry.insert<memref::MemRefDialect>(); 46 if (enableArmNeon) 47 registry.insert<arm_neon::ArmNeonDialect>(); 48 if (enableArmSVE) 49 registry.insert<arm_sve::ArmSVEDialect>(); 50 if (enableAMX) 51 registry.insert<amx::AMXDialect>(); 52 if (enableX86Vector) 53 registry.insert<x86vector::X86VectorDialect>(); 54 } 55 void runOnOperation() override; 56 }; 57 } // namespace 58 59 void LowerVectorToLLVMPass::runOnOperation() { 60 // Perform progressive lowering of operations on slices and 61 // all contraction operations. Also applies folding and DCE. 62 { 63 RewritePatternSet patterns(&getContext()); 64 populateVectorToVectorCanonicalizationPatterns(patterns); 65 populateVectorContractLoweringPatterns(patterns); 66 populateVectorTransposeLoweringPatterns(patterns); 67 // Vector transfer ops with rank > 1 should be lowered with VectorToSCF. 68 populateVectorTransferLoweringPatterns(patterns, /*maxTransferRank=*/1); 69 (void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns)); 70 } 71 72 // Convert to the LLVM IR dialect. 73 LLVMTypeConverter converter(&getContext()); 74 RewritePatternSet patterns(&getContext()); 75 populateVectorMaskMaterializationPatterns(patterns, enableIndexOptimizations); 76 populateVectorTransferLoweringPatterns(patterns); 77 populateVectorToLLVMMatrixConversionPatterns(converter, patterns); 78 populateVectorToLLVMConversionPatterns(converter, patterns, 79 reassociateFPReductions); 80 populateVectorToLLVMMatrixConversionPatterns(converter, patterns); 81 82 // Architecture specific augmentations. 83 LLVMConversionTarget target(getContext()); 84 target.addLegalDialect<memref::MemRefDialect>(); 85 target.addLegalDialect<StandardOpsDialect>(); 86 target.addLegalOp<UnrealizedConversionCastOp>(); 87 if (enableArmNeon) { 88 // TODO: we may or may not want to include in-dialect lowering to 89 // LLVM-compatible operations here. So far, all operations in the dialect 90 // can be translated to LLVM IR so there is no conversion necessary. 91 target.addLegalDialect<arm_neon::ArmNeonDialect>(); 92 } 93 if (enableArmSVE) { 94 configureArmSVELegalizeForExportTarget(target); 95 populateArmSVELegalizeForLLVMExportPatterns(converter, patterns); 96 } 97 if (enableAMX) { 98 configureAMXLegalizeForExportTarget(target); 99 populateAMXLegalizeForLLVMExportPatterns(converter, patterns); 100 } 101 if (enableX86Vector) { 102 configureX86VectorLegalizeForExportTarget(target); 103 populateX86VectorLegalizeForLLVMExportPatterns(converter, patterns); 104 } 105 106 if (failed( 107 applyPartialConversion(getOperation(), target, std::move(patterns)))) 108 signalPassFailure(); 109 } 110 111 std::unique_ptr<OperationPass<ModuleOp>> 112 mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) { 113 return std::make_unique<LowerVectorToLLVMPass>(options); 114 } 115