1 //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h" 10 11 #include "../PassDetail.h" 12 13 #include "mlir/Conversion/ArmSVEToLLVM/ArmSVEToLLVM.h" 14 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h" 15 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h" 16 #include "mlir/Dialect/AMX/AMXDialect.h" 17 #include "mlir/Dialect/AMX/Transforms.h" 18 #include "mlir/Dialect/AVX512/AVX512Dialect.h" 19 #include "mlir/Dialect/AVX512/Transforms.h" 20 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h" 21 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h" 22 #include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h" 23 #include "mlir/Dialect/LLVMIR/LLVMDialect.h" 24 #include "mlir/Dialect/MemRef/IR/MemRef.h" 25 #include "mlir/Dialect/StandardOps/IR/Ops.h" 26 #include "mlir/Dialect/Vector/VectorOps.h" 27 #include "mlir/Transforms/GreedyPatternRewriteDriver.h" 28 29 using namespace mlir; 30 using namespace mlir::vector; 31 32 namespace { 33 struct LowerVectorToLLVMPass 34 : public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> { 35 LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) { 36 this->reassociateFPReductions = options.reassociateFPReductions; 37 this->enableIndexOptimizations = options.enableIndexOptimizations; 38 this->enableArmNeon = options.enableArmNeon; 39 this->enableArmSVE = options.enableArmSVE; 40 this->enableAMX = options.enableAMX; 41 this->enableAVX512 = options.enableAVX512; 42 } 43 // Override explicitly to allow conditional dialect dependence. 44 void getDependentDialects(DialectRegistry ®istry) const override { 45 registry.insert<LLVM::LLVMDialect>(); 46 registry.insert<memref::MemRefDialect>(); 47 if (enableArmNeon) 48 registry.insert<arm_neon::ArmNeonDialect>(); 49 if (enableArmSVE) 50 registry.insert<LLVM::LLVMArmSVEDialect>(); 51 if (enableAMX) 52 registry.insert<amx::AMXDialect>(); 53 if (enableAVX512) 54 registry.insert<avx512::AVX512Dialect>(); 55 } 56 void runOnOperation() override; 57 }; 58 } // namespace 59 60 void LowerVectorToLLVMPass::runOnOperation() { 61 // Perform progressive lowering of operations on slices and 62 // all contraction operations. Also applies folding and DCE. 63 { 64 OwningRewritePatternList patterns(&getContext()); 65 populateVectorToVectorCanonicalizationPatterns(patterns); 66 populateVectorSlicesLoweringPatterns(patterns); 67 populateVectorContractLoweringPatterns(patterns); 68 (void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns)); 69 } 70 71 // Convert to the LLVM IR dialect. 72 LLVMTypeConverter converter(&getContext()); 73 OwningRewritePatternList patterns(&getContext()); 74 populateVectorToLLVMMatrixConversionPatterns(converter, patterns); 75 populateVectorToLLVMConversionPatterns( 76 converter, patterns, reassociateFPReductions, enableIndexOptimizations); 77 populateVectorToLLVMMatrixConversionPatterns(converter, patterns); 78 79 // Architecture specific augmentations. 80 LLVMConversionTarget target(getContext()); 81 target.addLegalOp<LLVM::DialectCastOp>(); 82 target.addLegalDialect<memref::MemRefDialect>(); 83 target.addLegalDialect<StandardOpsDialect>(); 84 target.addLegalOp<UnrealizedConversionCastOp>(); 85 if (enableArmNeon) { 86 // TODO: we may or may not want to include in-dialect lowering to 87 // LLVM-compatible operations here. So far, all operations in the dialect 88 // can be translated to LLVM IR so there is no conversion necessary. 89 target.addLegalDialect<arm_neon::ArmNeonDialect>(); 90 } 91 if (enableArmSVE) { 92 target.addLegalDialect<LLVM::LLVMArmSVEDialect>(); 93 target.addIllegalDialect<arm_sve::ArmSVEDialect>(); 94 auto hasScalableVectorType = [](TypeRange types) { 95 for (Type type : types) 96 if (type.isa<arm_sve::ScalableVectorType>()) 97 return true; 98 return false; 99 }; 100 // Remove any ArmSVE-specific types from function signatures and results. 101 populateFuncOpTypeConversionPattern(patterns, converter); 102 target.addDynamicallyLegalOp<FuncOp>([hasScalableVectorType](FuncOp op) { 103 return !hasScalableVectorType(op.getType().getInputs()) && 104 !hasScalableVectorType(op.getType().getResults()); 105 }); 106 target.addDynamicallyLegalOp<CallOp, CallIndirectOp, ReturnOp>( 107 [hasScalableVectorType](Operation *op) { 108 return !hasScalableVectorType(op->getOperandTypes()) && 109 !hasScalableVectorType(op->getResultTypes()); 110 }); 111 populateArmSVEToLLVMConversionPatterns(converter, patterns); 112 } 113 if (enableAMX) { 114 configureAMXLegalizeForExportTarget(target); 115 populateAMXLegalizeForLLVMExportPatterns(converter, patterns); 116 } 117 if (enableAVX512) { 118 configureAVX512LegalizeForExportTarget(target); 119 populateAVX512LegalizeForLLVMExportPatterns(converter, patterns); 120 } 121 122 if (failed( 123 applyPartialConversion(getOperation(), target, std::move(patterns)))) 124 signalPassFailure(); 125 } 126 127 std::unique_ptr<OperationPass<ModuleOp>> 128 mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) { 129 return std::make_unique<LowerVectorToLLVMPass>(options); 130 } 131