1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the X86 Disassembler Emitter. 10 // It contains the implementation of the disassembler tables. 11 // Documentation for the disassembler emitter in general can be found in 12 // X86DisassemblerEmitter.h. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "X86DisassemblerTables.h" 17 #include "X86DisassemblerShared.h" 18 #include "X86ModRMFilters.h" 19 #include "llvm/ADT/SmallVector.h" 20 #include "llvm/Support/ErrorHandling.h" 21 #include "llvm/Support/Format.h" 22 #include "llvm/Support/raw_ostream.h" 23 #include <map> 24 25 using namespace llvm; 26 using namespace X86Disassembler; 27 28 /// stringForContext - Returns a string containing the name of a particular 29 /// InstructionContext, usually for diagnostic purposes. 30 /// 31 /// @param insnContext - The instruction class to transform to a string. 32 /// @return - A statically-allocated string constant that contains the 33 /// name of the instruction class. 34 static inline const char *stringForContext(InstructionContext insnContext) { 35 switch (insnContext) { 36 default: 37 llvm_unreachable("Unhandled instruction class"); 38 #define ENUM_ENTRY(n, r, d) \ 39 case n: \ 40 return #n; \ 41 break; 42 #define ENUM_ENTRY_K_B(n, r, d) \ 43 ENUM_ENTRY(n, r, d) \ 44 ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) \ 45 ENUM_ENTRY(n##_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) 46 INSTRUCTION_CONTEXTS 47 #undef ENUM_ENTRY 48 #undef ENUM_ENTRY_K_B 49 } 50 } 51 52 /// stringForOperandType - Like stringForContext, but for OperandTypes. 53 static inline const char *stringForOperandType(OperandType type) { 54 switch (type) { 55 default: 56 llvm_unreachable("Unhandled type"); 57 #define ENUM_ENTRY(i, d) \ 58 case i: \ 59 return #i; 60 TYPES 61 #undef ENUM_ENTRY 62 } 63 } 64 65 /// stringForOperandEncoding - like stringForContext, but for 66 /// OperandEncodings. 67 static inline const char *stringForOperandEncoding(OperandEncoding encoding) { 68 switch (encoding) { 69 default: 70 llvm_unreachable("Unhandled encoding"); 71 #define ENUM_ENTRY(i, d) \ 72 case i: \ 73 return #i; 74 ENCODINGS 75 #undef ENUM_ENTRY 76 } 77 } 78 79 /// inheritsFrom - Indicates whether all instructions in one class also belong 80 /// to another class. 81 /// 82 /// @param child - The class that may be the subset 83 /// @param parent - The class that may be the superset 84 /// @return - True if child is a subset of parent, false otherwise. 85 static inline bool inheritsFrom(InstructionContext child, 86 InstructionContext parent, bool noPrefix = true, 87 bool VEX_LIG = false, bool WIG = false, 88 bool AdSize64 = false) { 89 if (child == parent) 90 return true; 91 92 switch (parent) { 93 case IC: 94 return (inheritsFrom(child, IC_64BIT, AdSize64) || 95 (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) || 96 inheritsFrom(child, IC_ADSIZE) || 97 (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) || 98 (noPrefix && inheritsFrom(child, IC_XS, noPrefix))); 99 case IC_64BIT: 100 return (inheritsFrom(child, IC_64BIT_REXW) || 101 (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) || 102 (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) || 103 (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) || 104 (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix))); 105 case IC_OPSIZE: 106 return inheritsFrom(child, IC_64BIT_OPSIZE) || 107 inheritsFrom(child, IC_OPSIZE_ADSIZE); 108 case IC_ADSIZE: 109 return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix)); 110 case IC_OPSIZE_ADSIZE: 111 return false; 112 case IC_64BIT_ADSIZE: 113 return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix)); 114 case IC_64BIT_OPSIZE_ADSIZE: 115 return false; 116 case IC_XD: 117 return inheritsFrom(child, IC_64BIT_XD); 118 case IC_XS: 119 return inheritsFrom(child, IC_64BIT_XS); 120 case IC_XD_OPSIZE: 121 return inheritsFrom(child, IC_64BIT_XD_OPSIZE); 122 case IC_XS_OPSIZE: 123 return inheritsFrom(child, IC_64BIT_XS_OPSIZE); 124 case IC_XD_ADSIZE: 125 return inheritsFrom(child, IC_64BIT_XD_ADSIZE); 126 case IC_XS_ADSIZE: 127 return inheritsFrom(child, IC_64BIT_XS_ADSIZE); 128 case IC_64BIT_REXW: 129 return ((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) || 130 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) || 131 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) || 132 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE))); 133 case IC_64BIT_OPSIZE: 134 return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) || 135 (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) || 136 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)); 137 case IC_64BIT_XD: 138 return (inheritsFrom(child, IC_64BIT_REXW_XD) || 139 (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE))); 140 case IC_64BIT_XS: 141 return (inheritsFrom(child, IC_64BIT_REXW_XS) || 142 (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE))); 143 case IC_64BIT_XD_OPSIZE: 144 case IC_64BIT_XS_OPSIZE: 145 return false; 146 case IC_64BIT_XD_ADSIZE: 147 case IC_64BIT_XS_ADSIZE: 148 return false; 149 case IC_64BIT_REXW_XD: 150 case IC_64BIT_REXW_XS: 151 case IC_64BIT_REXW_OPSIZE: 152 case IC_64BIT_REXW_ADSIZE: 153 case IC_64BIT_REX2: 154 return false; 155 case IC_VEX: 156 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W)) || 157 (WIG && inheritsFrom(child, IC_VEX_W)) || 158 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); 159 case IC_VEX_XS: 160 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || 161 (WIG && inheritsFrom(child, IC_VEX_W_XS)) || 162 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); 163 case IC_VEX_XD: 164 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || 165 (WIG && inheritsFrom(child, IC_VEX_W_XD)) || 166 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); 167 case IC_VEX_OPSIZE: 168 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || 169 (WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) || 170 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); 171 case IC_VEX_W: 172 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); 173 case IC_VEX_W_XS: 174 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS); 175 case IC_VEX_W_XD: 176 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD); 177 case IC_VEX_W_OPSIZE: 178 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 179 case IC_VEX_L: 180 return WIG && inheritsFrom(child, IC_VEX_L_W); 181 case IC_VEX_L_XS: 182 return WIG && inheritsFrom(child, IC_VEX_L_W_XS); 183 case IC_VEX_L_XD: 184 return WIG && inheritsFrom(child, IC_VEX_L_W_XD); 185 case IC_VEX_L_OPSIZE: 186 return WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE); 187 case IC_VEX_L_W: 188 case IC_VEX_L_W_XS: 189 case IC_VEX_L_W_XD: 190 case IC_VEX_L_W_OPSIZE: 191 return false; 192 case IC_EVEX: 193 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W)) || 194 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W)) || 195 (WIG && inheritsFrom(child, IC_EVEX_W)) || 196 (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) || 197 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2)); 198 case IC_EVEX_XS: 199 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 200 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) || 201 (WIG && inheritsFrom(child, IC_EVEX_W_XS)) || 202 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) || 203 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS)); 204 case IC_EVEX_XD: 205 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 206 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) || 207 (WIG && inheritsFrom(child, IC_EVEX_W_XD)) || 208 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) || 209 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD)); 210 case IC_EVEX_OPSIZE: 211 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 212 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) || 213 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) || 214 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) || 215 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE)); 216 case IC_EVEX_OPSIZE_ADSIZE: 217 case IC_EVEX_XS_ADSIZE: 218 case IC_EVEX_XD_ADSIZE: 219 return false; 220 case IC_EVEX_K: 221 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 222 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) || 223 (WIG && inheritsFrom(child, IC_EVEX_W_K)) || 224 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) || 225 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K)); 226 case IC_EVEX_XS_K: 227 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 228 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) || 229 (WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) || 230 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) || 231 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K)); 232 case IC_EVEX_XD_K: 233 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 234 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) || 235 (WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) || 236 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) || 237 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K)); 238 case IC_EVEX_OPSIZE_K: 239 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 240 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) || 241 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) || 242 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) || 243 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K)); 244 case IC_EVEX_KZ: 245 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 246 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) || 247 (WIG && inheritsFrom(child, IC_EVEX_W_KZ)) || 248 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) || 249 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ)); 250 case IC_EVEX_XS_KZ: 251 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 252 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) || 253 (WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) || 254 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) || 255 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ)); 256 case IC_EVEX_XD_KZ: 257 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 258 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) || 259 (WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) || 260 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) || 261 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ)); 262 case IC_EVEX_OPSIZE_KZ: 263 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 264 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) || 265 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) || 266 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) || 267 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ)); 268 case IC_EVEX_W: 269 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) || 270 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W)); 271 case IC_EVEX_W_XS: 272 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || 273 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS)); 274 case IC_EVEX_W_XD: 275 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) || 276 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD)); 277 case IC_EVEX_W_OPSIZE: 278 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) || 279 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)); 280 case IC_EVEX_W_K: 281 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) || 282 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K)); 283 case IC_EVEX_W_XS_K: 284 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) || 285 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)); 286 case IC_EVEX_W_XD_K: 287 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) || 288 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)); 289 case IC_EVEX_W_OPSIZE_K: 290 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) || 291 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)); 292 case IC_EVEX_W_KZ: 293 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) || 294 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)); 295 case IC_EVEX_W_XS_KZ: 296 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) || 297 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)); 298 case IC_EVEX_W_XD_KZ: 299 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) || 300 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)); 301 case IC_EVEX_W_OPSIZE_KZ: 302 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) || 303 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)); 304 case IC_EVEX_L: 305 return WIG && inheritsFrom(child, IC_EVEX_L_W); 306 case IC_EVEX_L_XS: 307 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS); 308 case IC_EVEX_L_XD: 309 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD); 310 case IC_EVEX_L_OPSIZE: 311 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE); 312 case IC_EVEX_L_K: 313 return WIG && inheritsFrom(child, IC_EVEX_L_W_K); 314 case IC_EVEX_L_XS_K: 315 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K); 316 case IC_EVEX_L_XD_K: 317 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K); 318 case IC_EVEX_L_OPSIZE_K: 319 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K); 320 case IC_EVEX_L_KZ: 321 return WIG && inheritsFrom(child, IC_EVEX_L_W_KZ); 322 case IC_EVEX_L_XS_KZ: 323 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ); 324 case IC_EVEX_L_XD_KZ: 325 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ); 326 case IC_EVEX_L_OPSIZE_KZ: 327 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ); 328 case IC_EVEX_L_W: 329 case IC_EVEX_L_W_XS: 330 case IC_EVEX_L_W_XD: 331 case IC_EVEX_L_W_OPSIZE: 332 return false; 333 case IC_EVEX_L_W_K: 334 case IC_EVEX_L_W_XS_K: 335 case IC_EVEX_L_W_XD_K: 336 case IC_EVEX_L_W_OPSIZE_K: 337 return false; 338 case IC_EVEX_L_W_KZ: 339 case IC_EVEX_L_W_XS_KZ: 340 case IC_EVEX_L_W_XD_KZ: 341 case IC_EVEX_L_W_OPSIZE_KZ: 342 return false; 343 case IC_EVEX_L2: 344 return WIG && inheritsFrom(child, IC_EVEX_L2_W); 345 case IC_EVEX_L2_XS: 346 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS); 347 case IC_EVEX_L2_XD: 348 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD); 349 case IC_EVEX_L2_OPSIZE: 350 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE); 351 case IC_EVEX_L2_K: 352 return WIG && inheritsFrom(child, IC_EVEX_L2_W_K); 353 case IC_EVEX_L2_XS_K: 354 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K); 355 case IC_EVEX_L2_XD_K: 356 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K); 357 case IC_EVEX_L2_OPSIZE_K: 358 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K); 359 case IC_EVEX_L2_KZ: 360 return WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ); 361 case IC_EVEX_L2_XS_KZ: 362 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ); 363 case IC_EVEX_L2_XD_KZ: 364 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ); 365 case IC_EVEX_L2_OPSIZE_KZ: 366 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ); 367 case IC_EVEX_L2_W: 368 case IC_EVEX_L2_W_XS: 369 case IC_EVEX_L2_W_XD: 370 case IC_EVEX_L2_W_OPSIZE: 371 return false; 372 case IC_EVEX_L2_W_K: 373 case IC_EVEX_L2_W_XS_K: 374 case IC_EVEX_L2_W_XD_K: 375 case IC_EVEX_L2_W_OPSIZE_K: 376 return false; 377 case IC_EVEX_L2_W_KZ: 378 case IC_EVEX_L2_W_XS_KZ: 379 case IC_EVEX_L2_W_XD_KZ: 380 case IC_EVEX_L2_W_OPSIZE_KZ: 381 return false; 382 case IC_EVEX_B: 383 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 384 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) || 385 (WIG && inheritsFrom(child, IC_EVEX_W_B)) || 386 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) || 387 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B)); 388 case IC_EVEX_XS_B: 389 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 390 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) || 391 (WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) || 392 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) || 393 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B)); 394 case IC_EVEX_XD_B: 395 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 396 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) || 397 (WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) || 398 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) || 399 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B)); 400 case IC_EVEX_OPSIZE_B: 401 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 402 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) || 403 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) || 404 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) || 405 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B)); 406 case IC_EVEX_K_B: 407 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 408 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) || 409 (WIG && inheritsFrom(child, IC_EVEX_W_K_B)) || 410 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) || 411 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B)); 412 case IC_EVEX_XS_K_B: 413 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 414 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) || 415 (WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) || 416 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) || 417 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B)); 418 case IC_EVEX_XD_K_B: 419 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 420 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) || 421 (WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) || 422 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) || 423 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B)); 424 case IC_EVEX_OPSIZE_K_B: 425 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 426 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) || 427 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) || 428 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) || 429 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B)); 430 case IC_EVEX_KZ_B: 431 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 432 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) || 433 (WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) || 434 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) || 435 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B)); 436 case IC_EVEX_XS_KZ_B: 437 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 438 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) || 439 (WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) || 440 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) || 441 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B)); 442 case IC_EVEX_XD_KZ_B: 443 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 444 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) || 445 (WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) || 446 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) || 447 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B)); 448 case IC_EVEX_OPSIZE_KZ_B: 449 return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 450 (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) || 451 (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) || 452 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) || 453 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B)); 454 case IC_EVEX_W_B: 455 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) || 456 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B)); 457 case IC_EVEX_W_XS_B: 458 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || 459 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)); 460 case IC_EVEX_W_XD_B: 461 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) || 462 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)); 463 case IC_EVEX_W_OPSIZE_B: 464 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) || 465 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)); 466 case IC_EVEX_W_K_B: 467 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) || 468 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)); 469 case IC_EVEX_W_XS_K_B: 470 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) || 471 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)); 472 case IC_EVEX_W_XD_K_B: 473 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) || 474 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)); 475 case IC_EVEX_W_OPSIZE_K_B: 476 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) || 477 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)); 478 case IC_EVEX_W_KZ_B: 479 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) || 480 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)); 481 case IC_EVEX_W_XS_KZ_B: 482 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) || 483 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)); 484 case IC_EVEX_W_XD_KZ_B: 485 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) || 486 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)); 487 case IC_EVEX_W_OPSIZE_KZ_B: 488 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) || 489 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)); 490 case IC_EVEX_L_B: 491 return WIG && inheritsFrom(child, IC_EVEX_L_W_B); 492 case IC_EVEX_L_XS_B: 493 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B); 494 case IC_EVEX_L_XD_B: 495 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B); 496 case IC_EVEX_L_OPSIZE_B: 497 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B); 498 case IC_EVEX_L_K_B: 499 return WIG && inheritsFrom(child, IC_EVEX_L_W_K_B); 500 case IC_EVEX_L_XS_K_B: 501 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B); 502 case IC_EVEX_L_XD_K_B: 503 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B); 504 case IC_EVEX_L_OPSIZE_K_B: 505 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B); 506 case IC_EVEX_L_KZ_B: 507 return WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B); 508 case IC_EVEX_L_XS_KZ_B: 509 return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B); 510 case IC_EVEX_L_XD_KZ_B: 511 return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B); 512 case IC_EVEX_L_OPSIZE_KZ_B: 513 return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B); 514 case IC_EVEX_L_W_B: 515 case IC_EVEX_L_W_XS_B: 516 case IC_EVEX_L_W_XD_B: 517 case IC_EVEX_L_W_OPSIZE_B: 518 return false; 519 case IC_EVEX_L_W_K_B: 520 case IC_EVEX_L_W_XS_K_B: 521 case IC_EVEX_L_W_XD_K_B: 522 case IC_EVEX_L_W_OPSIZE_K_B: 523 return false; 524 case IC_EVEX_L_W_KZ_B: 525 case IC_EVEX_L_W_XS_KZ_B: 526 case IC_EVEX_L_W_XD_KZ_B: 527 case IC_EVEX_L_W_OPSIZE_KZ_B: 528 return false; 529 case IC_EVEX_L2_B: 530 return WIG && inheritsFrom(child, IC_EVEX_L2_W_B); 531 case IC_EVEX_L2_XS_B: 532 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B); 533 case IC_EVEX_L2_XD_B: 534 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B); 535 case IC_EVEX_L2_OPSIZE_B: 536 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B); 537 case IC_EVEX_L2_K_B: 538 return WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B); 539 case IC_EVEX_L2_XS_K_B: 540 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B); 541 case IC_EVEX_L2_XD_K_B: 542 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B); 543 case IC_EVEX_L2_OPSIZE_K_B: 544 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B); 545 case IC_EVEX_L2_KZ_B: 546 return WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B); 547 case IC_EVEX_L2_XS_KZ_B: 548 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B); 549 case IC_EVEX_L2_XD_KZ_B: 550 return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B); 551 case IC_EVEX_L2_OPSIZE_KZ_B: 552 return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B); 553 case IC_EVEX_L2_W_B: 554 case IC_EVEX_L2_W_XS_B: 555 case IC_EVEX_L2_W_XD_B: 556 case IC_EVEX_L2_W_OPSIZE_B: 557 return false; 558 case IC_EVEX_L2_W_K_B: 559 case IC_EVEX_L2_W_XS_K_B: 560 case IC_EVEX_L2_W_XD_K_B: 561 case IC_EVEX_L2_W_OPSIZE_K_B: 562 return false; 563 case IC_EVEX_L2_W_KZ_B: 564 case IC_EVEX_L2_W_XS_KZ_B: 565 case IC_EVEX_L2_W_XD_KZ_B: 566 case IC_EVEX_L2_W_OPSIZE_KZ_B: 567 return false; 568 case IC_EVEX_NF: 569 case IC_EVEX_B_NF: 570 case IC_EVEX_OPSIZE_NF: 571 case IC_EVEX_OPSIZE_B_NF: 572 case IC_EVEX_W_NF: 573 case IC_EVEX_W_B_NF: 574 return false; 575 default: 576 errs() << "Unknown instruction class: " 577 << stringForContext((InstructionContext)parent) << "\n"; 578 llvm_unreachable("Unknown instruction class"); 579 } 580 } 581 582 /// outranks - Indicates whether, if an instruction has two different applicable 583 /// classes, which class should be preferred when performing decode. This 584 /// imposes a total ordering (ties are resolved toward "lower") 585 /// 586 /// @param upper - The class that may be preferable 587 /// @param lower - The class that may be less preferable 588 /// @return - True if upper is to be preferred, false otherwise. 589 static inline bool outranks(InstructionContext upper, 590 InstructionContext lower) { 591 assert(upper < IC_max); 592 assert(lower < IC_max); 593 594 #define ENUM_ENTRY(n, r, d) r, 595 #define ENUM_ENTRY_K_B(n, r, d) \ 596 ENUM_ENTRY(n, r, d) \ 597 ENUM_ENTRY(n##_K_B, r, d) \ 598 ENUM_ENTRY(n##_KZ_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) \ 599 ENUM_ENTRY(n##_B, r, d) 600 static int ranks[IC_max] = {INSTRUCTION_CONTEXTS}; 601 #undef ENUM_ENTRY 602 #undef ENUM_ENTRY_K_B 603 604 return (ranks[upper] > ranks[lower]); 605 } 606 607 /// getDecisionType - Determines whether a ModRM decision with 255 entries can 608 /// be compacted by eliminating redundant information. 609 /// 610 /// @param decision - The decision to be compacted. 611 /// @return - The compactest available representation for the decision. 612 static ModRMDecisionType getDecisionType(ModRMDecision &decision) { 613 bool satisfiesOneEntry = true; 614 bool satisfiesSplitRM = true; 615 bool satisfiesSplitReg = true; 616 bool satisfiesSplitMisc = true; 617 618 for (unsigned index = 0; index < 256; ++index) { 619 if (decision.instructionIDs[index] != decision.instructionIDs[0]) 620 satisfiesOneEntry = false; 621 622 if (((index & 0xc0) == 0xc0) && 623 (decision.instructionIDs[index] != decision.instructionIDs[0xc0])) 624 satisfiesSplitRM = false; 625 626 if (((index & 0xc0) != 0xc0) && 627 (decision.instructionIDs[index] != decision.instructionIDs[0x00])) 628 satisfiesSplitRM = false; 629 630 if (((index & 0xc0) == 0xc0) && (decision.instructionIDs[index] != 631 decision.instructionIDs[index & 0xf8])) 632 satisfiesSplitReg = false; 633 634 if (((index & 0xc0) != 0xc0) && (decision.instructionIDs[index] != 635 decision.instructionIDs[index & 0x38])) 636 satisfiesSplitMisc = false; 637 } 638 639 if (satisfiesOneEntry) 640 return MODRM_ONEENTRY; 641 642 if (satisfiesSplitRM) 643 return MODRM_SPLITRM; 644 645 if (satisfiesSplitReg && satisfiesSplitMisc) 646 return MODRM_SPLITREG; 647 648 if (satisfiesSplitMisc) 649 return MODRM_SPLITMISC; 650 651 return MODRM_FULL; 652 } 653 654 /// stringForDecisionType - Returns a statically-allocated string corresponding 655 /// to a particular decision type. 656 /// 657 /// @param dt - The decision type. 658 /// @return - A pointer to the statically-allocated string (e.g., 659 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY). 660 static const char *stringForDecisionType(ModRMDecisionType dt) { 661 #define ENUM_ENTRY(n) \ 662 case n: \ 663 return #n; 664 switch (dt) { 665 default: 666 llvm_unreachable("Unknown decision type"); 667 MODRMTYPES 668 }; 669 #undef ENUM_ENTRY 670 } 671 672 DisassemblerTables::DisassemblerTables() { 673 for (unsigned i = 0; i < std::size(Tables); i++) 674 Tables[i] = std::make_unique<ContextDecision>(); 675 676 HasConflicts = false; 677 } 678 679 DisassemblerTables::~DisassemblerTables() {} 680 681 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2, 682 unsigned &i1, unsigned &i2, 683 unsigned &ModRMTableNum, 684 ModRMDecision &decision) const { 685 static uint32_t sEntryNumber = 1; 686 ModRMDecisionType dt = getDecisionType(decision); 687 688 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) { 689 // Empty table. 690 o2 << "{" << stringForDecisionType(dt) << ", 0}"; 691 return; 692 } 693 694 std::vector<unsigned> ModRMDecision; 695 696 switch (dt) { 697 default: 698 llvm_unreachable("Unknown decision type"); 699 case MODRM_ONEENTRY: 700 ModRMDecision.push_back(decision.instructionIDs[0]); 701 break; 702 case MODRM_SPLITRM: 703 ModRMDecision.push_back(decision.instructionIDs[0x00]); 704 ModRMDecision.push_back(decision.instructionIDs[0xc0]); 705 break; 706 case MODRM_SPLITREG: 707 for (unsigned index = 0; index < 64; index += 8) 708 ModRMDecision.push_back(decision.instructionIDs[index]); 709 for (unsigned index = 0xc0; index < 256; index += 8) 710 ModRMDecision.push_back(decision.instructionIDs[index]); 711 break; 712 case MODRM_SPLITMISC: 713 for (unsigned index = 0; index < 64; index += 8) 714 ModRMDecision.push_back(decision.instructionIDs[index]); 715 for (unsigned index = 0xc0; index < 256; ++index) 716 ModRMDecision.push_back(decision.instructionIDs[index]); 717 break; 718 case MODRM_FULL: 719 for (unsigned short InstructionID : decision.instructionIDs) 720 ModRMDecision.push_back(InstructionID); 721 break; 722 } 723 724 unsigned &EntryNumber = ModRMTable[ModRMDecision]; 725 if (EntryNumber == 0) { 726 EntryNumber = ModRMTableNum; 727 728 ModRMTableNum += ModRMDecision.size(); 729 o1 << "/*Table" << EntryNumber << "*/\n"; 730 i1++; 731 for (unsigned I : ModRMDecision) { 732 o1.indent(i1 * 2) << format("0x%hx", I) << ", /*" 733 << InstructionSpecifiers[I].name << "*/\n"; 734 } 735 i1--; 736 } 737 738 o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}"; 739 740 switch (dt) { 741 default: 742 llvm_unreachable("Unknown decision type"); 743 case MODRM_ONEENTRY: 744 sEntryNumber += 1; 745 break; 746 case MODRM_SPLITRM: 747 sEntryNumber += 2; 748 break; 749 case MODRM_SPLITREG: 750 sEntryNumber += 16; 751 break; 752 case MODRM_SPLITMISC: 753 sEntryNumber += 8 + 64; 754 break; 755 case MODRM_FULL: 756 sEntryNumber += 256; 757 break; 758 } 759 760 // We assume that the index can fit into uint16_t. 761 assert(sEntryNumber < 65536U && 762 "Index into ModRMDecision is too large for uint16_t!"); 763 (void)sEntryNumber; 764 } 765 766 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2, 767 unsigned &i1, unsigned &i2, 768 unsigned &ModRMTableNum, 769 OpcodeDecision &opDecision) const { 770 o2 << "{"; 771 ++i2; 772 773 unsigned index; 774 for (index = 0; index < 256; ++index) { 775 auto &decision = opDecision.modRMDecisions[index]; 776 ModRMDecisionType dt = getDecisionType(decision); 777 if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)) 778 break; 779 } 780 if (index == 256) { 781 // If all 256 entries are MODRM_ONEENTRY, omit output. 782 static_assert(MODRM_ONEENTRY == 0); 783 --i2; 784 o2 << "},\n"; 785 } else { 786 o2 << " /* struct OpcodeDecision */ {\n"; 787 for (index = 0; index < 256; ++index) { 788 o2.indent(i2); 789 790 o2 << "/*0x" << format("%02hhx", index) << "*/"; 791 792 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum, 793 opDecision.modRMDecisions[index]); 794 795 if (index < 255) 796 o2 << ","; 797 798 o2 << "\n"; 799 } 800 o2.indent(i2) << "}\n"; 801 --i2; 802 o2.indent(i2) << "},\n"; 803 } 804 } 805 806 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2, 807 unsigned &i1, unsigned &i2, 808 unsigned &ModRMTableNum, 809 ContextDecision &decision, 810 const char *name) const { 811 o2.indent(i2) << "static const struct ContextDecision " << name 812 << " = {{/* opcodeDecisions */\n"; 813 i2++; 814 815 for (unsigned index = 0; index < IC_max; ++index) { 816 o2.indent(i2) << "/*"; 817 o2 << stringForContext((InstructionContext)index); 818 o2 << "*/ "; 819 820 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum, 821 decision.opcodeDecisions[index]); 822 } 823 824 i2--; 825 o2.indent(i2) << "}};" << "\n"; 826 } 827 828 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, 829 unsigned &i) const { 830 unsigned NumInstructions = InstructionSpecifiers.size(); 831 832 o << "static const struct OperandSpecifier x86OperandSets[][" 833 << X86_MAX_OPERANDS << "] = {\n"; 834 835 typedef SmallVector<std::pair<OperandEncoding, OperandType>, X86_MAX_OPERANDS> 836 OperandListTy; 837 std::map<OperandListTy, unsigned> OperandSets; 838 839 unsigned OperandSetNum = 0; 840 for (unsigned Index = 0; Index < NumInstructions; ++Index) { 841 OperandListTy OperandList; 842 843 for (auto Operand : InstructionSpecifiers[Index].operands) { 844 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 845 OperandType Type = (OperandType)Operand.type; 846 OperandList.push_back(std::make_pair(Encoding, Type)); 847 } 848 unsigned &N = OperandSets[OperandList]; 849 if (N != 0) 850 continue; 851 852 N = ++OperandSetNum; 853 854 o << " { /* " << (OperandSetNum - 1) << " */\n"; 855 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) { 856 const char *Encoding = stringForOperandEncoding(OperandList[i].first); 857 const char *Type = stringForOperandType(OperandList[i].second); 858 o << " { " << Encoding << ", " << Type << " },\n"; 859 } 860 o << " },\n"; 861 } 862 o << "};" << "\n\n"; 863 864 o.indent(i * 2) << "static const struct InstructionSpecifier "; 865 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n"; 866 867 i++; 868 869 for (unsigned index = 0; index < NumInstructions; ++index) { 870 o.indent(i * 2) << "{ /* " << index << " */\n"; 871 i++; 872 873 OperandListTy OperandList; 874 for (auto Operand : InstructionSpecifiers[index].operands) { 875 OperandEncoding Encoding = (OperandEncoding)Operand.encoding; 876 OperandType Type = (OperandType)Operand.type; 877 OperandList.push_back(std::make_pair(Encoding, Type)); 878 } 879 o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n"; 880 881 o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n"; 882 883 i--; 884 o.indent(i * 2) << "},\n"; 885 } 886 887 i--; 888 o.indent(i * 2) << "};" << "\n"; 889 } 890 891 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { 892 o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR "[" << ATTR_max 893 << "] = {\n"; 894 i++; 895 896 for (unsigned index = 0; index < ATTR_max; ++index) { 897 o.indent(i * 2); 898 899 if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_OPSIZE)) 900 o << "IC_EVEX_OPSIZE_ADSIZE"; 901 else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XD)) 902 o << "IC_EVEX_XD_ADSIZE"; 903 else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XS)) 904 o << "IC_EVEX_XS_ADSIZE"; 905 else if (index & ATTR_EVEXNF) { 906 o << "IC_EVEX"; 907 if (index & ATTR_REXW) 908 o << "_W"; 909 else if (index & ATTR_OPSIZE) 910 o << "_OPSIZE"; 911 912 if (index & ATTR_EVEXB) 913 o << "_B"; 914 915 o << "_NF"; 916 } else if ((index & ATTR_EVEX) || (index & ATTR_VEX) || 917 (index & ATTR_VEXL)) { 918 if (index & ATTR_EVEX) 919 o << "IC_EVEX"; 920 else 921 o << "IC_VEX"; 922 923 if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) 924 o << "_L2"; 925 else if (index & ATTR_VEXL) 926 o << "_L"; 927 928 if (index & ATTR_REXW) 929 o << "_W"; 930 931 if (index & ATTR_OPSIZE) 932 o << "_OPSIZE"; 933 else if (index & ATTR_XD) 934 o << "_XD"; 935 else if (index & ATTR_XS) 936 o << "_XS"; 937 938 if (index & ATTR_EVEX) { 939 if (index & ATTR_EVEXKZ) 940 o << "_KZ"; 941 else if (index & ATTR_EVEXK) 942 o << "_K"; 943 944 if (index & ATTR_EVEXB) 945 o << "_B"; 946 } 947 } else if ((index & ATTR_64BIT) && (index & ATTR_REX2)) 948 o << "IC_64BIT_REX2"; 949 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS)) 950 o << "IC_64BIT_REXW_XS"; 951 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD)) 952 o << "IC_64BIT_REXW_XD"; 953 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 954 (index & ATTR_OPSIZE)) 955 o << "IC_64BIT_REXW_OPSIZE"; 956 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && 957 (index & ATTR_ADSIZE)) 958 o << "IC_64BIT_REXW_ADSIZE"; 959 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE)) 960 o << "IC_64BIT_XD_OPSIZE"; 961 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE)) 962 o << "IC_64BIT_XD_ADSIZE"; 963 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE)) 964 o << "IC_64BIT_XS_OPSIZE"; 965 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE)) 966 o << "IC_64BIT_XS_ADSIZE"; 967 else if ((index & ATTR_64BIT) && (index & ATTR_XS)) 968 o << "IC_64BIT_XS"; 969 else if ((index & ATTR_64BIT) && (index & ATTR_XD)) 970 o << "IC_64BIT_XD"; 971 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) && 972 (index & ATTR_ADSIZE)) 973 o << "IC_64BIT_OPSIZE_ADSIZE"; 974 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE)) 975 o << "IC_64BIT_OPSIZE"; 976 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE)) 977 o << "IC_64BIT_ADSIZE"; 978 else if ((index & ATTR_64BIT) && (index & ATTR_REXW)) 979 o << "IC_64BIT_REXW"; 980 else if ((index & ATTR_64BIT)) 981 o << "IC_64BIT"; 982 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE)) 983 o << "IC_XS_OPSIZE"; 984 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE)) 985 o << "IC_XD_OPSIZE"; 986 else if ((index & ATTR_XS) && (index & ATTR_ADSIZE)) 987 o << "IC_XS_ADSIZE"; 988 else if ((index & ATTR_XD) && (index & ATTR_ADSIZE)) 989 o << "IC_XD_ADSIZE"; 990 else if (index & ATTR_XS) 991 o << "IC_XS"; 992 else if (index & ATTR_XD) 993 o << "IC_XD"; 994 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) 995 o << "IC_OPSIZE_ADSIZE"; 996 else if (index & ATTR_OPSIZE) 997 o << "IC_OPSIZE"; 998 else if (index & ATTR_ADSIZE) 999 o << "IC_ADSIZE"; 1000 else 1001 o << "IC"; 1002 1003 o << ", // " << index << "\n"; 1004 } 1005 1006 i--; 1007 o.indent(i * 2) << "};" << "\n"; 1008 } 1009 1010 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2, 1011 unsigned &i1, unsigned &i2, 1012 unsigned &ModRMTableNum) const { 1013 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR); 1014 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR); 1015 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], 1016 THREEBYTE38_STR); 1017 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], 1018 THREEBYTE3A_STR); 1019 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR); 1020 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR); 1021 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR); 1022 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], 1023 THREEDNOW_MAP_STR); 1024 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP4_STR); 1025 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP5_STR); 1026 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[10], MAP6_STR); 1027 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[11], MAP7_STR); 1028 } 1029 1030 void DisassemblerTables::emit(raw_ostream &o) const { 1031 unsigned i1 = 0; 1032 unsigned i2 = 0; 1033 1034 std::string s1; 1035 std::string s2; 1036 1037 raw_string_ostream o1(s1); 1038 raw_string_ostream o2(s2); 1039 1040 emitInstructionInfo(o, i2); 1041 o << "\n"; 1042 1043 emitContextTable(o, i2); 1044 o << "\n"; 1045 1046 unsigned ModRMTableNum = 0; 1047 1048 o << "static const InstrUID modRMTable[] = {\n"; 1049 i1++; 1050 std::vector<unsigned> EmptyTable(1, 0); 1051 ModRMTable[EmptyTable] = ModRMTableNum; 1052 ModRMTableNum += EmptyTable.size(); 1053 o1 << "/*EmptyTable*/\n"; 1054 o1.indent(i1 * 2) << "0x0,\n"; 1055 i1--; 1056 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum); 1057 1058 o << o1.str(); 1059 o << " 0x0\n"; 1060 o << "};\n"; 1061 o << "\n"; 1062 o << o2.str(); 1063 o << "\n"; 1064 o << "\n"; 1065 } 1066 1067 void DisassemblerTables::setTableFields(ModRMDecision &decision, 1068 const ModRMFilter &filter, InstrUID uid, 1069 uint8_t opcode) { 1070 for (unsigned index = 0; index < 256; ++index) { 1071 if (filter.accepts(index)) { 1072 if (decision.instructionIDs[index] == uid) 1073 continue; 1074 1075 if (decision.instructionIDs[index] != 0) { 1076 InstructionSpecifier &newInfo = InstructionSpecifiers[uid]; 1077 InstructionSpecifier &previousInfo = 1078 InstructionSpecifiers[decision.instructionIDs[index]]; 1079 1080 if (previousInfo.name == "NOOP" && 1081 (newInfo.name == "XCHG16ar" || newInfo.name == "XCHG32ar" || 1082 newInfo.name == "XCHG64ar")) 1083 continue; // special case for XCHG*ar and NOOP 1084 1085 if (outranks(previousInfo.insnContext, newInfo.insnContext)) 1086 continue; 1087 1088 if (previousInfo.insnContext == newInfo.insnContext) { 1089 errs() << "Error: Primary decode conflict: "; 1090 errs() << newInfo.name << " would overwrite " << previousInfo.name; 1091 errs() << "\n"; 1092 errs() << "ModRM " << index << "\n"; 1093 errs() << "Opcode " << (uint16_t)opcode << "\n"; 1094 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n"; 1095 HasConflicts = true; 1096 } 1097 } 1098 1099 decision.instructionIDs[index] = uid; 1100 } 1101 } 1102 } 1103 1104 void DisassemblerTables::setTableFields( 1105 OpcodeType type, InstructionContext insnContext, uint8_t opcode, 1106 const ModRMFilter &filter, InstrUID uid, bool is32bit, bool noPrefix, 1107 bool ignoresVEX_L, bool ignoresW, unsigned addressSize) { 1108 ContextDecision &decision = *Tables[type]; 1109 1110 for (unsigned index = 0; index < IC_max; ++index) { 1111 if ((is32bit || addressSize == 16) && 1112 inheritsFrom((InstructionContext)index, IC_64BIT)) 1113 continue; 1114 1115 bool adSize64 = addressSize == 64; 1116 if (inheritsFrom((InstructionContext)index, 1117 InstructionSpecifiers[uid].insnContext, noPrefix, 1118 ignoresVEX_L, ignoresW, adSize64)) 1119 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode], 1120 filter, uid, opcode); 1121 } 1122 } 1123