1 //===---- llvm/unittest/CodeGen/SelectionDAGPatternMatchTest.cpp ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/OptimizationRemarkEmitter.h" 10 #include "llvm/AsmParser/Parser.h" 11 #include "llvm/CodeGen/MachineModuleInfo.h" 12 #include "llvm/CodeGen/SDPatternMatch.h" 13 #include "llvm/CodeGen/TargetLowering.h" 14 #include "llvm/IR/Module.h" 15 #include "llvm/MC/TargetRegistry.h" 16 #include "llvm/Support/SourceMgr.h" 17 #include "llvm/Support/TargetSelect.h" 18 #include "llvm/Target/TargetMachine.h" 19 #include "gtest/gtest.h" 20 21 using namespace llvm; 22 23 class SelectionDAGPatternMatchTest : public testing::Test { 24 protected: 25 static void SetUpTestCase() { 26 InitializeAllTargets(); 27 InitializeAllTargetMCs(); 28 } 29 30 void SetUp() override { 31 StringRef Assembly = "@g = global i32 0\n" 32 "@g_alias = alias i32, i32* @g\n" 33 "define i32 @f() {\n" 34 " %1 = load i32, i32* @g\n" 35 " ret i32 %1\n" 36 "}"; 37 38 Triple TargetTriple("riscv64--"); 39 std::string Error; 40 const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); 41 // FIXME: These tests do not depend on RISCV specifically, but we have to 42 // initialize a target. A skeleton Target for unittests would allow us to 43 // always run these tests. 44 if (!T) 45 GTEST_SKIP(); 46 47 TargetOptions Options; 48 TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>( 49 T->createTargetMachine("riscv64", "", "+m,+f,+d,+v", Options, 50 std::nullopt, std::nullopt, 51 CodeGenOptLevel::Aggressive))); 52 if (!TM) 53 GTEST_SKIP(); 54 55 SMDiagnostic SMError; 56 M = parseAssemblyString(Assembly, SMError, Context); 57 if (!M) 58 report_fatal_error(SMError.getMessage()); 59 M->setDataLayout(TM->createDataLayout()); 60 61 F = M->getFunction("f"); 62 if (!F) 63 report_fatal_error("F?"); 64 G = M->getGlobalVariable("g"); 65 if (!G) 66 report_fatal_error("G?"); 67 AliasedG = M->getNamedAlias("g_alias"); 68 if (!AliasedG) 69 report_fatal_error("AliasedG?"); 70 71 MachineModuleInfo MMI(TM.get()); 72 73 MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 74 MMI.getContext(), 0); 75 76 DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None); 77 if (!DAG) 78 report_fatal_error("DAG?"); 79 OptimizationRemarkEmitter ORE(F); 80 DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr, MMI, 81 nullptr); 82 } 83 84 TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) { 85 return DAG->getTargetLoweringInfo().getTypeAction(Context, VT); 86 } 87 88 EVT getTypeToTransformTo(EVT VT) { 89 return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT); 90 } 91 92 LLVMContext Context; 93 std::unique_ptr<LLVMTargetMachine> TM; 94 std::unique_ptr<Module> M; 95 Function *F; 96 GlobalVariable *G; 97 GlobalAlias *AliasedG; 98 std::unique_ptr<MachineFunction> MF; 99 std::unique_ptr<SelectionDAG> DAG; 100 }; 101 102 TEST_F(SelectionDAGPatternMatchTest, matchValueType) { 103 SDLoc DL; 104 auto Int32VT = EVT::getIntegerVT(Context, 32); 105 auto Float32VT = EVT::getFloatingPointVT(32); 106 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 107 108 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 109 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT); 110 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 111 112 using namespace SDPatternMatch; 113 EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT))); 114 EVT BindVT; 115 EXPECT_TRUE(sd_match(Op1, m_VT(BindVT))); 116 EXPECT_EQ(BindVT, Float32VT); 117 EXPECT_TRUE(sd_match(Op0, m_IntegerVT())); 118 EXPECT_TRUE(sd_match(Op1, m_FloatingPointVT())); 119 EXPECT_TRUE(sd_match(Op2, m_VectorVT())); 120 EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT())); 121 } 122 123 TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) { 124 SDLoc DL; 125 auto Int32VT = EVT::getIntegerVT(Context, 32); 126 127 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 128 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 129 130 SDValue ICMP_UGT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGT); 131 SDValue ICMP_EQ01 = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETEQ); 132 SDValue ICMP_EQ10 = DAG->getSetCC(DL, MVT::i1, Op1, Op0, ISD::SETEQ); 133 134 auto Int1VT = EVT::getIntegerVT(Context, 1); 135 SDValue Cond = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int1VT); 136 SDValue T = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 4, Int1VT); 137 SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT); 138 SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F); 139 140 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 141 SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 6, VInt32VT); 142 SDValue V2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 7, VInt32VT); 143 SDValue VSelect = DAG->getNode(ISD::VSELECT, DL, VInt32VT, Cond, V1, V2); 144 145 using namespace SDPatternMatch; 146 ISD::CondCode CC; 147 EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), 148 m_SpecificCondCode(ISD::SETUGT)))); 149 EXPECT_TRUE( 150 sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_CondCode(CC)))); 151 EXPECT_TRUE(CC == ISD::SETUGT); 152 EXPECT_FALSE(sd_match( 153 ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_SpecificCondCode(ISD::SETLE)))); 154 155 EXPECT_TRUE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op0), m_Specific(Op1), 156 m_SpecificCondCode(ISD::SETEQ)))); 157 EXPECT_TRUE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op1), m_Specific(Op0), 158 m_SpecificCondCode(ISD::SETEQ)))); 159 EXPECT_FALSE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op1), m_Specific(Op0), 160 m_SpecificCondCode(ISD::SETEQ)))); 161 EXPECT_FALSE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op0), m_Specific(Op1), 162 m_SpecificCondCode(ISD::SETEQ)))); 163 EXPECT_TRUE(sd_match(ICMP_EQ01, m_c_SetCC(m_Specific(Op1), m_Specific(Op0), 164 m_SpecificCondCode(ISD::SETEQ)))); 165 EXPECT_TRUE(sd_match(ICMP_EQ10, m_c_SetCC(m_Specific(Op0), m_Specific(Op1), 166 m_SpecificCondCode(ISD::SETEQ)))); 167 168 EXPECT_TRUE(sd_match( 169 Select, m_Select(m_Specific(Cond), m_Specific(T), m_Specific(F)))); 170 EXPECT_FALSE(sd_match( 171 Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T)))); 172 EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1), 173 m_SpecificCondCode(ISD::SETEQ)))); 174 EXPECT_TRUE(sd_match( 175 VSelect, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2)))); 176 EXPECT_FALSE(sd_match( 177 Select, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2)))); 178 } 179 180 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) { 181 SDLoc DL; 182 auto Int32VT = EVT::getIntegerVT(Context, 32); 183 auto Float32VT = EVT::getFloatingPointVT(32); 184 185 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 186 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 187 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT); 188 SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 8, Int32VT); 189 190 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 191 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 192 SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub); 193 SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1); 194 SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0); 195 SDValue Or = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1); 196 SDNodeFlags DisFlags; 197 DisFlags.setDisjoint(true); 198 SDValue DisOr = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op3, DisFlags); 199 SDValue SMax = DAG->getNode(ISD::SMAX, DL, Int32VT, Op0, Op1); 200 SDValue SMin = DAG->getNode(ISD::SMIN, DL, Int32VT, Op1, Op0); 201 SDValue UMax = DAG->getNode(ISD::UMAX, DL, Int32VT, Op0, Op1); 202 SDValue UMin = DAG->getNode(ISD::UMIN, DL, Int32VT, Op1, Op0); 203 204 SDValue ICMP_GT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETGT); 205 SDValue ICMP_GE = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETGE); 206 SDValue ICMP_UGT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGT); 207 SDValue ICMP_UGE = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGE); 208 SDValue ICMP_LT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETLT); 209 SDValue ICMP_LE = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETLE); 210 SDValue ICMP_ULT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETULT); 211 SDValue ICMP_ULE = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETULE); 212 SDValue SMaxLikeGT = DAG->getSelect(DL, MVT::i32, ICMP_GT, Op0, Op1); 213 SDValue SMaxLikeGE = DAG->getSelect(DL, MVT::i32, ICMP_GE, Op0, Op1); 214 SDValue UMaxLikeUGT = DAG->getSelect(DL, MVT::i32, ICMP_UGT, Op0, Op1); 215 SDValue UMaxLikeUGE = DAG->getSelect(DL, MVT::i32, ICMP_UGE, Op0, Op1); 216 SDValue SMinLikeLT = DAG->getSelect(DL, MVT::i32, ICMP_LT, Op0, Op1); 217 SDValue SMinLikeLE = DAG->getSelect(DL, MVT::i32, ICMP_LE, Op0, Op1); 218 SDValue UMinLikeULT = DAG->getSelect(DL, MVT::i32, ICMP_ULT, Op0, Op1); 219 SDValue UMinLikeULE = DAG->getSelect(DL, MVT::i32, ICMP_ULE, Op0, Op1); 220 221 SDValue SFAdd = DAG->getNode(ISD::STRICT_FADD, DL, {Float32VT, MVT::Other}, 222 {DAG->getEntryNode(), Op2, Op2}); 223 224 using namespace SDPatternMatch; 225 EXPECT_TRUE(sd_match(Sub, m_BinOp(ISD::SUB, m_Value(), m_Value()))); 226 EXPECT_TRUE(sd_match(Sub, m_Sub(m_Value(), m_Value()))); 227 EXPECT_TRUE(sd_match(Add, m_c_BinOp(ISD::ADD, m_Value(), m_Value()))); 228 EXPECT_TRUE(sd_match(Add, m_Add(m_Value(), m_Value()))); 229 EXPECT_TRUE(sd_match(Add, m_AddLike(m_Value(), m_Value()))); 230 EXPECT_TRUE(sd_match( 231 Mul, m_Mul(m_OneUse(m_Opc(ISD::SUB)), m_NUses<2>(m_Specific(Add))))); 232 EXPECT_TRUE( 233 sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_SpecificVT(Float32VT), 234 m_SpecificVT(Float32VT)))); 235 236 EXPECT_TRUE(sd_match(And, m_c_BinOp(ISD::AND, m_Value(), m_Value()))); 237 EXPECT_TRUE(sd_match(And, m_And(m_Value(), m_Value()))); 238 EXPECT_TRUE(sd_match(Xor, m_c_BinOp(ISD::XOR, m_Value(), m_Value()))); 239 EXPECT_TRUE(sd_match(Xor, m_Xor(m_Value(), m_Value()))); 240 EXPECT_TRUE(sd_match(Or, m_c_BinOp(ISD::OR, m_Value(), m_Value()))); 241 EXPECT_TRUE(sd_match(Or, m_Or(m_Value(), m_Value()))); 242 EXPECT_FALSE(sd_match(Or, m_DisjointOr(m_Value(), m_Value()))); 243 244 EXPECT_TRUE(sd_match(DisOr, m_Or(m_Value(), m_Value()))); 245 EXPECT_TRUE(sd_match(DisOr, m_DisjointOr(m_Value(), m_Value()))); 246 EXPECT_FALSE(sd_match(DisOr, m_Add(m_Value(), m_Value()))); 247 EXPECT_TRUE(sd_match(DisOr, m_AddLike(m_Value(), m_Value()))); 248 249 EXPECT_TRUE(sd_match(SMax, m_c_BinOp(ISD::SMAX, m_Value(), m_Value()))); 250 EXPECT_TRUE(sd_match(SMax, m_SMax(m_Value(), m_Value()))); 251 EXPECT_TRUE(sd_match(SMax, m_SMaxLike(m_Value(), m_Value()))); 252 EXPECT_TRUE(sd_match(SMaxLikeGT, m_SMaxLike(m_Value(), m_Value()))); 253 EXPECT_TRUE(sd_match(SMaxLikeGE, m_SMaxLike(m_Value(), m_Value()))); 254 EXPECT_TRUE(sd_match(SMin, m_c_BinOp(ISD::SMIN, m_Value(), m_Value()))); 255 EXPECT_TRUE(sd_match(SMin, m_SMin(m_Value(), m_Value()))); 256 EXPECT_TRUE(sd_match(SMin, m_SMinLike(m_Value(), m_Value()))); 257 EXPECT_TRUE(sd_match(SMinLikeLT, m_SMinLike(m_Value(), m_Value()))); 258 EXPECT_TRUE(sd_match(SMinLikeLE, m_SMinLike(m_Value(), m_Value()))); 259 EXPECT_TRUE(sd_match(UMax, m_c_BinOp(ISD::UMAX, m_Value(), m_Value()))); 260 EXPECT_TRUE(sd_match(UMax, m_UMax(m_Value(), m_Value()))); 261 EXPECT_TRUE(sd_match(UMax, m_UMaxLike(m_Value(), m_Value()))); 262 EXPECT_TRUE(sd_match(UMaxLikeUGT, m_UMaxLike(m_Value(), m_Value()))); 263 EXPECT_TRUE(sd_match(UMaxLikeUGE, m_UMaxLike(m_Value(), m_Value()))); 264 EXPECT_TRUE(sd_match(UMin, m_c_BinOp(ISD::UMIN, m_Value(), m_Value()))); 265 EXPECT_TRUE(sd_match(UMin, m_UMin(m_Value(), m_Value()))); 266 EXPECT_TRUE(sd_match(UMin, m_UMinLike(m_Value(), m_Value()))); 267 EXPECT_TRUE(sd_match(UMinLikeULT, m_UMinLike(m_Value(), m_Value()))); 268 EXPECT_TRUE(sd_match(UMinLikeULE, m_UMinLike(m_Value(), m_Value()))); 269 270 SDValue BindVal; 271 EXPECT_TRUE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_Value(BindVal), 272 m_Deferred(BindVal)))); 273 EXPECT_FALSE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_OtherVT(), 274 m_SpecificVT(Float32VT)))); 275 } 276 277 TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) { 278 SDLoc DL; 279 auto Int32VT = EVT::getIntegerVT(Context, 32); 280 auto Int64VT = EVT::getIntegerVT(Context, 64); 281 auto FloatVT = EVT::getFloatingPointVT(32); 282 283 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 284 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 285 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, FloatVT); 286 SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT); 287 288 SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op0); 289 SDNodeFlags NNegFlags; 290 NNegFlags.setNonNeg(true); 291 SDValue ZExtNNeg = 292 DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op3, NNegFlags); 293 SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0); 294 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1); 295 296 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0); 297 SDValue Neg = DAG->getNegative(Op0, DL, Int32VT); 298 SDValue Not = DAG->getNOT(DL, Op0, Int32VT); 299 300 SDValue VScale = DAG->getVScale(DL, Int32VT, APInt::getMaxValue(32)); 301 302 SDValue FPToSI = DAG->getNode(ISD::FP_TO_SINT, DL, FloatVT, Op2); 303 SDValue FPToUI = DAG->getNode(ISD::FP_TO_UINT, DL, FloatVT, Op2); 304 305 SDValue Brev = DAG->getNode(ISD::BITREVERSE, DL, Int32VT, Op0); 306 SDValue Bswap = DAG->getNode(ISD::BSWAP, DL, Int32VT, Op0); 307 308 SDValue Ctpop = DAG->getNode(ISD::CTPOP, DL, Int32VT, Op0); 309 SDValue Ctlz = DAG->getNode(ISD::CTLZ, DL, Int32VT, Op0); 310 SDValue Cttz = DAG->getNode(ISD::CTTZ, DL, Int32VT, Op0); 311 312 using namespace SDPatternMatch; 313 EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value()))); 314 EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value()))); 315 EXPECT_TRUE(sd_match(SExt, m_SExtLike(m_Value()))); 316 ASSERT_TRUE(ZExtNNeg->getFlags().hasNonNeg()); 317 EXPECT_FALSE(sd_match(ZExtNNeg, m_SExt(m_Value()))); 318 EXPECT_TRUE(sd_match(ZExtNNeg, m_NNegZExt(m_Value()))); 319 EXPECT_FALSE(sd_match(ZExt, m_NNegZExt(m_Value()))); 320 EXPECT_TRUE(sd_match(ZExtNNeg, m_SExtLike(m_Value()))); 321 EXPECT_FALSE(sd_match(ZExt, m_SExtLike(m_Value()))); 322 EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1)))); 323 324 EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value()))); 325 EXPECT_TRUE(sd_match(Not, m_Not(m_Value()))); 326 EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value()))); 327 EXPECT_FALSE(sd_match(Sub, m_Neg(m_Value()))); 328 EXPECT_FALSE(sd_match(Neg, m_Not(m_Value()))); 329 EXPECT_TRUE(sd_match(VScale, m_VScale(m_Value()))); 330 331 EXPECT_TRUE(sd_match(FPToUI, m_FPToUI(m_Value()))); 332 EXPECT_TRUE(sd_match(FPToSI, m_FPToSI(m_Value()))); 333 EXPECT_FALSE(sd_match(FPToUI, m_FPToSI(m_Value()))); 334 EXPECT_FALSE(sd_match(FPToSI, m_FPToUI(m_Value()))); 335 336 EXPECT_TRUE(sd_match(Brev, m_BitReverse(m_Value()))); 337 EXPECT_TRUE(sd_match(Bswap, m_BSwap(m_Value()))); 338 EXPECT_FALSE(sd_match(Brev, m_BSwap(m_Value()))); 339 EXPECT_FALSE(sd_match(Bswap, m_BitReverse(m_Value()))); 340 341 EXPECT_TRUE(sd_match(Ctpop, m_Ctpop(m_Value()))); 342 EXPECT_TRUE(sd_match(Ctlz, m_Ctlz(m_Value()))); 343 EXPECT_TRUE(sd_match(Cttz, m_Cttz(m_Value()))); 344 EXPECT_FALSE(sd_match(Ctpop, m_Ctlz(m_Value()))); 345 EXPECT_FALSE(sd_match(Ctlz, m_Cttz(m_Value()))); 346 EXPECT_FALSE(sd_match(Cttz, m_Ctlz(m_Value()))); 347 } 348 349 TEST_F(SelectionDAGPatternMatchTest, matchConstants) { 350 SDLoc DL; 351 auto Int32VT = EVT::getIntegerVT(Context, 32); 352 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 353 354 SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 355 356 SDValue Const3 = DAG->getConstant(3, DL, Int32VT); 357 SDValue Const87 = DAG->getConstant(87, DL, Int32VT); 358 SDValue Splat = DAG->getSplat(VInt32VT, DL, Arg0); 359 SDValue ConstSplat = DAG->getSplat(VInt32VT, DL, Const3); 360 SDValue Zero = DAG->getConstant(0, DL, Int32VT); 361 SDValue One = DAG->getConstant(1, DL, Int32VT); 362 SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT); 363 SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT); 364 365 using namespace SDPatternMatch; 366 EXPECT_TRUE(sd_match(Const87, m_ConstInt())); 367 EXPECT_FALSE(sd_match(Arg0, m_ConstInt())); 368 APInt ConstVal; 369 EXPECT_TRUE(sd_match(ConstSplat, m_ConstInt(ConstVal))); 370 EXPECT_EQ(ConstVal, 3); 371 EXPECT_FALSE(sd_match(Splat, m_ConstInt())); 372 373 EXPECT_TRUE(sd_match(Const87, m_SpecificInt(87))); 374 EXPECT_TRUE(sd_match(Const3, m_SpecificInt(ConstVal))); 375 EXPECT_TRUE(sd_match(AllOnes, m_AllOnes())); 376 377 EXPECT_TRUE(sd_match(Zero, DAG.get(), m_False())); 378 EXPECT_TRUE(sd_match(One, DAG.get(), m_True())); 379 EXPECT_FALSE(sd_match(AllOnes, DAG.get(), m_True())); 380 381 ISD::CondCode CC; 382 EXPECT_TRUE(sd_match( 383 SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), m_CondCode(CC)))); 384 EXPECT_EQ(CC, ISD::SETULT); 385 EXPECT_TRUE(sd_match(SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), 386 m_SpecificCondCode(ISD::SETULT)))); 387 } 388 389 TEST_F(SelectionDAGPatternMatchTest, patternCombinators) { 390 SDLoc DL; 391 auto Int32VT = EVT::getIntegerVT(Context, 32); 392 393 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 394 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 395 396 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 397 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 398 399 using namespace SDPatternMatch; 400 EXPECT_TRUE(sd_match( 401 Sub, m_AnyOf(m_Opc(ISD::ADD), m_Opc(ISD::SUB), m_Opc(ISD::MUL)))); 402 EXPECT_TRUE(sd_match(Add, m_AllOf(m_Opc(ISD::ADD), m_OneUse()))); 403 EXPECT_TRUE(sd_match(Add, m_NoneOf(m_Opc(ISD::SUB), m_Opc(ISD::MUL)))); 404 } 405 406 TEST_F(SelectionDAGPatternMatchTest, optionalResizing) { 407 SDLoc DL; 408 auto Int32VT = EVT::getIntegerVT(Context, 32); 409 auto Int64VT = EVT::getIntegerVT(Context, 64); 410 411 SDValue Op32 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 412 SDValue Op64 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 413 SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op32); 414 SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op32); 415 SDValue AExt = DAG->getNode(ISD::ANY_EXTEND, DL, Int64VT, Op32); 416 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op64); 417 418 using namespace SDPatternMatch; 419 SDValue A; 420 EXPECT_TRUE(sd_match(Op32, m_ZExtOrSelf(m_Value(A)))); 421 EXPECT_TRUE(A == Op32); 422 EXPECT_TRUE(sd_match(ZExt, m_ZExtOrSelf(m_Value(A)))); 423 EXPECT_TRUE(A == Op32); 424 EXPECT_TRUE(sd_match(Op64, m_SExtOrSelf(m_Value(A)))); 425 EXPECT_TRUE(A == Op64); 426 EXPECT_TRUE(sd_match(SExt, m_SExtOrSelf(m_Value(A)))); 427 EXPECT_TRUE(A == Op32); 428 EXPECT_TRUE(sd_match(Op32, m_AExtOrSelf(m_Value(A)))); 429 EXPECT_TRUE(A == Op32); 430 EXPECT_TRUE(sd_match(AExt, m_AExtOrSelf(m_Value(A)))); 431 EXPECT_TRUE(A == Op32); 432 EXPECT_TRUE(sd_match(Op64, m_TruncOrSelf(m_Value(A)))); 433 EXPECT_TRUE(A == Op64); 434 EXPECT_TRUE(sd_match(Trunc, m_TruncOrSelf(m_Value(A)))); 435 EXPECT_TRUE(A == Op64); 436 } 437 438 TEST_F(SelectionDAGPatternMatchTest, matchNode) { 439 SDLoc DL; 440 auto Int32VT = EVT::getIntegerVT(Context, 32); 441 442 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 443 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 444 445 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 446 447 using namespace SDPatternMatch; 448 EXPECT_TRUE(sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value()))); 449 EXPECT_FALSE(sd_match(Add, m_Node(ISD::SUB, m_Value(), m_Value()))); 450 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_Value()))); 451 EXPECT_FALSE( 452 sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value(), m_Value()))); 453 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_ConstInt(), m_Value()))); 454 } 455 456 namespace { 457 struct VPMatchContext : public SDPatternMatch::BasicMatchContext { 458 using SDPatternMatch::BasicMatchContext::BasicMatchContext; 459 460 bool match(SDValue OpVal, unsigned Opc) const { 461 if (!OpVal->isVPOpcode()) 462 return OpVal->getOpcode() == Opc; 463 464 auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), false); 465 return BaseOpc.has_value() && *BaseOpc == Opc; 466 } 467 468 unsigned getNumOperands(SDValue N) const { 469 return N->isVPOpcode() ? N->getNumOperands() - 2 : N->getNumOperands(); 470 } 471 }; 472 } // anonymous namespace 473 TEST_F(SelectionDAGPatternMatchTest, matchContext) { 474 SDLoc DL; 475 auto BoolVT = EVT::getIntegerVT(Context, 1); 476 auto Int32VT = EVT::getIntegerVT(Context, 32); 477 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 478 auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4); 479 480 SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 481 SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 482 SDValue Mask0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, MaskVT); 483 484 SDValue VPAdd = DAG->getNode(ISD::VP_ADD, DL, VInt32VT, 485 {Vector0, Vector0, Mask0, Scalar0}); 486 SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT, 487 {Scalar0, VPAdd, Mask0, Scalar0}); 488 SDValue Add = DAG->getNode(ISD::ADD, DL, VInt32VT, {Vector0, Vector0}); 489 490 using namespace SDPatternMatch; 491 VPMatchContext VPCtx(DAG.get()); 492 EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Opc(ISD::ADD))); 493 EXPECT_TRUE( 494 sd_context_match(VPAdd, VPCtx, m_Node(ISD::ADD, m_Value(), m_Value()))); 495 // VPMatchContext can't match pattern using explicit VP Opcode 496 EXPECT_FALSE(sd_context_match(VPAdd, VPCtx, 497 m_Node(ISD::VP_ADD, m_Value(), m_Value()))); 498 EXPECT_FALSE(sd_context_match( 499 VPAdd, VPCtx, 500 m_Node(ISD::VP_ADD, m_Value(), m_Value(), m_Value(), m_Value()))); 501 // Check Binary Op Pattern 502 EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Add(m_Value(), m_Value()))); 503 // VP_REDUCE_ADD doesn't have a based opcode, so we use a normal 504 // sd_match before switching to VPMatchContext when checking VPAdd. 505 EXPECT_TRUE(sd_match(VPReduceAdd, m_Node(ISD::VP_REDUCE_ADD, m_Value(), 506 m_Context(VPCtx, m_Opc(ISD::ADD)), 507 m_Value(), m_Value()))); 508 // non-vector predicated should match too 509 EXPECT_TRUE(sd_context_match(Add, VPCtx, m_Opc(ISD::ADD))); 510 EXPECT_TRUE( 511 sd_context_match(Add, VPCtx, m_Node(ISD::ADD, m_Value(), m_Value()))); 512 EXPECT_FALSE(sd_context_match( 513 Add, VPCtx, 514 m_Node(ISD::ADD, m_Value(), m_Value(), m_Value(), m_Value()))); 515 EXPECT_TRUE(sd_context_match(Add, VPCtx, m_Add(m_Value(), m_Value()))); 516 } 517 518 TEST_F(SelectionDAGPatternMatchTest, matchVPWithBasicContext) { 519 SDLoc DL; 520 auto BoolVT = EVT::getIntegerVT(Context, 1); 521 auto Int32VT = EVT::getIntegerVT(Context, 32); 522 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 523 auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4); 524 525 SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, VInt32VT); 526 SDValue Mask = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, MaskVT); 527 SDValue EL = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT); 528 529 SDValue VPAdd = 530 DAG->getNode(ISD::VP_ADD, DL, VInt32VT, Vector0, Vector0, Mask, EL); 531 532 using namespace SDPatternMatch; 533 EXPECT_FALSE(sd_match(VPAdd, m_Node(ISD::VP_ADD, m_Value(), m_Value()))); 534 EXPECT_TRUE(sd_match( 535 VPAdd, m_Node(ISD::VP_ADD, m_Value(), m_Value(), m_Value(), m_Value()))); 536 } 537 538 TEST_F(SelectionDAGPatternMatchTest, matchAdvancedProperties) { 539 SDLoc DL; 540 auto Int16VT = EVT::getIntegerVT(Context, 16); 541 auto Int64VT = EVT::getIntegerVT(Context, 64); 542 543 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 544 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT); 545 546 SDValue Add = DAG->getNode(ISD::ADD, DL, Int64VT, Op0, Op0); 547 548 using namespace SDPatternMatch; 549 EXPECT_TRUE(sd_match(Op0, DAG.get(), m_LegalType(m_Value()))); 550 EXPECT_FALSE(sd_match(Op1, DAG.get(), m_LegalType(m_Value()))); 551 EXPECT_TRUE(sd_match(Add, DAG.get(), 552 m_LegalOp(m_IntegerVT(m_Add(m_Value(), m_Value()))))); 553 } 554