xref: /llvm-project/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp (revision ad778889cf5ce74be3193fae1d3b2bce34a56863)
1 //===---- llvm/unittest/CodeGen/SelectionDAGPatternMatchTest.cpp  ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
10 #include "llvm/AsmParser/Parser.h"
11 #include "llvm/CodeGen/MachineModuleInfo.h"
12 #include "llvm/CodeGen/SDPatternMatch.h"
13 #include "llvm/CodeGen/TargetLowering.h"
14 #include "llvm/IR/Module.h"
15 #include "llvm/MC/TargetRegistry.h"
16 #include "llvm/Support/SourceMgr.h"
17 #include "llvm/Support/TargetSelect.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "gtest/gtest.h"
20 
21 using namespace llvm;
22 
23 class SelectionDAGPatternMatchTest : public testing::Test {
24 protected:
25   static void SetUpTestCase() {
26     InitializeAllTargets();
27     InitializeAllTargetMCs();
28   }
29 
30   void SetUp() override {
31     StringRef Assembly = "@g = global i32 0\n"
32                          "@g_alias = alias i32, i32* @g\n"
33                          "define i32 @f() {\n"
34                          "  %1 = load i32, i32* @g\n"
35                          "  ret i32 %1\n"
36                          "}";
37 
38     Triple TargetTriple("riscv64--");
39     std::string Error;
40     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
41     // FIXME: These tests do not depend on RISCV specifically, but we have to
42     // initialize a target. A skeleton Target for unittests would allow us to
43     // always run these tests.
44     if (!T)
45       GTEST_SKIP();
46 
47     TargetOptions Options;
48     TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
49         T->createTargetMachine("riscv64", "", "+m,+f,+d,+v", Options,
50                                std::nullopt, std::nullopt,
51                                CodeGenOptLevel::Aggressive)));
52     if (!TM)
53       GTEST_SKIP();
54 
55     SMDiagnostic SMError;
56     M = parseAssemblyString(Assembly, SMError, Context);
57     if (!M)
58       report_fatal_error(SMError.getMessage());
59     M->setDataLayout(TM->createDataLayout());
60 
61     F = M->getFunction("f");
62     if (!F)
63       report_fatal_error("F?");
64     G = M->getGlobalVariable("g");
65     if (!G)
66       report_fatal_error("G?");
67     AliasedG = M->getNamedAlias("g_alias");
68     if (!AliasedG)
69       report_fatal_error("AliasedG?");
70 
71     MachineModuleInfo MMI(TM.get());
72 
73     MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F),
74                                            MMI.getContext(), 0);
75 
76     DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None);
77     if (!DAG)
78       report_fatal_error("DAG?");
79     OptimizationRemarkEmitter ORE(F);
80     DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr, MMI,
81               nullptr);
82   }
83 
84   TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) {
85     return DAG->getTargetLoweringInfo().getTypeAction(Context, VT);
86   }
87 
88   EVT getTypeToTransformTo(EVT VT) {
89     return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT);
90   }
91 
92   LLVMContext Context;
93   std::unique_ptr<LLVMTargetMachine> TM;
94   std::unique_ptr<Module> M;
95   Function *F;
96   GlobalVariable *G;
97   GlobalAlias *AliasedG;
98   std::unique_ptr<MachineFunction> MF;
99   std::unique_ptr<SelectionDAG> DAG;
100 };
101 
102 TEST_F(SelectionDAGPatternMatchTest, matchValueType) {
103   SDLoc DL;
104   auto Int32VT = EVT::getIntegerVT(Context, 32);
105   auto Float32VT = EVT::getFloatingPointVT(32);
106   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
107 
108   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
109   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT);
110   SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT);
111 
112   using namespace SDPatternMatch;
113   EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT)));
114   EVT BindVT;
115   EXPECT_TRUE(sd_match(Op1, m_VT(BindVT)));
116   EXPECT_EQ(BindVT, Float32VT);
117   EXPECT_TRUE(sd_match(Op0, m_IntegerVT()));
118   EXPECT_TRUE(sd_match(Op1, m_FloatingPointVT()));
119   EXPECT_TRUE(sd_match(Op2, m_VectorVT()));
120   EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT()));
121 }
122 
123 TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
124   SDLoc DL;
125   auto Int32VT = EVT::getIntegerVT(Context, 32);
126 
127   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
128   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
129 
130   SDValue ICMP_UGT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGT);
131   SDValue ICMP_EQ01 = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETEQ);
132   SDValue ICMP_EQ10 = DAG->getSetCC(DL, MVT::i1, Op1, Op0, ISD::SETEQ);
133 
134   auto Int1VT = EVT::getIntegerVT(Context, 1);
135   SDValue Cond = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int1VT);
136   SDValue T = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 4, Int1VT);
137   SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT);
138   SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F);
139 
140   using namespace SDPatternMatch;
141   ISD::CondCode CC;
142   EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(),
143                                          m_SpecificCondCode(ISD::SETUGT))));
144   EXPECT_TRUE(
145       sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_CondCode(CC))));
146   EXPECT_TRUE(CC == ISD::SETUGT);
147   EXPECT_FALSE(sd_match(
148       ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_SpecificCondCode(ISD::SETLE))));
149 
150   EXPECT_TRUE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op0), m_Specific(Op1),
151                                           m_SpecificCondCode(ISD::SETEQ))));
152   EXPECT_TRUE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op1), m_Specific(Op0),
153                                           m_SpecificCondCode(ISD::SETEQ))));
154   EXPECT_FALSE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op1), m_Specific(Op0),
155                                            m_SpecificCondCode(ISD::SETEQ))));
156   EXPECT_FALSE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op0), m_Specific(Op1),
157                                            m_SpecificCondCode(ISD::SETEQ))));
158   EXPECT_TRUE(sd_match(ICMP_EQ01, m_c_SetCC(m_Specific(Op1), m_Specific(Op0),
159                                             m_SpecificCondCode(ISD::SETEQ))));
160   EXPECT_TRUE(sd_match(ICMP_EQ10, m_c_SetCC(m_Specific(Op0), m_Specific(Op1),
161                                             m_SpecificCondCode(ISD::SETEQ))));
162 
163   EXPECT_TRUE(sd_match(
164       Select, m_Select(m_Specific(Cond), m_Specific(T), m_Specific(F))));
165   EXPECT_FALSE(sd_match(
166       Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T))));
167   EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1),
168                                             m_SpecificCondCode(ISD::SETEQ))));
169 }
170 
171 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) {
172   SDLoc DL;
173   auto Int32VT = EVT::getIntegerVT(Context, 32);
174   auto Float32VT = EVT::getFloatingPointVT(32);
175 
176   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
177   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
178   SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT);
179 
180   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
181   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
182   SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub);
183   SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1);
184   SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0);
185   SDValue Or  = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1);
186   SDValue SMax = DAG->getNode(ISD::SMAX, DL, Int32VT, Op0, Op1);
187   SDValue SMin = DAG->getNode(ISD::SMIN, DL, Int32VT, Op1, Op0);
188   SDValue UMax = DAG->getNode(ISD::UMAX, DL, Int32VT, Op0, Op1);
189   SDValue UMin = DAG->getNode(ISD::UMIN, DL, Int32VT, Op1, Op0);
190 
191   SDValue SFAdd = DAG->getNode(ISD::STRICT_FADD, DL, {Float32VT, MVT::Other},
192                                {DAG->getEntryNode(), Op2, Op2});
193 
194   using namespace SDPatternMatch;
195   EXPECT_TRUE(sd_match(Sub, m_BinOp(ISD::SUB, m_Value(), m_Value())));
196   EXPECT_TRUE(sd_match(Sub, m_Sub(m_Value(), m_Value())));
197   EXPECT_TRUE(sd_match(Add, m_c_BinOp(ISD::ADD, m_Value(), m_Value())));
198   EXPECT_TRUE(sd_match(Add, m_Add(m_Value(), m_Value())));
199   EXPECT_TRUE(sd_match(
200       Mul, m_Mul(m_OneUse(m_Opc(ISD::SUB)), m_NUses<2>(m_Specific(Add)))));
201   EXPECT_TRUE(
202       sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_SpecificVT(Float32VT),
203                                      m_SpecificVT(Float32VT))));
204 
205   EXPECT_TRUE(sd_match(And, m_c_BinOp(ISD::AND, m_Value(), m_Value())));
206   EXPECT_TRUE(sd_match(And, m_And(m_Value(), m_Value())));
207   EXPECT_TRUE(sd_match(Xor, m_c_BinOp(ISD::XOR, m_Value(), m_Value())));
208   EXPECT_TRUE(sd_match(Xor, m_Xor(m_Value(), m_Value())));
209   EXPECT_TRUE(sd_match(Or, m_c_BinOp(ISD::OR, m_Value(), m_Value())));
210   EXPECT_TRUE(sd_match(Or, m_Or(m_Value(), m_Value())));
211 
212   EXPECT_TRUE(sd_match(SMax, m_c_BinOp(ISD::SMAX, m_Value(), m_Value())));
213   EXPECT_TRUE(sd_match(SMax, m_SMax(m_Value(), m_Value())));
214   EXPECT_TRUE(sd_match(SMin, m_c_BinOp(ISD::SMIN, m_Value(), m_Value())));
215   EXPECT_TRUE(sd_match(SMin, m_SMin(m_Value(), m_Value())));
216   EXPECT_TRUE(sd_match(UMax, m_c_BinOp(ISD::UMAX, m_Value(), m_Value())));
217   EXPECT_TRUE(sd_match(UMax, m_UMax(m_Value(), m_Value())));
218   EXPECT_TRUE(sd_match(UMin, m_c_BinOp(ISD::UMIN, m_Value(), m_Value())));
219   EXPECT_TRUE(sd_match(UMin, m_UMin(m_Value(), m_Value())));
220 
221   SDValue BindVal;
222   EXPECT_TRUE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_Value(BindVal),
223                                              m_Deferred(BindVal))));
224   EXPECT_FALSE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_OtherVT(),
225                                               m_SpecificVT(Float32VT))));
226 }
227 
228 TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
229   SDLoc DL;
230   auto Int32VT = EVT::getIntegerVT(Context, 32);
231   auto Int64VT = EVT::getIntegerVT(Context, 64);
232 
233   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
234   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
235 
236   SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op0);
237   SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0);
238   SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
239 
240   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0);
241   SDValue Neg = DAG->getNegative(Op0, DL, Int32VT);
242   SDValue Not = DAG->getNOT(DL, Op0, Int32VT);
243 
244   SDValue VScale = DAG->getVScale(DL, Int32VT, APInt::getMaxValue(32));
245 
246   using namespace SDPatternMatch;
247   EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value())));
248   EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value())));
249   EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1))));
250 
251   EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value())));
252   EXPECT_TRUE(sd_match(Not, m_Not(m_Value())));
253   EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value())));
254   EXPECT_FALSE(sd_match(Sub, m_Neg(m_Value())));
255   EXPECT_FALSE(sd_match(Neg, m_Not(m_Value())));
256   EXPECT_TRUE(sd_match(VScale, m_VScale(m_Value())));
257 }
258 
259 TEST_F(SelectionDAGPatternMatchTest, matchConstants) {
260   SDLoc DL;
261   auto Int32VT = EVT::getIntegerVT(Context, 32);
262   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
263 
264   SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
265 
266   SDValue Const3 = DAG->getConstant(3, DL, Int32VT);
267   SDValue Const87 = DAG->getConstant(87, DL, Int32VT);
268   SDValue Splat = DAG->getSplat(VInt32VT, DL, Arg0);
269   SDValue ConstSplat = DAG->getSplat(VInt32VT, DL, Const3);
270   SDValue Zero = DAG->getConstant(0, DL, Int32VT);
271   SDValue One = DAG->getConstant(1, DL, Int32VT);
272   SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT);
273   SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT);
274 
275   using namespace SDPatternMatch;
276   EXPECT_TRUE(sd_match(Const87, m_ConstInt()));
277   EXPECT_FALSE(sd_match(Arg0, m_ConstInt()));
278   APInt ConstVal;
279   EXPECT_TRUE(sd_match(ConstSplat, m_ConstInt(ConstVal)));
280   EXPECT_EQ(ConstVal, 3);
281   EXPECT_FALSE(sd_match(Splat, m_ConstInt()));
282 
283   EXPECT_TRUE(sd_match(Const87, m_SpecificInt(87)));
284   EXPECT_TRUE(sd_match(Const3, m_SpecificInt(ConstVal)));
285   EXPECT_TRUE(sd_match(AllOnes, m_AllOnes()));
286 
287   EXPECT_TRUE(sd_match(Zero, DAG.get(), m_False()));
288   EXPECT_TRUE(sd_match(One, DAG.get(), m_True()));
289   EXPECT_FALSE(sd_match(AllOnes, DAG.get(), m_True()));
290 
291   ISD::CondCode CC;
292   EXPECT_TRUE(sd_match(
293       SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), m_CondCode(CC))));
294   EXPECT_EQ(CC, ISD::SETULT);
295   EXPECT_TRUE(sd_match(SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(),
296                                      m_SpecificCondCode(ISD::SETULT))));
297 }
298 
299 TEST_F(SelectionDAGPatternMatchTest, patternCombinators) {
300   SDLoc DL;
301   auto Int32VT = EVT::getIntegerVT(Context, 32);
302 
303   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
304   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
305 
306   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
307   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
308 
309   using namespace SDPatternMatch;
310   EXPECT_TRUE(sd_match(
311       Sub, m_AnyOf(m_Opc(ISD::ADD), m_Opc(ISD::SUB), m_Opc(ISD::MUL))));
312   EXPECT_TRUE(sd_match(Add, m_AllOf(m_Opc(ISD::ADD), m_OneUse())));
313   EXPECT_TRUE(sd_match(Add, m_NoneOf(m_Opc(ISD::SUB), m_Opc(ISD::MUL))));
314 }
315 
316 TEST_F(SelectionDAGPatternMatchTest, optionalResizing) {
317   SDLoc DL;
318   auto Int32VT = EVT::getIntegerVT(Context, 32);
319   auto Int64VT = EVT::getIntegerVT(Context, 64);
320 
321   SDValue Op32 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
322   SDValue Op64 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
323   SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op32);
324   SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op32);
325   SDValue AExt = DAG->getNode(ISD::ANY_EXTEND, DL, Int64VT, Op32);
326   SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op64);
327 
328   using namespace SDPatternMatch;
329   SDValue A;
330   EXPECT_TRUE(sd_match(Op32, m_ZExtOrSelf(m_Value(A))));
331   EXPECT_TRUE(A == Op32);
332   EXPECT_TRUE(sd_match(ZExt, m_ZExtOrSelf(m_Value(A))));
333   EXPECT_TRUE(A == Op32);
334   EXPECT_TRUE(sd_match(Op64, m_SExtOrSelf(m_Value(A))));
335   EXPECT_TRUE(A == Op64);
336   EXPECT_TRUE(sd_match(SExt, m_SExtOrSelf(m_Value(A))));
337   EXPECT_TRUE(A == Op32);
338   EXPECT_TRUE(sd_match(Op32, m_AExtOrSelf(m_Value(A))));
339   EXPECT_TRUE(A == Op32);
340   EXPECT_TRUE(sd_match(AExt, m_AExtOrSelf(m_Value(A))));
341   EXPECT_TRUE(A == Op32);
342   EXPECT_TRUE(sd_match(Op64, m_TruncOrSelf(m_Value(A))));
343   EXPECT_TRUE(A == Op64);
344   EXPECT_TRUE(sd_match(Trunc, m_TruncOrSelf(m_Value(A))));
345   EXPECT_TRUE(A == Op64);
346 }
347 
348 TEST_F(SelectionDAGPatternMatchTest, matchNode) {
349   SDLoc DL;
350   auto Int32VT = EVT::getIntegerVT(Context, 32);
351 
352   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
353   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
354 
355   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
356 
357   using namespace SDPatternMatch;
358   EXPECT_TRUE(sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value())));
359   EXPECT_FALSE(sd_match(Add, m_Node(ISD::SUB, m_Value(), m_Value())));
360   EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_Value())));
361   EXPECT_FALSE(
362       sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value(), m_Value())));
363   EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_ConstInt(), m_Value())));
364 }
365 
366 namespace {
367 struct VPMatchContext : public SDPatternMatch::BasicMatchContext {
368   using SDPatternMatch::BasicMatchContext::BasicMatchContext;
369 
370   bool match(SDValue OpVal, unsigned Opc) const {
371     if (!OpVal->isVPOpcode())
372       return OpVal->getOpcode() == Opc;
373 
374     auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), false);
375     return BaseOpc.has_value() && *BaseOpc == Opc;
376   }
377 };
378 } // anonymous namespace
379 TEST_F(SelectionDAGPatternMatchTest, matchContext) {
380   SDLoc DL;
381   auto BoolVT = EVT::getIntegerVT(Context, 1);
382   auto Int32VT = EVT::getIntegerVT(Context, 32);
383   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
384   auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4);
385 
386   SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
387   SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT);
388   SDValue Mask0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, MaskVT);
389 
390   SDValue VPAdd = DAG->getNode(ISD::VP_ADD, DL, VInt32VT,
391                                {Vector0, Vector0, Mask0, Scalar0});
392   SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT,
393                                      {Scalar0, VPAdd, Mask0, Scalar0});
394 
395   using namespace SDPatternMatch;
396   VPMatchContext VPCtx(DAG.get());
397   EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Opc(ISD::ADD)));
398   // VP_REDUCE_ADD doesn't have a based opcode, so we use a normal
399   // sd_match before switching to VPMatchContext when checking VPAdd.
400   EXPECT_TRUE(sd_match(VPReduceAdd, m_Node(ISD::VP_REDUCE_ADD, m_Value(),
401                                            m_Context(VPCtx, m_Opc(ISD::ADD)),
402                                            m_Value(), m_Value())));
403 }
404 
405 TEST_F(SelectionDAGPatternMatchTest, matchAdvancedProperties) {
406   SDLoc DL;
407   auto Int16VT = EVT::getIntegerVT(Context, 16);
408   auto Int64VT = EVT::getIntegerVT(Context, 64);
409 
410   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
411   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT);
412 
413   SDValue Add = DAG->getNode(ISD::ADD, DL, Int64VT, Op0, Op0);
414 
415   using namespace SDPatternMatch;
416   EXPECT_TRUE(sd_match(Op0, DAG.get(), m_LegalType(m_Value())));
417   EXPECT_FALSE(sd_match(Op1, DAG.get(), m_LegalType(m_Value())));
418   EXPECT_TRUE(sd_match(Add, DAG.get(),
419                        m_LegalOp(m_IntegerVT(m_Add(m_Value(), m_Value())))));
420 }
421