xref: /llvm-project/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp (revision 8837898b8dc34cfa21ba877832a5865af06f52c9) 
1 //===---- llvm/unittest/CodeGen/SelectionDAGPatternMatchTest.cpp  ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
10 #include "llvm/AsmParser/Parser.h"
11 #include "llvm/CodeGen/MachineModuleInfo.h"
12 #include "llvm/CodeGen/SDPatternMatch.h"
13 #include "llvm/CodeGen/TargetLowering.h"
14 #include "llvm/IR/Module.h"
15 #include "llvm/MC/TargetRegistry.h"
16 #include "llvm/Support/SourceMgr.h"
17 #include "llvm/Support/TargetSelect.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "gtest/gtest.h"
20 
21 using namespace llvm;
22 
23 class SelectionDAGPatternMatchTest : public testing::Test {
24 protected:
25   static void SetUpTestCase() {
26     InitializeAllTargets();
27     InitializeAllTargetMCs();
28   }
29 
30   void SetUp() override {
31     StringRef Assembly = "@g = global i32 0\n"
32                          "@g_alias = alias i32, i32* @g\n"
33                          "define i32 @f() {\n"
34                          "  %1 = load i32, i32* @g\n"
35                          "  ret i32 %1\n"
36                          "}";
37 
38     Triple TargetTriple("riscv64--");
39     std::string Error;
40     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
41     // FIXME: These tests do not depend on RISCV specifically, but we have to
42     // initialize a target. A skeleton Target for unittests would allow us to
43     // always run these tests.
44     if (!T)
45       GTEST_SKIP();
46 
47     TargetOptions Options;
48     TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
49         T->createTargetMachine("riscv64", "", "+m,+f,+d,+v", Options,
50                                std::nullopt, std::nullopt,
51                                CodeGenOptLevel::Aggressive)));
52     if (!TM)
53       GTEST_SKIP();
54 
55     SMDiagnostic SMError;
56     M = parseAssemblyString(Assembly, SMError, Context);
57     if (!M)
58       report_fatal_error(SMError.getMessage());
59     M->setDataLayout(TM->createDataLayout());
60 
61     F = M->getFunction("f");
62     if (!F)
63       report_fatal_error("F?");
64     G = M->getGlobalVariable("g");
65     if (!G)
66       report_fatal_error("G?");
67     AliasedG = M->getNamedAlias("g_alias");
68     if (!AliasedG)
69       report_fatal_error("AliasedG?");
70 
71     MachineModuleInfo MMI(TM.get());
72 
73     MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F),
74                                            MMI.getContext(), 0);
75 
76     DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None);
77     if (!DAG)
78       report_fatal_error("DAG?");
79     OptimizationRemarkEmitter ORE(F);
80     DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr, MMI,
81               nullptr);
82   }
83 
84   TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) {
85     return DAG->getTargetLoweringInfo().getTypeAction(Context, VT);
86   }
87 
88   EVT getTypeToTransformTo(EVT VT) {
89     return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT);
90   }
91 
92   LLVMContext Context;
93   std::unique_ptr<LLVMTargetMachine> TM;
94   std::unique_ptr<Module> M;
95   Function *F;
96   GlobalVariable *G;
97   GlobalAlias *AliasedG;
98   std::unique_ptr<MachineFunction> MF;
99   std::unique_ptr<SelectionDAG> DAG;
100 };
101 
102 TEST_F(SelectionDAGPatternMatchTest, matchValueType) {
103   SDLoc DL;
104   auto Int32VT = EVT::getIntegerVT(Context, 32);
105   auto Float32VT = EVT::getFloatingPointVT(32);
106   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
107 
108   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
109   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT);
110   SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT);
111 
112   using namespace SDPatternMatch;
113   EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT)));
114   EVT BindVT;
115   EXPECT_TRUE(sd_match(Op1, m_VT(BindVT)));
116   EXPECT_EQ(BindVT, Float32VT);
117   EXPECT_TRUE(sd_match(Op0, m_IntegerVT()));
118   EXPECT_TRUE(sd_match(Op1, m_FloatingPointVT()));
119   EXPECT_TRUE(sd_match(Op2, m_VectorVT()));
120   EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT()));
121 }
122 
123 TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
124   SDLoc DL;
125   auto Int32VT = EVT::getIntegerVT(Context, 32);
126 
127   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
128   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
129 
130   SDValue ICMP_UGT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGT);
131   SDValue ICMP_EQ01 = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETEQ);
132   SDValue ICMP_EQ10 = DAG->getSetCC(DL, MVT::i1, Op1, Op0, ISD::SETEQ);
133 
134   auto Int1VT = EVT::getIntegerVT(Context, 1);
135   SDValue Cond = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int1VT);
136   SDValue T = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 4, Int1VT);
137   SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT);
138   SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F);
139 
140   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
141   SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 6, VInt32VT);
142   SDValue V2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 7, VInt32VT);
143   SDValue VSelect = DAG->getNode(ISD::VSELECT, DL, VInt32VT, Cond, V1, V2);
144 
145   using namespace SDPatternMatch;
146   ISD::CondCode CC;
147   EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(),
148                                          m_SpecificCondCode(ISD::SETUGT))));
149   EXPECT_TRUE(
150       sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_CondCode(CC))));
151   EXPECT_TRUE(CC == ISD::SETUGT);
152   EXPECT_FALSE(sd_match(
153       ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_SpecificCondCode(ISD::SETLE))));
154 
155   EXPECT_TRUE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op0), m_Specific(Op1),
156                                           m_SpecificCondCode(ISD::SETEQ))));
157   EXPECT_TRUE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op1), m_Specific(Op0),
158                                           m_SpecificCondCode(ISD::SETEQ))));
159   EXPECT_FALSE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op1), m_Specific(Op0),
160                                            m_SpecificCondCode(ISD::SETEQ))));
161   EXPECT_FALSE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op0), m_Specific(Op1),
162                                            m_SpecificCondCode(ISD::SETEQ))));
163   EXPECT_TRUE(sd_match(ICMP_EQ01, m_c_SetCC(m_Specific(Op1), m_Specific(Op0),
164                                             m_SpecificCondCode(ISD::SETEQ))));
165   EXPECT_TRUE(sd_match(ICMP_EQ10, m_c_SetCC(m_Specific(Op0), m_Specific(Op1),
166                                             m_SpecificCondCode(ISD::SETEQ))));
167 
168   EXPECT_TRUE(sd_match(
169       Select, m_Select(m_Specific(Cond), m_Specific(T), m_Specific(F))));
170   EXPECT_FALSE(sd_match(
171       Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T))));
172   EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1),
173                                             m_SpecificCondCode(ISD::SETEQ))));
174   EXPECT_TRUE(sd_match(
175       VSelect, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
176   EXPECT_FALSE(sd_match(
177       Select, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
178 }
179 
180 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) {
181   SDLoc DL;
182   auto Int32VT = EVT::getIntegerVT(Context, 32);
183   auto Float32VT = EVT::getFloatingPointVT(32);
184 
185   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
186   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
187   SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT);
188   SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 8, Int32VT);
189 
190   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
191   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
192   SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub);
193   SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1);
194   SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0);
195   SDValue Or  = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1);
196   SDNodeFlags DisFlags;
197   DisFlags.setDisjoint(true);
198   SDValue DisOr = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op3, DisFlags);
199   SDValue SMax = DAG->getNode(ISD::SMAX, DL, Int32VT, Op0, Op1);
200   SDValue SMin = DAG->getNode(ISD::SMIN, DL, Int32VT, Op1, Op0);
201   SDValue UMax = DAG->getNode(ISD::UMAX, DL, Int32VT, Op0, Op1);
202   SDValue UMin = DAG->getNode(ISD::UMIN, DL, Int32VT, Op1, Op0);
203 
204   SDValue SFAdd = DAG->getNode(ISD::STRICT_FADD, DL, {Float32VT, MVT::Other},
205                                {DAG->getEntryNode(), Op2, Op2});
206 
207   using namespace SDPatternMatch;
208   EXPECT_TRUE(sd_match(Sub, m_BinOp(ISD::SUB, m_Value(), m_Value())));
209   EXPECT_TRUE(sd_match(Sub, m_Sub(m_Value(), m_Value())));
210   EXPECT_TRUE(sd_match(Add, m_c_BinOp(ISD::ADD, m_Value(), m_Value())));
211   EXPECT_TRUE(sd_match(Add, m_Add(m_Value(), m_Value())));
212   EXPECT_TRUE(sd_match(Add, m_AddLike(m_Value(), m_Value())));
213   EXPECT_TRUE(sd_match(
214       Mul, m_Mul(m_OneUse(m_Opc(ISD::SUB)), m_NUses<2>(m_Specific(Add)))));
215   EXPECT_TRUE(
216       sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_SpecificVT(Float32VT),
217                                      m_SpecificVT(Float32VT))));
218 
219   EXPECT_TRUE(sd_match(And, m_c_BinOp(ISD::AND, m_Value(), m_Value())));
220   EXPECT_TRUE(sd_match(And, m_And(m_Value(), m_Value())));
221   EXPECT_TRUE(sd_match(Xor, m_c_BinOp(ISD::XOR, m_Value(), m_Value())));
222   EXPECT_TRUE(sd_match(Xor, m_Xor(m_Value(), m_Value())));
223   EXPECT_TRUE(sd_match(Or, m_c_BinOp(ISD::OR, m_Value(), m_Value())));
224   EXPECT_TRUE(sd_match(Or, m_Or(m_Value(), m_Value())));
225   EXPECT_FALSE(sd_match(Or, m_DisjointOr(m_Value(), m_Value())));
226 
227   EXPECT_TRUE(sd_match(DisOr, m_Or(m_Value(), m_Value())));
228   EXPECT_TRUE(sd_match(DisOr, m_DisjointOr(m_Value(), m_Value())));
229   EXPECT_FALSE(sd_match(DisOr, m_Add(m_Value(), m_Value())));
230   EXPECT_TRUE(sd_match(DisOr, m_AddLike(m_Value(), m_Value())));
231 
232   EXPECT_TRUE(sd_match(SMax, m_c_BinOp(ISD::SMAX, m_Value(), m_Value())));
233   EXPECT_TRUE(sd_match(SMax, m_SMax(m_Value(), m_Value())));
234   EXPECT_TRUE(sd_match(SMin, m_c_BinOp(ISD::SMIN, m_Value(), m_Value())));
235   EXPECT_TRUE(sd_match(SMin, m_SMin(m_Value(), m_Value())));
236   EXPECT_TRUE(sd_match(UMax, m_c_BinOp(ISD::UMAX, m_Value(), m_Value())));
237   EXPECT_TRUE(sd_match(UMax, m_UMax(m_Value(), m_Value())));
238   EXPECT_TRUE(sd_match(UMin, m_c_BinOp(ISD::UMIN, m_Value(), m_Value())));
239   EXPECT_TRUE(sd_match(UMin, m_UMin(m_Value(), m_Value())));
240 
241   SDValue BindVal;
242   EXPECT_TRUE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_Value(BindVal),
243                                              m_Deferred(BindVal))));
244   EXPECT_FALSE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_OtherVT(),
245                                               m_SpecificVT(Float32VT))));
246 }
247 
248 TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
249   SDLoc DL;
250   auto Int32VT = EVT::getIntegerVT(Context, 32);
251   auto Int64VT = EVT::getIntegerVT(Context, 64);
252   auto FloatVT = EVT::getFloatingPointVT(32);
253 
254   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
255   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
256   SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, FloatVT);
257   SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT);
258 
259   SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op0);
260   SDNodeFlags NNegFlags;
261   NNegFlags.setNonNeg(true);
262   SDValue ZExtNNeg =
263       DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op3, NNegFlags);
264   SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0);
265   SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
266 
267   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0);
268   SDValue Neg = DAG->getNegative(Op0, DL, Int32VT);
269   SDValue Not = DAG->getNOT(DL, Op0, Int32VT);
270 
271   SDValue VScale = DAG->getVScale(DL, Int32VT, APInt::getMaxValue(32));
272 
273   SDValue FPToSI = DAG->getNode(ISD::FP_TO_SINT, DL, FloatVT, Op2);
274   SDValue FPToUI = DAG->getNode(ISD::FP_TO_UINT, DL, FloatVT, Op2);
275 
276   SDValue Ctlz = DAG->getNode(ISD::CTLZ, DL, Int32VT, Op0);
277 
278   using namespace SDPatternMatch;
279   EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value())));
280   EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value())));
281   EXPECT_TRUE(sd_match(SExt, m_SExtLike(m_Value())));
282   ASSERT_TRUE(ZExtNNeg->getFlags().hasNonNeg());
283   EXPECT_FALSE(sd_match(ZExtNNeg, m_SExt(m_Value())));
284   EXPECT_TRUE(sd_match(ZExtNNeg, m_NNegZExt(m_Value())));
285   EXPECT_FALSE(sd_match(ZExt, m_NNegZExt(m_Value())));
286   EXPECT_TRUE(sd_match(ZExtNNeg, m_SExtLike(m_Value())));
287   EXPECT_FALSE(sd_match(ZExt, m_SExtLike(m_Value())));
288   EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1))));
289 
290   EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value())));
291   EXPECT_TRUE(sd_match(Not, m_Not(m_Value())));
292   EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value())));
293   EXPECT_FALSE(sd_match(Sub, m_Neg(m_Value())));
294   EXPECT_FALSE(sd_match(Neg, m_Not(m_Value())));
295   EXPECT_TRUE(sd_match(VScale, m_VScale(m_Value())));
296 
297   EXPECT_TRUE(sd_match(FPToUI, m_FPToUI(m_Value())));
298   EXPECT_TRUE(sd_match(FPToSI, m_FPToSI(m_Value())));
299   EXPECT_FALSE(sd_match(FPToUI, m_FPToSI(m_Value())));
300   EXPECT_FALSE(sd_match(FPToSI, m_FPToUI(m_Value())));
301 
302   EXPECT_TRUE(sd_match(Ctlz, m_Ctlz(m_Value())));
303 }
304 
305 TEST_F(SelectionDAGPatternMatchTest, matchConstants) {
306   SDLoc DL;
307   auto Int32VT = EVT::getIntegerVT(Context, 32);
308   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
309 
310   SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
311 
312   SDValue Const3 = DAG->getConstant(3, DL, Int32VT);
313   SDValue Const87 = DAG->getConstant(87, DL, Int32VT);
314   SDValue Splat = DAG->getSplat(VInt32VT, DL, Arg0);
315   SDValue ConstSplat = DAG->getSplat(VInt32VT, DL, Const3);
316   SDValue Zero = DAG->getConstant(0, DL, Int32VT);
317   SDValue One = DAG->getConstant(1, DL, Int32VT);
318   SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT);
319   SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT);
320 
321   using namespace SDPatternMatch;
322   EXPECT_TRUE(sd_match(Const87, m_ConstInt()));
323   EXPECT_FALSE(sd_match(Arg0, m_ConstInt()));
324   APInt ConstVal;
325   EXPECT_TRUE(sd_match(ConstSplat, m_ConstInt(ConstVal)));
326   EXPECT_EQ(ConstVal, 3);
327   EXPECT_FALSE(sd_match(Splat, m_ConstInt()));
328 
329   EXPECT_TRUE(sd_match(Const87, m_SpecificInt(87)));
330   EXPECT_TRUE(sd_match(Const3, m_SpecificInt(ConstVal)));
331   EXPECT_TRUE(sd_match(AllOnes, m_AllOnes()));
332 
333   EXPECT_TRUE(sd_match(Zero, DAG.get(), m_False()));
334   EXPECT_TRUE(sd_match(One, DAG.get(), m_True()));
335   EXPECT_FALSE(sd_match(AllOnes, DAG.get(), m_True()));
336 
337   ISD::CondCode CC;
338   EXPECT_TRUE(sd_match(
339       SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), m_CondCode(CC))));
340   EXPECT_EQ(CC, ISD::SETULT);
341   EXPECT_TRUE(sd_match(SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(),
342                                      m_SpecificCondCode(ISD::SETULT))));
343 }
344 
345 TEST_F(SelectionDAGPatternMatchTest, patternCombinators) {
346   SDLoc DL;
347   auto Int32VT = EVT::getIntegerVT(Context, 32);
348 
349   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
350   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
351 
352   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
353   SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
354 
355   using namespace SDPatternMatch;
356   EXPECT_TRUE(sd_match(
357       Sub, m_AnyOf(m_Opc(ISD::ADD), m_Opc(ISD::SUB), m_Opc(ISD::MUL))));
358   EXPECT_TRUE(sd_match(Add, m_AllOf(m_Opc(ISD::ADD), m_OneUse())));
359   EXPECT_TRUE(sd_match(Add, m_NoneOf(m_Opc(ISD::SUB), m_Opc(ISD::MUL))));
360 }
361 
362 TEST_F(SelectionDAGPatternMatchTest, optionalResizing) {
363   SDLoc DL;
364   auto Int32VT = EVT::getIntegerVT(Context, 32);
365   auto Int64VT = EVT::getIntegerVT(Context, 64);
366 
367   SDValue Op32 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
368   SDValue Op64 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
369   SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op32);
370   SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op32);
371   SDValue AExt = DAG->getNode(ISD::ANY_EXTEND, DL, Int64VT, Op32);
372   SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op64);
373 
374   using namespace SDPatternMatch;
375   SDValue A;
376   EXPECT_TRUE(sd_match(Op32, m_ZExtOrSelf(m_Value(A))));
377   EXPECT_TRUE(A == Op32);
378   EXPECT_TRUE(sd_match(ZExt, m_ZExtOrSelf(m_Value(A))));
379   EXPECT_TRUE(A == Op32);
380   EXPECT_TRUE(sd_match(Op64, m_SExtOrSelf(m_Value(A))));
381   EXPECT_TRUE(A == Op64);
382   EXPECT_TRUE(sd_match(SExt, m_SExtOrSelf(m_Value(A))));
383   EXPECT_TRUE(A == Op32);
384   EXPECT_TRUE(sd_match(Op32, m_AExtOrSelf(m_Value(A))));
385   EXPECT_TRUE(A == Op32);
386   EXPECT_TRUE(sd_match(AExt, m_AExtOrSelf(m_Value(A))));
387   EXPECT_TRUE(A == Op32);
388   EXPECT_TRUE(sd_match(Op64, m_TruncOrSelf(m_Value(A))));
389   EXPECT_TRUE(A == Op64);
390   EXPECT_TRUE(sd_match(Trunc, m_TruncOrSelf(m_Value(A))));
391   EXPECT_TRUE(A == Op64);
392 }
393 
394 TEST_F(SelectionDAGPatternMatchTest, matchNode) {
395   SDLoc DL;
396   auto Int32VT = EVT::getIntegerVT(Context, 32);
397 
398   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
399   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
400 
401   SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
402 
403   using namespace SDPatternMatch;
404   EXPECT_TRUE(sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value())));
405   EXPECT_FALSE(sd_match(Add, m_Node(ISD::SUB, m_Value(), m_Value())));
406   EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_Value())));
407   EXPECT_FALSE(
408       sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value(), m_Value())));
409   EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_ConstInt(), m_Value())));
410 }
411 
412 namespace {
413 struct VPMatchContext : public SDPatternMatch::BasicMatchContext {
414   using SDPatternMatch::BasicMatchContext::BasicMatchContext;
415 
416   bool match(SDValue OpVal, unsigned Opc) const {
417     if (!OpVal->isVPOpcode())
418       return OpVal->getOpcode() == Opc;
419 
420     auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), false);
421     return BaseOpc.has_value() && *BaseOpc == Opc;
422   }
423 
424   unsigned getNumOperands(SDValue N) const {
425     return N->isVPOpcode() ? N->getNumOperands() - 2 : N->getNumOperands();
426   }
427 };
428 } // anonymous namespace
429 TEST_F(SelectionDAGPatternMatchTest, matchContext) {
430   SDLoc DL;
431   auto BoolVT = EVT::getIntegerVT(Context, 1);
432   auto Int32VT = EVT::getIntegerVT(Context, 32);
433   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
434   auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4);
435 
436   SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
437   SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT);
438   SDValue Mask0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, MaskVT);
439 
440   SDValue VPAdd = DAG->getNode(ISD::VP_ADD, DL, VInt32VT,
441                                {Vector0, Vector0, Mask0, Scalar0});
442   SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT,
443                                      {Scalar0, VPAdd, Mask0, Scalar0});
444   SDValue Add = DAG->getNode(ISD::ADD, DL, VInt32VT, {Vector0, Vector0});
445 
446   using namespace SDPatternMatch;
447   VPMatchContext VPCtx(DAG.get());
448   EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Opc(ISD::ADD)));
449   EXPECT_TRUE(
450       sd_context_match(VPAdd, VPCtx, m_Node(ISD::ADD, m_Value(), m_Value())));
451   // VPMatchContext can't match pattern using explicit VP Opcode
452   EXPECT_FALSE(sd_context_match(VPAdd, VPCtx,
453                                 m_Node(ISD::VP_ADD, m_Value(), m_Value())));
454   EXPECT_FALSE(sd_context_match(
455       VPAdd, VPCtx,
456       m_Node(ISD::VP_ADD, m_Value(), m_Value(), m_Value(), m_Value())));
457   // Check Binary Op Pattern
458   EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Add(m_Value(), m_Value())));
459   // VP_REDUCE_ADD doesn't have a based opcode, so we use a normal
460   // sd_match before switching to VPMatchContext when checking VPAdd.
461   EXPECT_TRUE(sd_match(VPReduceAdd, m_Node(ISD::VP_REDUCE_ADD, m_Value(),
462                                            m_Context(VPCtx, m_Opc(ISD::ADD)),
463                                            m_Value(), m_Value())));
464   // non-vector predicated should match too
465   EXPECT_TRUE(sd_context_match(Add, VPCtx, m_Opc(ISD::ADD)));
466   EXPECT_TRUE(
467       sd_context_match(Add, VPCtx, m_Node(ISD::ADD, m_Value(), m_Value())));
468   EXPECT_FALSE(sd_context_match(
469       Add, VPCtx,
470       m_Node(ISD::ADD, m_Value(), m_Value(), m_Value(), m_Value())));
471   EXPECT_TRUE(sd_context_match(Add, VPCtx, m_Add(m_Value(), m_Value())));
472 }
473 
474 TEST_F(SelectionDAGPatternMatchTest, matchVPWithBasicContext) {
475   SDLoc DL;
476   auto BoolVT = EVT::getIntegerVT(Context, 1);
477   auto Int32VT = EVT::getIntegerVT(Context, 32);
478   auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
479   auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4);
480 
481   SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, VInt32VT);
482   SDValue Mask = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, MaskVT);
483   SDValue EL = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT);
484 
485   SDValue VPAdd =
486       DAG->getNode(ISD::VP_ADD, DL, VInt32VT, Vector0, Vector0, Mask, EL);
487 
488   using namespace SDPatternMatch;
489   EXPECT_FALSE(sd_match(VPAdd, m_Node(ISD::VP_ADD, m_Value(), m_Value())));
490   EXPECT_TRUE(sd_match(
491       VPAdd, m_Node(ISD::VP_ADD, m_Value(), m_Value(), m_Value(), m_Value())));
492 }
493 
494 TEST_F(SelectionDAGPatternMatchTest, matchAdvancedProperties) {
495   SDLoc DL;
496   auto Int16VT = EVT::getIntegerVT(Context, 16);
497   auto Int64VT = EVT::getIntegerVT(Context, 64);
498 
499   SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT);
500   SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT);
501 
502   SDValue Add = DAG->getNode(ISD::ADD, DL, Int64VT, Op0, Op0);
503 
504   using namespace SDPatternMatch;
505   EXPECT_TRUE(sd_match(Op0, DAG.get(), m_LegalType(m_Value())));
506   EXPECT_FALSE(sd_match(Op1, DAG.get(), m_LegalType(m_Value())));
507   EXPECT_TRUE(sd_match(Add, DAG.get(),
508                        m_LegalOp(m_IntegerVT(m_Add(m_Value(), m_Value())))));
509 }
510