1 //===---- llvm/unittest/CodeGen/SelectionDAGPatternMatchTest.cpp ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/OptimizationRemarkEmitter.h" 10 #include "llvm/AsmParser/Parser.h" 11 #include "llvm/CodeGen/MachineModuleInfo.h" 12 #include "llvm/CodeGen/SDPatternMatch.h" 13 #include "llvm/CodeGen/TargetLowering.h" 14 #include "llvm/MC/TargetRegistry.h" 15 #include "llvm/Support/SourceMgr.h" 16 #include "llvm/Support/TargetSelect.h" 17 #include "llvm/Target/TargetMachine.h" 18 #include "gtest/gtest.h" 19 20 using namespace llvm; 21 22 class SelectionDAGPatternMatchTest : public testing::Test { 23 protected: 24 static void SetUpTestCase() { 25 InitializeAllTargets(); 26 InitializeAllTargetMCs(); 27 } 28 29 void SetUp() override { 30 StringRef Assembly = "@g = global i32 0\n" 31 "@g_alias = alias i32, i32* @g\n" 32 "define i32 @f() {\n" 33 " %1 = load i32, i32* @g\n" 34 " ret i32 %1\n" 35 "}"; 36 37 Triple TargetTriple("riscv64--"); 38 std::string Error; 39 const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); 40 // FIXME: These tests do not depend on RISCV specifically, but we have to 41 // initialize a target. A skeleton Target for unittests would allow us to 42 // always run these tests. 43 if (!T) 44 GTEST_SKIP(); 45 46 TargetOptions Options; 47 TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>( 48 T->createTargetMachine("riscv64", "", "+m,+f,+d,+v", Options, 49 std::nullopt, std::nullopt, 50 CodeGenOptLevel::Aggressive))); 51 if (!TM) 52 GTEST_SKIP(); 53 54 SMDiagnostic SMError; 55 M = parseAssemblyString(Assembly, SMError, Context); 56 if (!M) 57 report_fatal_error(SMError.getMessage()); 58 M->setDataLayout(TM->createDataLayout()); 59 60 F = M->getFunction("f"); 61 if (!F) 62 report_fatal_error("F?"); 63 G = M->getGlobalVariable("g"); 64 if (!G) 65 report_fatal_error("G?"); 66 AliasedG = M->getNamedAlias("g_alias"); 67 if (!AliasedG) 68 report_fatal_error("AliasedG?"); 69 70 MachineModuleInfo MMI(TM.get()); 71 72 MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 73 0, MMI); 74 75 DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None); 76 if (!DAG) 77 report_fatal_error("DAG?"); 78 OptimizationRemarkEmitter ORE(F); 79 DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr); 80 } 81 82 TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) { 83 return DAG->getTargetLoweringInfo().getTypeAction(Context, VT); 84 } 85 86 EVT getTypeToTransformTo(EVT VT) { 87 return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT); 88 } 89 90 LLVMContext Context; 91 std::unique_ptr<LLVMTargetMachine> TM; 92 std::unique_ptr<Module> M; 93 Function *F; 94 GlobalVariable *G; 95 GlobalAlias *AliasedG; 96 std::unique_ptr<MachineFunction> MF; 97 std::unique_ptr<SelectionDAG> DAG; 98 }; 99 100 TEST_F(SelectionDAGPatternMatchTest, matchValueType) { 101 SDLoc DL; 102 auto Int32VT = EVT::getIntegerVT(Context, 32); 103 auto Float32VT = EVT::getFloatingPointVT(32); 104 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 105 106 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 107 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT); 108 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 109 110 using namespace SDPatternMatch; 111 EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT))); 112 EVT BindVT; 113 EXPECT_TRUE(sd_match(Op1, m_VT(BindVT))); 114 EXPECT_EQ(BindVT, Float32VT); 115 EXPECT_TRUE(sd_match(Op0, m_IntegerVT())); 116 EXPECT_TRUE(sd_match(Op1, m_FloatingPointVT())); 117 EXPECT_TRUE(sd_match(Op2, m_VectorVT())); 118 EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT())); 119 } 120 121 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) { 122 SDLoc DL; 123 auto Int32VT = EVT::getIntegerVT(Context, 32); 124 auto Float32VT = EVT::getFloatingPointVT(32); 125 126 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 127 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 128 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT); 129 130 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 131 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 132 SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub); 133 SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1); 134 SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0); 135 SDValue Or = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1); 136 137 SDValue SFAdd = DAG->getNode(ISD::STRICT_FADD, DL, {Float32VT, MVT::Other}, 138 {DAG->getEntryNode(), Op2, Op2}); 139 140 using namespace SDPatternMatch; 141 EXPECT_TRUE(sd_match(Sub, m_BinOp(ISD::SUB, m_Value(), m_Value()))); 142 EXPECT_TRUE(sd_match(Sub, m_Sub(m_Value(), m_Value()))); 143 EXPECT_TRUE(sd_match(Add, m_c_BinOp(ISD::ADD, m_Value(), m_Value()))); 144 EXPECT_TRUE(sd_match(Add, m_Add(m_Value(), m_Value()))); 145 EXPECT_TRUE(sd_match( 146 Mul, m_Mul(m_OneUse(m_Opc(ISD::SUB)), m_NUses<2>(m_Specific(Add))))); 147 EXPECT_TRUE( 148 sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_SpecificVT(Float32VT), 149 m_SpecificVT(Float32VT)))); 150 151 EXPECT_TRUE(sd_match(And, m_c_BinOp(ISD::AND, m_Value(), m_Value()))); 152 EXPECT_TRUE(sd_match(And, m_And(m_Value(), m_Value()))); 153 EXPECT_TRUE(sd_match(Xor, m_c_BinOp(ISD::XOR, m_Value(), m_Value()))); 154 EXPECT_TRUE(sd_match(Xor, m_Xor(m_Value(), m_Value()))); 155 EXPECT_TRUE(sd_match(Or, m_c_BinOp(ISD::OR, m_Value(), m_Value()))); 156 EXPECT_TRUE(sd_match(Or, m_Or(m_Value(), m_Value()))); 157 158 SDValue BindVal; 159 EXPECT_TRUE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_Value(BindVal), 160 m_Deferred(BindVal)))); 161 EXPECT_FALSE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_OtherVT(), 162 m_SpecificVT(Float32VT)))); 163 } 164 165 TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) { 166 SDLoc DL; 167 auto Int32VT = EVT::getIntegerVT(Context, 32); 168 auto Int64VT = EVT::getIntegerVT(Context, 64); 169 170 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 171 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 172 173 SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op0); 174 SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0); 175 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1); 176 177 using namespace SDPatternMatch; 178 EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value()))); 179 EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value()))); 180 EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1)))); 181 } 182 183 TEST_F(SelectionDAGPatternMatchTest, matchConstants) { 184 SDLoc DL; 185 auto Int32VT = EVT::getIntegerVT(Context, 32); 186 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 187 188 SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 189 190 SDValue Const3 = DAG->getConstant(3, DL, Int32VT); 191 SDValue Const87 = DAG->getConstant(87, DL, Int32VT); 192 SDValue Splat = DAG->getSplat(VInt32VT, DL, Arg0); 193 SDValue ConstSplat = DAG->getSplat(VInt32VT, DL, Const3); 194 SDValue Zero = DAG->getConstant(0, DL, Int32VT); 195 SDValue One = DAG->getConstant(1, DL, Int32VT); 196 SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT); 197 198 using namespace SDPatternMatch; 199 EXPECT_TRUE(sd_match(Const87, m_ConstInt())); 200 EXPECT_FALSE(sd_match(Arg0, m_ConstInt())); 201 APInt ConstVal; 202 EXPECT_TRUE(sd_match(ConstSplat, m_ConstInt(ConstVal))); 203 EXPECT_EQ(ConstVal, 3); 204 EXPECT_FALSE(sd_match(Splat, m_ConstInt())); 205 206 EXPECT_TRUE(sd_match(Const87, m_SpecificInt(87))); 207 EXPECT_TRUE(sd_match(Const3, m_SpecificInt(ConstVal))); 208 EXPECT_TRUE(sd_match(AllOnes, m_AllOnes())); 209 210 EXPECT_TRUE(sd_match(Zero, DAG.get(), m_False())); 211 EXPECT_TRUE(sd_match(One, DAG.get(), m_True())); 212 EXPECT_FALSE(sd_match(AllOnes, DAG.get(), m_True())); 213 } 214 215 TEST_F(SelectionDAGPatternMatchTest, patternCombinators) { 216 SDLoc DL; 217 auto Int32VT = EVT::getIntegerVT(Context, 32); 218 219 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 220 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 221 222 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 223 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 224 225 using namespace SDPatternMatch; 226 EXPECT_TRUE(sd_match( 227 Sub, m_AnyOf(m_Opc(ISD::ADD), m_Opc(ISD::SUB), m_Opc(ISD::MUL)))); 228 EXPECT_TRUE(sd_match(Add, m_AllOf(m_Opc(ISD::ADD), m_OneUse()))); 229 } 230 231 TEST_F(SelectionDAGPatternMatchTest, matchNode) { 232 SDLoc DL; 233 auto Int32VT = EVT::getIntegerVT(Context, 32); 234 235 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 236 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 237 238 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 239 240 using namespace SDPatternMatch; 241 EXPECT_TRUE(sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value()))); 242 EXPECT_FALSE(sd_match(Add, m_Node(ISD::SUB, m_Value(), m_Value()))); 243 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_Value()))); 244 EXPECT_FALSE( 245 sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value(), m_Value()))); 246 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_ConstInt(), m_Value()))); 247 } 248 249 namespace { 250 struct VPMatchContext : public SDPatternMatch::BasicMatchContext { 251 using SDPatternMatch::BasicMatchContext::BasicMatchContext; 252 253 bool match(SDValue OpVal, unsigned Opc) const { 254 if (!OpVal->isVPOpcode()) 255 return OpVal->getOpcode() == Opc; 256 257 auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), false); 258 return BaseOpc.has_value() && *BaseOpc == Opc; 259 } 260 }; 261 } // anonymous namespace 262 TEST_F(SelectionDAGPatternMatchTest, matchContext) { 263 SDLoc DL; 264 auto BoolVT = EVT::getIntegerVT(Context, 1); 265 auto Int32VT = EVT::getIntegerVT(Context, 32); 266 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 267 auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4); 268 269 SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 270 SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 271 SDValue Mask0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, MaskVT); 272 273 SDValue VPAdd = DAG->getNode(ISD::VP_ADD, DL, VInt32VT, 274 {Vector0, Vector0, Mask0, Scalar0}); 275 SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT, 276 {Scalar0, VPAdd, Mask0, Scalar0}); 277 278 using namespace SDPatternMatch; 279 VPMatchContext VPCtx(DAG.get()); 280 EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Opc(ISD::ADD))); 281 // VP_REDUCE_ADD doesn't have a based opcode, so we use a normal 282 // sd_match before switching to VPMatchContext when checking VPAdd. 283 EXPECT_TRUE(sd_match(VPReduceAdd, m_Node(ISD::VP_REDUCE_ADD, m_Value(), 284 m_Context(VPCtx, m_Opc(ISD::ADD)), 285 m_Value(), m_Value()))); 286 } 287 288 TEST_F(SelectionDAGPatternMatchTest, matchAdvancedProperties) { 289 SDLoc DL; 290 auto Int16VT = EVT::getIntegerVT(Context, 16); 291 auto Int64VT = EVT::getIntegerVT(Context, 64); 292 293 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 294 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT); 295 296 SDValue Add = DAG->getNode(ISD::ADD, DL, Int64VT, Op0, Op0); 297 298 using namespace SDPatternMatch; 299 EXPECT_TRUE(sd_match(Op0, DAG.get(), m_LegalType(m_Value()))); 300 EXPECT_FALSE(sd_match(Op1, DAG.get(), m_LegalType(m_Value()))); 301 EXPECT_TRUE(sd_match(Add, DAG.get(), 302 m_LegalOp(m_IntegerVT(m_Add(m_Value(), m_Value()))))); 303 } 304