1 //===---- llvm/unittest/CodeGen/SelectionDAGPatternMatchTest.cpp ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/OptimizationRemarkEmitter.h" 10 #include "llvm/AsmParser/Parser.h" 11 #include "llvm/CodeGen/MachineModuleInfo.h" 12 #include "llvm/CodeGen/SDPatternMatch.h" 13 #include "llvm/CodeGen/TargetLowering.h" 14 #include "llvm/IR/Module.h" 15 #include "llvm/MC/TargetRegistry.h" 16 #include "llvm/Support/SourceMgr.h" 17 #include "llvm/Support/TargetSelect.h" 18 #include "llvm/Target/TargetMachine.h" 19 #include "gtest/gtest.h" 20 21 using namespace llvm; 22 23 class SelectionDAGPatternMatchTest : public testing::Test { 24 protected: 25 static void SetUpTestCase() { 26 InitializeAllTargets(); 27 InitializeAllTargetMCs(); 28 } 29 30 void SetUp() override { 31 StringRef Assembly = "@g = global i32 0\n" 32 "@g_alias = alias i32, i32* @g\n" 33 "define i32 @f() {\n" 34 " %1 = load i32, i32* @g\n" 35 " ret i32 %1\n" 36 "}"; 37 38 Triple TargetTriple("riscv64--"); 39 std::string Error; 40 const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); 41 // FIXME: These tests do not depend on RISCV specifically, but we have to 42 // initialize a target. A skeleton Target for unittests would allow us to 43 // always run these tests. 44 if (!T) 45 GTEST_SKIP(); 46 47 TargetOptions Options; 48 TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>( 49 T->createTargetMachine("riscv64", "", "+m,+f,+d,+v", Options, 50 std::nullopt, std::nullopt, 51 CodeGenOptLevel::Aggressive))); 52 if (!TM) 53 GTEST_SKIP(); 54 55 SMDiagnostic SMError; 56 M = parseAssemblyString(Assembly, SMError, Context); 57 if (!M) 58 report_fatal_error(SMError.getMessage()); 59 M->setDataLayout(TM->createDataLayout()); 60 61 F = M->getFunction("f"); 62 if (!F) 63 report_fatal_error("F?"); 64 G = M->getGlobalVariable("g"); 65 if (!G) 66 report_fatal_error("G?"); 67 AliasedG = M->getNamedAlias("g_alias"); 68 if (!AliasedG) 69 report_fatal_error("AliasedG?"); 70 71 MachineModuleInfo MMI(TM.get()); 72 73 MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 74 MMI.getContext(), 0); 75 76 DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None); 77 if (!DAG) 78 report_fatal_error("DAG?"); 79 OptimizationRemarkEmitter ORE(F); 80 DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr, MMI, 81 nullptr); 82 } 83 84 TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) { 85 return DAG->getTargetLoweringInfo().getTypeAction(Context, VT); 86 } 87 88 EVT getTypeToTransformTo(EVT VT) { 89 return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT); 90 } 91 92 LLVMContext Context; 93 std::unique_ptr<LLVMTargetMachine> TM; 94 std::unique_ptr<Module> M; 95 Function *F; 96 GlobalVariable *G; 97 GlobalAlias *AliasedG; 98 std::unique_ptr<MachineFunction> MF; 99 std::unique_ptr<SelectionDAG> DAG; 100 }; 101 102 TEST_F(SelectionDAGPatternMatchTest, matchValueType) { 103 SDLoc DL; 104 auto Int32VT = EVT::getIntegerVT(Context, 32); 105 auto Float32VT = EVT::getFloatingPointVT(32); 106 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 107 108 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 109 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT); 110 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 111 112 using namespace SDPatternMatch; 113 EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT))); 114 EVT BindVT; 115 EXPECT_TRUE(sd_match(Op1, m_VT(BindVT))); 116 EXPECT_EQ(BindVT, Float32VT); 117 EXPECT_TRUE(sd_match(Op0, m_IntegerVT())); 118 EXPECT_TRUE(sd_match(Op1, m_FloatingPointVT())); 119 EXPECT_TRUE(sd_match(Op2, m_VectorVT())); 120 EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT())); 121 } 122 123 TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) { 124 SDLoc DL; 125 auto Int32VT = EVT::getIntegerVT(Context, 32); 126 127 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 128 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 129 130 SDValue ICMP_UGT = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETUGT); 131 SDValue ICMP_EQ01 = DAG->getSetCC(DL, MVT::i1, Op0, Op1, ISD::SETEQ); 132 SDValue ICMP_EQ10 = DAG->getSetCC(DL, MVT::i1, Op1, Op0, ISD::SETEQ); 133 134 auto Int1VT = EVT::getIntegerVT(Context, 1); 135 SDValue Cond = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int1VT); 136 SDValue T = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 4, Int1VT); 137 SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT); 138 SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F); 139 140 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 141 SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 6, VInt32VT); 142 SDValue V2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 7, VInt32VT); 143 SDValue VSelect = DAG->getNode(ISD::VSELECT, DL, VInt32VT, Cond, V1, V2); 144 145 using namespace SDPatternMatch; 146 ISD::CondCode CC; 147 EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), 148 m_SpecificCondCode(ISD::SETUGT)))); 149 EXPECT_TRUE( 150 sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_CondCode(CC)))); 151 EXPECT_TRUE(CC == ISD::SETUGT); 152 EXPECT_FALSE(sd_match( 153 ICMP_UGT, m_SetCC(m_Value(), m_Value(), m_SpecificCondCode(ISD::SETLE)))); 154 155 EXPECT_TRUE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op0), m_Specific(Op1), 156 m_SpecificCondCode(ISD::SETEQ)))); 157 EXPECT_TRUE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op1), m_Specific(Op0), 158 m_SpecificCondCode(ISD::SETEQ)))); 159 EXPECT_FALSE(sd_match(ICMP_EQ01, m_SetCC(m_Specific(Op1), m_Specific(Op0), 160 m_SpecificCondCode(ISD::SETEQ)))); 161 EXPECT_FALSE(sd_match(ICMP_EQ10, m_SetCC(m_Specific(Op0), m_Specific(Op1), 162 m_SpecificCondCode(ISD::SETEQ)))); 163 EXPECT_TRUE(sd_match(ICMP_EQ01, m_c_SetCC(m_Specific(Op1), m_Specific(Op0), 164 m_SpecificCondCode(ISD::SETEQ)))); 165 EXPECT_TRUE(sd_match(ICMP_EQ10, m_c_SetCC(m_Specific(Op0), m_Specific(Op1), 166 m_SpecificCondCode(ISD::SETEQ)))); 167 168 EXPECT_TRUE(sd_match( 169 Select, m_Select(m_Specific(Cond), m_Specific(T), m_Specific(F)))); 170 EXPECT_FALSE(sd_match( 171 Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T)))); 172 EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1), 173 m_SpecificCondCode(ISD::SETEQ)))); 174 EXPECT_TRUE(sd_match( 175 VSelect, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2)))); 176 EXPECT_FALSE(sd_match( 177 Select, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2)))); 178 } 179 180 TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) { 181 SDLoc DL; 182 auto Int32VT = EVT::getIntegerVT(Context, 32); 183 auto Float32VT = EVT::getFloatingPointVT(32); 184 185 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 186 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 187 SDValue Op2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Float32VT); 188 189 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 190 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 191 SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub); 192 SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1); 193 SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0); 194 SDValue Or = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1); 195 SDValue SMax = DAG->getNode(ISD::SMAX, DL, Int32VT, Op0, Op1); 196 SDValue SMin = DAG->getNode(ISD::SMIN, DL, Int32VT, Op1, Op0); 197 SDValue UMax = DAG->getNode(ISD::UMAX, DL, Int32VT, Op0, Op1); 198 SDValue UMin = DAG->getNode(ISD::UMIN, DL, Int32VT, Op1, Op0); 199 200 SDValue SFAdd = DAG->getNode(ISD::STRICT_FADD, DL, {Float32VT, MVT::Other}, 201 {DAG->getEntryNode(), Op2, Op2}); 202 203 using namespace SDPatternMatch; 204 EXPECT_TRUE(sd_match(Sub, m_BinOp(ISD::SUB, m_Value(), m_Value()))); 205 EXPECT_TRUE(sd_match(Sub, m_Sub(m_Value(), m_Value()))); 206 EXPECT_TRUE(sd_match(Add, m_c_BinOp(ISD::ADD, m_Value(), m_Value()))); 207 EXPECT_TRUE(sd_match(Add, m_Add(m_Value(), m_Value()))); 208 EXPECT_TRUE(sd_match( 209 Mul, m_Mul(m_OneUse(m_Opc(ISD::SUB)), m_NUses<2>(m_Specific(Add))))); 210 EXPECT_TRUE( 211 sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_SpecificVT(Float32VT), 212 m_SpecificVT(Float32VT)))); 213 214 EXPECT_TRUE(sd_match(And, m_c_BinOp(ISD::AND, m_Value(), m_Value()))); 215 EXPECT_TRUE(sd_match(And, m_And(m_Value(), m_Value()))); 216 EXPECT_TRUE(sd_match(Xor, m_c_BinOp(ISD::XOR, m_Value(), m_Value()))); 217 EXPECT_TRUE(sd_match(Xor, m_Xor(m_Value(), m_Value()))); 218 EXPECT_TRUE(sd_match(Or, m_c_BinOp(ISD::OR, m_Value(), m_Value()))); 219 EXPECT_TRUE(sd_match(Or, m_Or(m_Value(), m_Value()))); 220 221 EXPECT_TRUE(sd_match(SMax, m_c_BinOp(ISD::SMAX, m_Value(), m_Value()))); 222 EXPECT_TRUE(sd_match(SMax, m_SMax(m_Value(), m_Value()))); 223 EXPECT_TRUE(sd_match(SMin, m_c_BinOp(ISD::SMIN, m_Value(), m_Value()))); 224 EXPECT_TRUE(sd_match(SMin, m_SMin(m_Value(), m_Value()))); 225 EXPECT_TRUE(sd_match(UMax, m_c_BinOp(ISD::UMAX, m_Value(), m_Value()))); 226 EXPECT_TRUE(sd_match(UMax, m_UMax(m_Value(), m_Value()))); 227 EXPECT_TRUE(sd_match(UMin, m_c_BinOp(ISD::UMIN, m_Value(), m_Value()))); 228 EXPECT_TRUE(sd_match(UMin, m_UMin(m_Value(), m_Value()))); 229 230 SDValue BindVal; 231 EXPECT_TRUE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_Value(BindVal), 232 m_Deferred(BindVal)))); 233 EXPECT_FALSE(sd_match(SFAdd, m_ChainedBinOp(ISD::STRICT_FADD, m_OtherVT(), 234 m_SpecificVT(Float32VT)))); 235 } 236 237 TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) { 238 SDLoc DL; 239 auto Int32VT = EVT::getIntegerVT(Context, 32); 240 auto Int64VT = EVT::getIntegerVT(Context, 64); 241 242 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 243 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 244 245 SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op0); 246 SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0); 247 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1); 248 249 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0); 250 SDValue Neg = DAG->getNegative(Op0, DL, Int32VT); 251 SDValue Not = DAG->getNOT(DL, Op0, Int32VT); 252 253 SDValue VScale = DAG->getVScale(DL, Int32VT, APInt::getMaxValue(32)); 254 255 using namespace SDPatternMatch; 256 EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value()))); 257 EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value()))); 258 EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1)))); 259 260 EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value()))); 261 EXPECT_TRUE(sd_match(Not, m_Not(m_Value()))); 262 EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value()))); 263 EXPECT_FALSE(sd_match(Sub, m_Neg(m_Value()))); 264 EXPECT_FALSE(sd_match(Neg, m_Not(m_Value()))); 265 EXPECT_TRUE(sd_match(VScale, m_VScale(m_Value()))); 266 } 267 268 TEST_F(SelectionDAGPatternMatchTest, matchConstants) { 269 SDLoc DL; 270 auto Int32VT = EVT::getIntegerVT(Context, 32); 271 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 272 273 SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 274 275 SDValue Const3 = DAG->getConstant(3, DL, Int32VT); 276 SDValue Const87 = DAG->getConstant(87, DL, Int32VT); 277 SDValue Splat = DAG->getSplat(VInt32VT, DL, Arg0); 278 SDValue ConstSplat = DAG->getSplat(VInt32VT, DL, Const3); 279 SDValue Zero = DAG->getConstant(0, DL, Int32VT); 280 SDValue One = DAG->getConstant(1, DL, Int32VT); 281 SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT); 282 SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT); 283 284 using namespace SDPatternMatch; 285 EXPECT_TRUE(sd_match(Const87, m_ConstInt())); 286 EXPECT_FALSE(sd_match(Arg0, m_ConstInt())); 287 APInt ConstVal; 288 EXPECT_TRUE(sd_match(ConstSplat, m_ConstInt(ConstVal))); 289 EXPECT_EQ(ConstVal, 3); 290 EXPECT_FALSE(sd_match(Splat, m_ConstInt())); 291 292 EXPECT_TRUE(sd_match(Const87, m_SpecificInt(87))); 293 EXPECT_TRUE(sd_match(Const3, m_SpecificInt(ConstVal))); 294 EXPECT_TRUE(sd_match(AllOnes, m_AllOnes())); 295 296 EXPECT_TRUE(sd_match(Zero, DAG.get(), m_False())); 297 EXPECT_TRUE(sd_match(One, DAG.get(), m_True())); 298 EXPECT_FALSE(sd_match(AllOnes, DAG.get(), m_True())); 299 300 ISD::CondCode CC; 301 EXPECT_TRUE(sd_match( 302 SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), m_CondCode(CC)))); 303 EXPECT_EQ(CC, ISD::SETULT); 304 EXPECT_TRUE(sd_match(SetCC, m_Node(ISD::SETCC, m_Value(), m_Value(), 305 m_SpecificCondCode(ISD::SETULT)))); 306 } 307 308 TEST_F(SelectionDAGPatternMatchTest, patternCombinators) { 309 SDLoc DL; 310 auto Int32VT = EVT::getIntegerVT(Context, 32); 311 312 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 313 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 314 315 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 316 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0); 317 318 using namespace SDPatternMatch; 319 EXPECT_TRUE(sd_match( 320 Sub, m_AnyOf(m_Opc(ISD::ADD), m_Opc(ISD::SUB), m_Opc(ISD::MUL)))); 321 EXPECT_TRUE(sd_match(Add, m_AllOf(m_Opc(ISD::ADD), m_OneUse()))); 322 EXPECT_TRUE(sd_match(Add, m_NoneOf(m_Opc(ISD::SUB), m_Opc(ISD::MUL)))); 323 } 324 325 TEST_F(SelectionDAGPatternMatchTest, optionalResizing) { 326 SDLoc DL; 327 auto Int32VT = EVT::getIntegerVT(Context, 32); 328 auto Int64VT = EVT::getIntegerVT(Context, 64); 329 330 SDValue Op32 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 331 SDValue Op64 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 332 SDValue ZExt = DAG->getNode(ISD::ZERO_EXTEND, DL, Int64VT, Op32); 333 SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op32); 334 SDValue AExt = DAG->getNode(ISD::ANY_EXTEND, DL, Int64VT, Op32); 335 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op64); 336 337 using namespace SDPatternMatch; 338 SDValue A; 339 EXPECT_TRUE(sd_match(Op32, m_ZExtOrSelf(m_Value(A)))); 340 EXPECT_TRUE(A == Op32); 341 EXPECT_TRUE(sd_match(ZExt, m_ZExtOrSelf(m_Value(A)))); 342 EXPECT_TRUE(A == Op32); 343 EXPECT_TRUE(sd_match(Op64, m_SExtOrSelf(m_Value(A)))); 344 EXPECT_TRUE(A == Op64); 345 EXPECT_TRUE(sd_match(SExt, m_SExtOrSelf(m_Value(A)))); 346 EXPECT_TRUE(A == Op32); 347 EXPECT_TRUE(sd_match(Op32, m_AExtOrSelf(m_Value(A)))); 348 EXPECT_TRUE(A == Op32); 349 EXPECT_TRUE(sd_match(AExt, m_AExtOrSelf(m_Value(A)))); 350 EXPECT_TRUE(A == Op32); 351 EXPECT_TRUE(sd_match(Op64, m_TruncOrSelf(m_Value(A)))); 352 EXPECT_TRUE(A == Op64); 353 EXPECT_TRUE(sd_match(Trunc, m_TruncOrSelf(m_Value(A)))); 354 EXPECT_TRUE(A == Op64); 355 } 356 357 TEST_F(SelectionDAGPatternMatchTest, matchNode) { 358 SDLoc DL; 359 auto Int32VT = EVT::getIntegerVT(Context, 32); 360 361 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 362 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); 363 364 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1); 365 366 using namespace SDPatternMatch; 367 EXPECT_TRUE(sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value()))); 368 EXPECT_FALSE(sd_match(Add, m_Node(ISD::SUB, m_Value(), m_Value()))); 369 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_Value()))); 370 EXPECT_FALSE( 371 sd_match(Add, m_Node(ISD::ADD, m_Value(), m_Value(), m_Value()))); 372 EXPECT_FALSE(sd_match(Add, m_Node(ISD::ADD, m_ConstInt(), m_Value()))); 373 } 374 375 namespace { 376 struct VPMatchContext : public SDPatternMatch::BasicMatchContext { 377 using SDPatternMatch::BasicMatchContext::BasicMatchContext; 378 379 bool match(SDValue OpVal, unsigned Opc) const { 380 if (!OpVal->isVPOpcode()) 381 return OpVal->getOpcode() == Opc; 382 383 auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), false); 384 return BaseOpc.has_value() && *BaseOpc == Opc; 385 } 386 }; 387 } // anonymous namespace 388 TEST_F(SelectionDAGPatternMatchTest, matchContext) { 389 SDLoc DL; 390 auto BoolVT = EVT::getIntegerVT(Context, 1); 391 auto Int32VT = EVT::getIntegerVT(Context, 32); 392 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4); 393 auto MaskVT = EVT::getVectorVT(Context, BoolVT, 4); 394 395 SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); 396 SDValue Vector0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT); 397 SDValue Mask0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, MaskVT); 398 399 SDValue VPAdd = DAG->getNode(ISD::VP_ADD, DL, VInt32VT, 400 {Vector0, Vector0, Mask0, Scalar0}); 401 SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT, 402 {Scalar0, VPAdd, Mask0, Scalar0}); 403 404 using namespace SDPatternMatch; 405 VPMatchContext VPCtx(DAG.get()); 406 EXPECT_TRUE(sd_context_match(VPAdd, VPCtx, m_Opc(ISD::ADD))); 407 // VP_REDUCE_ADD doesn't have a based opcode, so we use a normal 408 // sd_match before switching to VPMatchContext when checking VPAdd. 409 EXPECT_TRUE(sd_match(VPReduceAdd, m_Node(ISD::VP_REDUCE_ADD, m_Value(), 410 m_Context(VPCtx, m_Opc(ISD::ADD)), 411 m_Value(), m_Value()))); 412 } 413 414 TEST_F(SelectionDAGPatternMatchTest, matchAdvancedProperties) { 415 SDLoc DL; 416 auto Int16VT = EVT::getIntegerVT(Context, 16); 417 auto Int64VT = EVT::getIntegerVT(Context, 64); 418 419 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); 420 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT); 421 422 SDValue Add = DAG->getNode(ISD::ADD, DL, Int64VT, Op0, Op0); 423 424 using namespace SDPatternMatch; 425 EXPECT_TRUE(sd_match(Op0, DAG.get(), m_LegalType(m_Value()))); 426 EXPECT_FALSE(sd_match(Op1, DAG.get(), m_LegalType(m_Value()))); 427 EXPECT_TRUE(sd_match(Add, DAG.get(), 428 m_LegalOp(m_IntegerVT(m_Add(m_Value(), m_Value()))))); 429 } 430