xref: /llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/resources-prefetchw.s (revision 08fe55b346cbb3a5126757ca5995ed22771d0326)
13408940fSGanesh Gopalasubramanian# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
23408940fSGanesh Gopalasubramanian# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s
33408940fSGanesh Gopalasubramanian
43408940fSGanesh Gopalasubramanianprefetch    (%rax)
53408940fSGanesh Gopalasubramanianprefetchw   (%rax)
63408940fSGanesh Gopalasubramanian
73408940fSGanesh Gopalasubramanian# CHECK:      Instruction Info:
83408940fSGanesh Gopalasubramanian# CHECK-NEXT: [1]: #uOps
93408940fSGanesh Gopalasubramanian# CHECK-NEXT: [2]: Latency
103408940fSGanesh Gopalasubramanian# CHECK-NEXT: [3]: RThroughput
113408940fSGanesh Gopalasubramanian# CHECK-NEXT: [4]: MayLoad
123408940fSGanesh Gopalasubramanian# CHECK-NEXT: [5]: MayStore
133408940fSGanesh Gopalasubramanian# CHECK-NEXT: [6]: HasSideEffects (U)
143408940fSGanesh Gopalasubramanian
153408940fSGanesh Gopalasubramanian# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
16*08fe55b3SSimon Pilgrim# CHECK-NEXT:  1      4     0.33    *      *            prefetch	(%rax)
17*08fe55b3SSimon Pilgrim# CHECK-NEXT:  1      4     0.33    *      *            prefetchw	(%rax)
183408940fSGanesh Gopalasubramanian
193408940fSGanesh Gopalasubramanian# CHECK:      Resources:
203408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]   - Zn2AGU0
213408940fSGanesh Gopalasubramanian# CHECK-NEXT: [1]   - Zn2AGU1
223408940fSGanesh Gopalasubramanian# CHECK-NEXT: [2]   - Zn2AGU2
233408940fSGanesh Gopalasubramanian# CHECK-NEXT: [3]   - Zn2ALU0
243408940fSGanesh Gopalasubramanian# CHECK-NEXT: [4]   - Zn2ALU1
253408940fSGanesh Gopalasubramanian# CHECK-NEXT: [5]   - Zn2ALU2
263408940fSGanesh Gopalasubramanian# CHECK-NEXT: [6]   - Zn2ALU3
273408940fSGanesh Gopalasubramanian# CHECK-NEXT: [7]   - Zn2Divider
283408940fSGanesh Gopalasubramanian# CHECK-NEXT: [8]   - Zn2FPU0
293408940fSGanesh Gopalasubramanian# CHECK-NEXT: [9]   - Zn2FPU1
303408940fSGanesh Gopalasubramanian# CHECK-NEXT: [10]  - Zn2FPU2
313408940fSGanesh Gopalasubramanian# CHECK-NEXT: [11]  - Zn2FPU3
323408940fSGanesh Gopalasubramanian# CHECK-NEXT: [12]  - Zn2Multiplier
333408940fSGanesh Gopalasubramanian
343408940fSGanesh Gopalasubramanian# CHECK:      Resource pressure per iteration:
353408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]
363408940fSGanesh Gopalasubramanian# CHECK-NEXT: 0.67   0.67   0.67    -      -      -      -      -      -      -      -      -      -
373408940fSGanesh Gopalasubramanian
383408940fSGanesh Gopalasubramanian# CHECK:      Resource pressure by instruction:
393408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   Instructions:
403408940fSGanesh Gopalasubramanian# CHECK-NEXT: 0.33   0.33   0.33    -      -      -      -      -      -      -      -      -      -     prefetch	(%rax)
413408940fSGanesh Gopalasubramanian# CHECK-NEXT: 0.33   0.33   0.33    -      -      -      -      -      -      -      -      -      -     prefetchw	(%rax)
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