xref: /llvm-project/llvm/test/Transforms/VectorCombine/Hexagon/load.ll (revision c00ffbe02b222ec34a0181436c17025a2dfacedc)
1b97e402cSSanjay Patel; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
25e4dbd7aSBjorn Pettersson; RUN: opt < %s -passes=vector-combine -S -mtriple=hexagon-- | FileCheck %s --check-prefixes=CHECK
3b97e402cSSanjay Patel
4b97e402cSSanjay Pateltarget datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5b97e402cSSanjay Patel
6b97e402cSSanjay Patel; This would crash because TTI returns "0" for vector length.
7b97e402cSSanjay Patel
8*c00ffbe0SNikita Popovdefine <4 x float> @load_f32_insert_v4f32(ptr align 16 dereferenceable(16) %p) {
9b97e402cSSanjay Patel; CHECK-LABEL: @load_f32_insert_v4f32(
10*c00ffbe0SNikita Popov; CHECK-NEXT:    [[S:%.*]] = load float, ptr [[P:%.*]], align 4
11b97e402cSSanjay Patel; CHECK-NEXT:    [[R:%.*]] = insertelement <4 x float> undef, float [[S]], i32 0
12b97e402cSSanjay Patel; CHECK-NEXT:    ret <4 x float> [[R]]
13b97e402cSSanjay Patel;
14*c00ffbe0SNikita Popov  %s = load float, ptr %p, align 4
15b97e402cSSanjay Patel  %r = insertelement <4 x float> undef, float %s, i32 0
16b97e402cSSanjay Patel  ret <4 x float> %r
17b97e402cSSanjay Patel}
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