1338be798SAlexey Bataev; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 201e02e0bSAlexey Bataev; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr="+v" < %s -slp-threshold=-5 | FileCheck %s 3338be798SAlexey Bataev 4338be798SAlexey Bataev@h = global [16 x i64] zeroinitializer 5338be798SAlexey Bataev 6338be798SAlexey Bataevdefine void @test() { 7338be798SAlexey Bataev; CHECK-LABEL: define void @test( 8338be798SAlexey Bataev; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { 9338be798SAlexey Bataev; CHECK-NEXT: entry: 10*41afef90SAlexey Bataev; CHECK-NEXT: store <2 x i64> <i64 4294967295, i64 0>, ptr @h, align 8 11338be798SAlexey Bataev; CHECK-NEXT: ret void 12338be798SAlexey Bataev; 13338be798SAlexey Bataeventry: 14338be798SAlexey Bataev %sext.0 = sext i8 0 to i32 15338be798SAlexey Bataev %sext.1 = sext i8 0 to i32 16338be798SAlexey Bataev 17338be798SAlexey Bataev %lshr.0 = lshr i32 0, %sext.0 18338be798SAlexey Bataev %lshr.1 = lshr i32 0, %sext.1 19338be798SAlexey Bataev 20338be798SAlexey Bataev %or.0 = or i32 %lshr.0, -1 21338be798SAlexey Bataev %or.1 = or i32 %lshr.1, 0 22338be798SAlexey Bataev 23338be798SAlexey Bataev %zext.0 = zext i32 %or.0 to i64 24338be798SAlexey Bataev %zext.1 = zext i32 %or.1 to i64 25338be798SAlexey Bataev 26338be798SAlexey Bataev store i64 %zext.0, ptr @h, align 8 27338be798SAlexey Bataev store i64 %zext.1, ptr getelementptr inbounds ([16 x i64], ptr @h, i64 0, i64 1), align 8 28338be798SAlexey Bataev ret void 29338be798SAlexey Bataev} 30