1ce455f44SBen Shi; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2ce455f44SBen Shi; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \ 3ce455f44SBen Shi; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 \ 4ce455f44SBen Shi; RUN: | FileCheck %s 5ce455f44SBen Shi; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \ 6ce455f44SBen Shi; RUN: | FileCheck %s --check-prefix=DEFAULT 7ce455f44SBen Shi 8ce455f44SBen Shidefine void @fp_add(ptr %dst, ptr %p, ptr %q) { 9ce455f44SBen Shi; CHECK-LABEL: define void @fp_add 10ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] { 11ce455f44SBen Shi; CHECK-NEXT: entry: 12ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 13ce455f44SBen Shi; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 14ce455f44SBen Shi; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP0]], [[TMP1]] 15ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 16ce455f44SBen Shi; CHECK-NEXT: ret void 17ce455f44SBen Shi; 18ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_add 19ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] { 20ce455f44SBen Shi; DEFAULT-NEXT: entry: 217f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 227f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 237f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP0]], [[TMP1]] 247f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 25ce455f44SBen Shi; DEFAULT-NEXT: ret void 26ce455f44SBen Shi; 27ce455f44SBen Shientry: 28ce455f44SBen Shi %e0 = load float, ptr %p, align 4 29ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 30ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 31ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 32ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 33ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 34ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 35ce455f44SBen Shi 36ce455f44SBen Shi %f0 = load float, ptr %q, align 4 37ce455f44SBen Shi %pf1 = getelementptr inbounds float, ptr %q, i64 1 38ce455f44SBen Shi %f1 = load float, ptr %pf1, align 4 39ce455f44SBen Shi %pf2 = getelementptr inbounds float, ptr %q, i64 2 40ce455f44SBen Shi %f2 = load float, ptr %pf2, align 4 41ce455f44SBen Shi %pf3 = getelementptr inbounds float, ptr %q, i64 3 42ce455f44SBen Shi %f3 = load float, ptr %pf3, align 4 43ce455f44SBen Shi 44ce455f44SBen Shi %a0 = fadd float %e0, %f0 45ce455f44SBen Shi %a1 = fadd float %e1, %f1 46ce455f44SBen Shi %a2 = fadd float %e2, %f2 47ce455f44SBen Shi %a3 = fadd float %e3, %f3 48ce455f44SBen Shi 49ce455f44SBen Shi store float %a0, ptr %dst, align 4 50ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 51ce455f44SBen Shi store float %a1, ptr %pa1, align 4 52ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 53ce455f44SBen Shi store float %a2, ptr %pa2, align 4 54ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 55ce455f44SBen Shi store float %a3, ptr %pa3, align 4 56ce455f44SBen Shi 57ce455f44SBen Shi ret void 58ce455f44SBen Shi} 59ce455f44SBen Shi 60ce455f44SBen Shidefine void @fp_sub(ptr %dst, ptr %p) { 61ce455f44SBen Shi; CHECK-LABEL: define void @fp_sub 62ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 63ce455f44SBen Shi; CHECK-NEXT: entry: 64ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 65*38fffa63SPaul Walker; CHECK-NEXT: [[TMP1:%.*]] = fsub <4 x float> [[TMP0]], splat (float 3.000000e+00) 66ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 67ce455f44SBen Shi; CHECK-NEXT: ret void 68ce455f44SBen Shi; 69ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_sub 70ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 71ce455f44SBen Shi; DEFAULT-NEXT: entry: 727f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 73*38fffa63SPaul Walker; DEFAULT-NEXT: [[TMP1:%.*]] = fsub <4 x float> [[TMP0]], splat (float 3.000000e+00) 747f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 75ce455f44SBen Shi; DEFAULT-NEXT: ret void 76ce455f44SBen Shi; 77ce455f44SBen Shientry: 78ce455f44SBen Shi %e0 = load float, ptr %p, align 4 79ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 80ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 81ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 82ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 83ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 84ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 85ce455f44SBen Shi 86ce455f44SBen Shi %a0 = fsub float %e0, 3.0 87ce455f44SBen Shi %a1 = fsub float %e1, 3.0 88ce455f44SBen Shi %a2 = fsub float %e2, 3.0 89ce455f44SBen Shi %a3 = fsub float %e3, 3.0 90ce455f44SBen Shi 91ce455f44SBen Shi store float %a0, ptr %dst, align 4 92ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 93ce455f44SBen Shi store float %a1, ptr %pa1, align 4 94ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 95ce455f44SBen Shi store float %a2, ptr %pa2, align 4 96ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 97ce455f44SBen Shi store float %a3, ptr %pa3, align 4 98ce455f44SBen Shi 99ce455f44SBen Shi ret void 100ce455f44SBen Shi} 101ce455f44SBen Shi 102ce455f44SBen Shidefine void @fp_mul(ptr %dst, ptr %p, ptr %q) { 103ce455f44SBen Shi; CHECK-LABEL: define void @fp_mul 104ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] { 105ce455f44SBen Shi; CHECK-NEXT: entry: 106ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 107ce455f44SBen Shi; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 108ce455f44SBen Shi; CHECK-NEXT: [[TMP2:%.*]] = fmul <4 x float> [[TMP0]], [[TMP1]] 109ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 110ce455f44SBen Shi; CHECK-NEXT: ret void 111ce455f44SBen Shi; 112ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_mul 113ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] { 114ce455f44SBen Shi; DEFAULT-NEXT: entry: 1157f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 1167f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 1177f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP2:%.*]] = fmul <4 x float> [[TMP0]], [[TMP1]] 1187f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 119ce455f44SBen Shi; DEFAULT-NEXT: ret void 120ce455f44SBen Shi; 121ce455f44SBen Shientry: 122ce455f44SBen Shi %e0 = load float, ptr %p, align 4 123ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 124ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 125ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 126ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 127ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 128ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 129ce455f44SBen Shi 130ce455f44SBen Shi %f0 = load float, ptr %q, align 4 131ce455f44SBen Shi %pf1 = getelementptr inbounds float, ptr %q, i64 1 132ce455f44SBen Shi %f1 = load float, ptr %pf1, align 4 133ce455f44SBen Shi %pf2 = getelementptr inbounds float, ptr %q, i64 2 134ce455f44SBen Shi %f2 = load float, ptr %pf2, align 4 135ce455f44SBen Shi %pf3 = getelementptr inbounds float, ptr %q, i64 3 136ce455f44SBen Shi %f3 = load float, ptr %pf3, align 4 137ce455f44SBen Shi 138ce455f44SBen Shi %a0 = fmul float %e0, %f0 139ce455f44SBen Shi %a1 = fmul float %e1, %f1 140ce455f44SBen Shi %a2 = fmul float %e2, %f2 141ce455f44SBen Shi %a3 = fmul float %e3, %f3 142ce455f44SBen Shi 143ce455f44SBen Shi store float %a0, ptr %dst, align 4 144ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 145ce455f44SBen Shi store float %a1, ptr %pa1, align 4 146ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 147ce455f44SBen Shi store float %a2, ptr %pa2, align 4 148ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 149ce455f44SBen Shi store float %a3, ptr %pa3, align 4 150ce455f44SBen Shi 151ce455f44SBen Shi ret void 152ce455f44SBen Shi} 153ce455f44SBen Shi 154ce455f44SBen Shidefine void @fp_div(ptr %dst, ptr %p) { 155ce455f44SBen Shi; CHECK-LABEL: define void @fp_div 156ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 157ce455f44SBen Shi; CHECK-NEXT: entry: 158ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 159*38fffa63SPaul Walker; CHECK-NEXT: [[TMP1:%.*]] = fdiv <4 x float> [[TMP0]], splat (float 1.050000e+01) 160ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 161ce455f44SBen Shi; CHECK-NEXT: ret void 162ce455f44SBen Shi; 163ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_div 164ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 165ce455f44SBen Shi; DEFAULT-NEXT: entry: 1667f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 167*38fffa63SPaul Walker; DEFAULT-NEXT: [[TMP1:%.*]] = fdiv <4 x float> [[TMP0]], splat (float 1.050000e+01) 1687f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 169ce455f44SBen Shi; DEFAULT-NEXT: ret void 170ce455f44SBen Shi; 171ce455f44SBen Shientry: 172ce455f44SBen Shi %e0 = load float, ptr %p, align 4 173ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 174ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 175ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 176ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 177ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 178ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 179ce455f44SBen Shi 180ce455f44SBen Shi %a0 = fdiv float %e0, 10.5 181ce455f44SBen Shi %a1 = fdiv float %e1, 10.5 182ce455f44SBen Shi %a2 = fdiv float %e2, 10.5 183ce455f44SBen Shi %a3 = fdiv float %e3, 10.5 184ce455f44SBen Shi 185ce455f44SBen Shi store float %a0, ptr %dst, align 4 186ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 187ce455f44SBen Shi store float %a1, ptr %pa1, align 4 188ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 189ce455f44SBen Shi store float %a2, ptr %pa2, align 4 190ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 191ce455f44SBen Shi store float %a3, ptr %pa3, align 4 192ce455f44SBen Shi 193ce455f44SBen Shi ret void 194ce455f44SBen Shi} 195ce455f44SBen Shi 196ce455f44SBen Shideclare float @llvm.maxnum.f32(float, float) 197ce455f44SBen Shi 198ce455f44SBen Shidefine void @fp_max(ptr %dst, ptr %p, ptr %q) { 199ce455f44SBen Shi; CHECK-LABEL: define void @fp_max 200ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] { 201ce455f44SBen Shi; CHECK-NEXT: entry: 202ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 203ce455f44SBen Shi; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 204ce455f44SBen Shi; CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) 205ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 206ce455f44SBen Shi; CHECK-NEXT: ret void 207ce455f44SBen Shi; 208ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_max 209ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] { 210ce455f44SBen Shi; DEFAULT-NEXT: entry: 2117f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 2127f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4 2137f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) 2147f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4 215ce455f44SBen Shi; DEFAULT-NEXT: ret void 216ce455f44SBen Shi; 217ce455f44SBen Shientry: 218ce455f44SBen Shi %e0 = load float, ptr %p, align 4 219ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 220ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 221ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 222ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 223ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 224ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 225ce455f44SBen Shi 226ce455f44SBen Shi %f0 = load float, ptr %q, align 4 227ce455f44SBen Shi %pf1 = getelementptr inbounds float, ptr %q, i64 1 228ce455f44SBen Shi %f1 = load float, ptr %pf1, align 4 229ce455f44SBen Shi %pf2 = getelementptr inbounds float, ptr %q, i64 2 230ce455f44SBen Shi %f2 = load float, ptr %pf2, align 4 231ce455f44SBen Shi %pf3 = getelementptr inbounds float, ptr %q, i64 3 232ce455f44SBen Shi %f3 = load float, ptr %pf3, align 4 233ce455f44SBen Shi 234ce455f44SBen Shi %a0 = tail call float @llvm.maxnum.f32(float %e0, float %f0) 235ce455f44SBen Shi %a1 = tail call float @llvm.maxnum.f32(float %e1, float %f1) 236ce455f44SBen Shi %a2 = tail call float @llvm.maxnum.f32(float %e2, float %f2) 237ce455f44SBen Shi %a3 = tail call float @llvm.maxnum.f32(float %e3, float %f3) 238ce455f44SBen Shi 239ce455f44SBen Shi store float %a0, ptr %dst, align 4 240ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 241ce455f44SBen Shi store float %a1, ptr %pa1, align 4 242ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 243ce455f44SBen Shi store float %a2, ptr %pa2, align 4 244ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 245ce455f44SBen Shi store float %a3, ptr %pa3, align 4 246ce455f44SBen Shi 247ce455f44SBen Shi ret void 248ce455f44SBen Shi} 249ce455f44SBen Shi 250ce455f44SBen Shideclare float @llvm.minnum.f32(float, float) 251ce455f44SBen Shi 252ce455f44SBen Shidefine void @fp_min(ptr %dst, ptr %p) { 253ce455f44SBen Shi; CHECK-LABEL: define void @fp_min 254ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 255ce455f44SBen Shi; CHECK-NEXT: entry: 256ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 257*38fffa63SPaul Walker; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[TMP0]], <4 x float> splat (float 1.250000e+00)) 258ce455f44SBen Shi; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 259ce455f44SBen Shi; CHECK-NEXT: ret void 260ce455f44SBen Shi; 261ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_min 262ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 263ce455f44SBen Shi; DEFAULT-NEXT: entry: 2647f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 265*38fffa63SPaul Walker; DEFAULT-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[TMP0]], <4 x float> splat (float 1.250000e+00)) 2667f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4 267ce455f44SBen Shi; DEFAULT-NEXT: ret void 268ce455f44SBen Shi; 269ce455f44SBen Shientry: 270ce455f44SBen Shi %e0 = load float, ptr %p, align 4 271ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 272ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 273ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 274ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 275ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 276ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 277ce455f44SBen Shi 278ce455f44SBen Shi %a0 = tail call float @llvm.minnum.f32(float %e0, float 1.25) 279ce455f44SBen Shi %a1 = tail call float @llvm.minnum.f32(float %e1, float 1.25) 280ce455f44SBen Shi %a2 = tail call float @llvm.minnum.f32(float %e2, float 1.25) 281ce455f44SBen Shi %a3 = tail call float @llvm.minnum.f32(float %e3, float 1.25) 282ce455f44SBen Shi 283ce455f44SBen Shi store float %a0, ptr %dst, align 4 284ce455f44SBen Shi %pa1 = getelementptr inbounds float, ptr %dst, i64 1 285ce455f44SBen Shi store float %a1, ptr %pa1, align 4 286ce455f44SBen Shi %pa2 = getelementptr inbounds float, ptr %dst, i64 2 287ce455f44SBen Shi store float %a2, ptr %pa2, align 4 288ce455f44SBen Shi %pa3 = getelementptr inbounds float, ptr %dst, i64 3 289ce455f44SBen Shi store float %a3, ptr %pa3, align 4 290ce455f44SBen Shi 291ce455f44SBen Shi ret void 292ce455f44SBen Shi} 293ce455f44SBen Shi 294ce455f44SBen Shideclare i32 @llvm.fptosi.sat.i32.f32(float) 295ce455f44SBen Shi 296ce455f44SBen Shidefine void @fp_convert(ptr %dst, ptr %p) { 297ce455f44SBen Shi; CHECK-LABEL: define void @fp_convert 298ce455f44SBen Shi; CHECK-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 299ce455f44SBen Shi; CHECK-NEXT: entry: 300ce455f44SBen Shi; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 301ce455f44SBen Shi; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]]) 302ce455f44SBen Shi; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[DST]], align 4 303ce455f44SBen Shi; CHECK-NEXT: ret void 304ce455f44SBen Shi; 305ce455f44SBen Shi; DEFAULT-LABEL: define void @fp_convert 306ce455f44SBen Shi; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { 307ce455f44SBen Shi; DEFAULT-NEXT: entry: 3087f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4 3097f26c27eSPhilip Reames; DEFAULT-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]]) 3107f26c27eSPhilip Reames; DEFAULT-NEXT: store <4 x i32> [[TMP1]], ptr [[DST]], align 4 311ce455f44SBen Shi; DEFAULT-NEXT: ret void 312ce455f44SBen Shi; 313ce455f44SBen Shientry: 314ce455f44SBen Shi %e0 = load float, ptr %p, align 4 315ce455f44SBen Shi %pe1 = getelementptr inbounds float, ptr %p, i64 1 316ce455f44SBen Shi %e1 = load float, ptr %pe1, align 4 317ce455f44SBen Shi %pe2 = getelementptr inbounds float, ptr %p, i64 2 318ce455f44SBen Shi %e2 = load float, ptr %pe2, align 4 319ce455f44SBen Shi %pe3 = getelementptr inbounds float, ptr %p, i64 3 320ce455f44SBen Shi %e3 = load float, ptr %pe3, align 4 321ce455f44SBen Shi 322ce455f44SBen Shi %a0 = tail call i32 @llvm.fptosi.sat.i32.f32(float %e0) 323ce455f44SBen Shi %a1 = tail call i32 @llvm.fptosi.sat.i32.f32(float %e1) 324ce455f44SBen Shi %a2 = tail call i32 @llvm.fptosi.sat.i32.f32(float %e2) 325ce455f44SBen Shi %a3 = tail call i32 @llvm.fptosi.sat.i32.f32(float %e3) 326ce455f44SBen Shi 327ce455f44SBen Shi store i32 %a0, ptr %dst, align 4 328ce455f44SBen Shi %pa1 = getelementptr inbounds i32, ptr %dst, i64 1 329ce455f44SBen Shi store i32 %a1, ptr %pa1, align 4 330ce455f44SBen Shi %pa2 = getelementptr inbounds i32, ptr %dst, i64 2 331ce455f44SBen Shi store i32 %a2, ptr %pa2, align 4 332ce455f44SBen Shi %pa3 = getelementptr inbounds i32, ptr %dst, i64 3 333ce455f44SBen Shi store i32 %a3, ptr %pa3, align 4 334ce455f44SBen Shi 335ce455f44SBen Shi ret void 336ce455f44SBen Shi} 337