1c3054aebSMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2c3054aebSMatt Arsenault; RUN: opt -S -passes=openmp-opt-cgscc -aa-pipeline=basic-aa -openmp-hide-memory-transfer-latency < %s | FileCheck %s 3c3054aebSMatt Arsenault 4*32f9983cSJessica Deltarget datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9" 5c3054aebSMatt Arsenault 6c3054aebSMatt Arsenault@.__omp_offloading_heavyComputation.region_id = weak constant i8 0 7c3054aebSMatt Arsenault@.offload_maptypes. = private unnamed_addr constant [2 x i64] [i64 35, i64 35] 8c3054aebSMatt Arsenault 9c3054aebSMatt Arsenault%struct.ident_t = type { i32, i32, i32, i32, ptr } 10c3054aebSMatt Arsenault 11c3054aebSMatt Arsenault@.str = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00", align 1 12c3054aebSMatt Arsenault@0 = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, ptr @.str }, align 8 13c3054aebSMatt Arsenault 14c3054aebSMatt Arsenault;int heavyComputation(ptr a, unsigned size) { 15c3054aebSMatt Arsenault; int random = rand() % 7; 16c3054aebSMatt Arsenault; 17c3054aebSMatt Arsenault; //#pragma omp target data map(a[0:size], size) 18c3054aebSMatt Arsenault; ptr args[2]; 19c3054aebSMatt Arsenault; args[0] = &a; 20c3054aebSMatt Arsenault; args[1] = &size; 21c3054aebSMatt Arsenault; __tgt_target_data_begin(..., args, ...) 22c3054aebSMatt Arsenault; 23c3054aebSMatt Arsenault; #pragma omp target teams 24c3054aebSMatt Arsenault; for (int i = 0; i < size; ++i) { 25c3054aebSMatt Arsenault; a[i] = ++aptr 3.141624; 26c3054aebSMatt Arsenault; } 27c3054aebSMatt Arsenault; 28c3054aebSMatt Arsenault; return random; 29c3054aebSMatt Arsenault;} 30c3054aebSMatt Arsenaultdefine dso_local i32 @heavyComputation(ptr %a, i32 %size) { 31c3054aebSMatt Arsenault; CHECK-LABEL: @heavyComputation( 32c3054aebSMatt Arsenault; CHECK-NEXT: entry: 33c3054aebSMatt Arsenault; CHECK-NEXT: [[SIZE_ADDR:%.*]] = alloca i32, align 4, addrspace(5) 34c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 8, addrspace(5) 35c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 8, addrspace(5) 36c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [2 x i64], align 8, addrspace(5) 37c3054aebSMatt Arsenault; CHECK-NEXT: [[HANDLE:%.*]] = alloca [[STRUCT___TGT_ASYNC_INFO:%.*]], align 8, addrspace(5) 38c3054aebSMatt Arsenault; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr addrspace(5) [[HANDLE]] to ptr 39c3054aebSMatt Arsenault; CHECK-NEXT: store i32 [[SIZE:%.*]], ptr addrspace(5) [[SIZE_ADDR]], align 4 40c3054aebSMatt Arsenault; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (...) @rand() 41c3054aebSMatt Arsenault; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[SIZE]] to i64 42c3054aebSMatt Arsenault; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i64 [[CONV]], 3 43c3054aebSMatt Arsenault; CHECK-NEXT: store ptr [[A:%.*]], ptr addrspace(5) [[DOTOFFLOAD_BASEPTRS]], align 8 44c3054aebSMatt Arsenault; CHECK-NEXT: store ptr [[A]], ptr addrspace(5) [[DOTOFFLOAD_PTRS]], align 8 45c3054aebSMatt Arsenault; CHECK-NEXT: store i64 [[SHL]], ptr addrspace(5) [[DOTOFFLOAD_SIZES]], align 8 46c3054aebSMatt Arsenault; CHECK-NEXT: [[GEP0:%.*]] = getelementptr inbounds [2 x ptr], ptr addrspace(5) [[DOTOFFLOAD_BASEPTRS]], i64 0, i64 1 47c3054aebSMatt Arsenault; CHECK-NEXT: store ptr addrspace(5) [[SIZE_ADDR]], ptr addrspace(5) [[GEP0]], align 8 48c3054aebSMatt Arsenault; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [2 x ptr], ptr addrspace(5) [[DOTOFFLOAD_PTRS]], i64 0, i64 1 49c3054aebSMatt Arsenault; CHECK-NEXT: store ptr addrspace(5) [[SIZE_ADDR]], ptr addrspace(5) [[GEP1]], align 8 50c3054aebSMatt Arsenault; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [2 x i64], ptr addrspace(5) [[DOTOFFLOAD_SIZES]], i64 0, i64 1 51c3054aebSMatt Arsenault; CHECK-NEXT: store i64 4, ptr addrspace(5) [[GEP2]], align 8 52c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS_FLAT:%.*]] = addrspacecast ptr addrspace(5) [[DOTOFFLOAD_BASEPTRS]] to ptr 53c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_PTRS_FLAT:%.*]] = addrspacecast ptr addrspace(5) [[DOTOFFLOAD_PTRS]] to ptr 54c3054aebSMatt Arsenault; CHECK-NEXT: [[DOTOFFLOAD_SIZES_FLAT:%.*]] = addrspacecast ptr addrspace(5) [[DOTOFFLOAD_SIZES]] to ptr 55c3054aebSMatt Arsenault; CHECK-NEXT: call void @__tgt_target_data_begin_mapper_issue(ptr @[[GLOB0:[0-9]+]], i64 -1, i32 2, ptr [[DOTOFFLOAD_BASEPTRS_FLAT]], ptr [[DOTOFFLOAD_PTRS_FLAT]], ptr [[DOTOFFLOAD_SIZES_FLAT]], ptr @.offload_maptypes., ptr null, ptr null, ptr [[TMP0]]) 56c3054aebSMatt Arsenault; CHECK-NEXT: [[REM:%.*]] = srem i32 [[CALL]], 7 57c3054aebSMatt Arsenault; CHECK-NEXT: call void @__tgt_target_data_begin_mapper_wait(i64 -1, ptr [[TMP0]]) 58c3054aebSMatt Arsenault; CHECK-NEXT: call void @__tgt_target_data_end_mapper(ptr @[[GLOB0]], i64 -1, i32 2, ptr nonnull [[DOTOFFLOAD_BASEPTRS_FLAT]], ptr nonnull [[DOTOFFLOAD_PTRS_FLAT]], ptr nonnull [[DOTOFFLOAD_SIZES_FLAT]], ptr @.offload_maptypes., ptr null, ptr null) 59c3054aebSMatt Arsenault; CHECK-NEXT: ret i32 [[REM]] 60c3054aebSMatt Arsenault; 61c3054aebSMatt Arsenaultentry: 62c3054aebSMatt Arsenault %size.addr = alloca i32, align 4, addrspace(5) 63c3054aebSMatt Arsenault %.offload_baseptrs = alloca [2 x ptr], align 8, addrspace(5) 64c3054aebSMatt Arsenault %.offload_ptrs = alloca [2 x ptr], align 8, addrspace(5) 65c3054aebSMatt Arsenault %.offload_sizes = alloca [2 x i64], align 8, addrspace(5) 66c3054aebSMatt Arsenault store i32 %size, ptr addrspace(5) %size.addr, align 4 67c3054aebSMatt Arsenault %call = tail call i32 (...) @rand() 68c3054aebSMatt Arsenault %conv = zext i32 %size to i64 69c3054aebSMatt Arsenault %shl = shl nuw nsw i64 %conv, 3 70c3054aebSMatt Arsenault store ptr %a, ptr addrspace(5) %.offload_baseptrs, align 8 71c3054aebSMatt Arsenault store ptr %a, ptr addrspace(5) %.offload_ptrs, align 8 72c3054aebSMatt Arsenault store i64 %shl, ptr addrspace(5) %.offload_sizes, align 8 73c3054aebSMatt Arsenault %gep0 = getelementptr inbounds [2 x ptr], ptr addrspace(5) %.offload_baseptrs, i64 0, i64 1 74c3054aebSMatt Arsenault store ptr addrspace(5) %size.addr, ptr addrspace(5) %gep0, align 8 75c3054aebSMatt Arsenault %gep1 = getelementptr inbounds [2 x ptr], ptr addrspace(5) %.offload_ptrs, i64 0, i64 1 76c3054aebSMatt Arsenault store ptr addrspace(5) %size.addr, ptr addrspace(5) %gep1, align 8 77c3054aebSMatt Arsenault %gep2 = getelementptr inbounds [2 x i64], ptr addrspace(5) %.offload_sizes, i64 0, i64 1 78c3054aebSMatt Arsenault store i64 4, ptr addrspace(5) %gep2, align 8 79c3054aebSMatt Arsenault %.offload_baseptrs.flat = addrspacecast ptr addrspace(5) %.offload_baseptrs to ptr 80c3054aebSMatt Arsenault %.offload_ptrs.flat = addrspacecast ptr addrspace(5) %.offload_ptrs to ptr 81c3054aebSMatt Arsenault %.offload_sizes.flat = addrspacecast ptr addrspace(5) %.offload_sizes to ptr 82c3054aebSMatt Arsenault call void @__tgt_target_data_begin_mapper(ptr @0, i64 -1, i32 2, ptr nonnull %.offload_baseptrs.flat, ptr nonnull %.offload_ptrs.flat, ptr nonnull %.offload_sizes.flat, ptr @.offload_maptypes., ptr null, ptr null) 83c3054aebSMatt Arsenault %rem = srem i32 %call, 7 84c3054aebSMatt Arsenault call void @__tgt_target_data_end_mapper(ptr @0, i64 -1, i32 2, ptr nonnull %.offload_baseptrs.flat, ptr nonnull %.offload_ptrs.flat, ptr nonnull %.offload_sizes.flat, ptr @.offload_maptypes., ptr null, ptr null) 85c3054aebSMatt Arsenault ret i32 %rem 86c3054aebSMatt Arsenault} 87c3054aebSMatt Arsenault 88c3054aebSMatt Arsenaultdeclare void @__tgt_target_data_begin_mapper(ptr, i64, i32, ptr, ptr, ptr, ptr, ptr, ptr) 89c3054aebSMatt Arsenaultdeclare void @__tgt_target_data_end_mapper(ptr, i64, i32, ptr, ptr, ptr, ptr, ptr, ptr) 90c3054aebSMatt Arsenault 91c3054aebSMatt Arsenaultdeclare dso_local i32 @rand(...) 92c3054aebSMatt Arsenault 93c3054aebSMatt Arsenault!llvm.module.flags = !{!0} 94c3054aebSMatt Arsenault 95c3054aebSMatt Arsenault!0 = !{i32 7, !"openmp", i32 50} 96